DCR750F85

DCR750F85
Phase Control Thyristor
DS5934-3 July 2014 (LN31717)
KEY PARAMETERS
FEATURES

Double Side Cooling

High Surge Capability
VDRM
IT(AV)
ITSM
dV/dt*
dI/dt
8500V
733A
9800A
1500V/µs
200A/µs
* Higher dV/dt selections available
APPLICATIONS

Medium Voltage Soft Starts

High Voltage Power Supplies

Static Switches
VOLTAGE RATINGS
Part and
Ordering
Number
Repetitive Peak
Voltages
VDRM and VRRM
V
DCR750F85*
DCR750F80
DCR750F75
DCR750F70
8500
8000
7500
7000
Conditions
Tvj = -40°C to 125°C,
IDRM = IRRM = 200mA,
VDRM, VRRM tp = 10ms,
VDSM & VRSM =
VDRM & VRRM + 100V
respectively
Lower voltage grades available.
0
0
*8200V @ -40 C, 8500V @ 0 C
Outline type code: F
(See Package Details for further information)
Fig. 1 Package outline
ORDERING INFORMATION
When ordering, select the required part number
shown in the Voltage Ratings selection table.
For example:
DCR750F85
Note: Please use the complete part number when ordering
and quote this number in any future correspondence
relating to your order.
1/11
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DCR750F85
SEMICONDUCTOR
CURRENT RATINGS
Tcase = 60°C unless stated otherwise
Symbol
Parameter
Test Conditions
Max.
Units
733
A
Double Side Cooled
IT(AV)
Mean on-state current
IT(RMS)
RMS value
-
1151
A
Continuous (direct) on-state current
-
1139
A
IT
Half wave resistive load
SURGE RATINGS
Symbol
ITSM
2
It
Parameter
Surge (non-repetitive) on-state current
Test Conditions
Max.
Units
10ms half sine, Tcase = 125°C
9.8
kA
VR = 0
0.48
MA s
Min.
Max.
Units
2
I t for fusing
2
THERMAL AND MECHANICAL RATINGS
Symbol
Rth(j-c)
Rth(c-h)
Parameter
Thermal resistance – junction to case
Thermal resistance – case to heatsink
Test Conditions
Double side cooled
DC
-
0.0184
°C/W
Single side cooled
Anode DC
-
0.0333
°C/W
Cathode DC
-
0.0418
°C/W
Double side
-
0.004
°C/W
-
0.008
°C/W
-
125
°C
Clamping force 23 kN
(with mounting compound)
Blocking VDRM / VRRM
Single side
Tvj
Virtual junction temperature
Tstg
Storage temperature range
-55
125
°C
Fm
Clamping force
20.0
25.0
kN
2/11
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DCR750F85
SEMICONDUCTOR
DYNAMIC CHARACTERISTICS
Symbol
IRRM/IDRM
Parameter
Test Conditions
Min.
Max.
Units
Peak reverse and off-state current
At VRRM/VDRM, Tcase = 125°C
-
200
mA
dV/dt
Max. linear rate of rise of off-state voltage
To 67% VDRM, Tj = 125°C, gate open
-
1500
V/µs
dI/dt
Rate of rise of on-state current
From 67% VDRM to 2x IT(AV)
Repetitive 50Hz
-
100
A/µs
Gate source 30V, 10,
Non-repetitive
-
200
A/µs
tr < 0.5µs, Tj = 125°C
VT(TO)
rT
tgd
Threshold voltage – Low level
100A to 500A at Tcase = 125°C
-
1.030
V
Threshold voltage – High level
500A to 2500A at Tcase = 125°C
-
1.30
V
On-state slope resistance – Low level
100A to 500A at Tcase = 125°C
-
2.06
m
On-state slope resistance – High level
500A to 2500A at Tcase = 125°C
-
1.542
m
VD = 67% VDRM, gate source 30V, 10
-
3
µs
-
1200
µs
95
118
A
3000
4000
µC
Delay time
tr = 0.5µs, Tj = 25°C
tq
Turn-off time
Tj = 125°C, I peak = 1000A, tp = 1000us,
VR = 100V, dI/dt = 5A/µs,
dVDR/dt = 20V/µs linear to 2500V
IRR
Reverse Recovery current
QS
Stored charge
IL
Latching current
Tj = 25°C, VD = 5V
-
3
A
IH
Holding current
Tj = 25°C, RG-K = , ITM = 500A, IT = 5A
-
300
mA
IT = 1000A, tp = 1000us,Tj = 125°C,
dI/dt = – 5A/µs, VRpeak = 100V
3/11
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DCR750F85
SEMICONDUCTOR
GATE TRIGGER CHARACTERISTICS AND RATINGS
Symbol
Parameter
Test Conditions
Max.
Units
VGT
Gate trigger voltage
VDRM = 5V, Tcase = 25°C
1.5
V
VGD
Gate non-trigger voltage
At 50% VDRM, Tcase = 125°C
0.4
V
IGT
Gate trigger current
VDRM = 5V, Tcase = 25°C
350
mA
IGD
Gate non-trigger current
At 50% VDRM, Tcase = 125°C
10
mA
CURVES
3000
max 125ºC
Instantaneous on-state current,TI - (A)
min 125ºC
max 25ºC
2500
min 25ºC
2000
1500
1000
500
0
0
2
4
6
Instantaneous on-state voltage, VTM - (V)
Fig.2 Maximum & minimum on-state characteristics
VTM EQUATION
VTM = A + Bln (IT) + C.IT+D.IT
Where
A = 0.454245
B = 0.106933
C = 0.001271
D = 0.013218
these values are valid for Tj = 125°C for IT 100A to 3000A
4/11
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DCR750F85
SEMICONDUCTOR
130
16
180
120
Maximum case temperature, Tcase ( o C )
Mean power dissipation - (kW)
14
12
10
8
6
180
4
120
90
60
2
120
110
90
100
60
30
90
80
70
60
50
40
30
20
10
30
0
0
0
500
1000
1500
Mean on-state current, IT(AV) - (A)
0
2000
200
400
600
800
1000
1200
Mean on-state current, IT(AV) - (A)
Fig.3 On-state power dissipation – sine wave
Fig.4 Maximum permissible case temperature,
double side cooled – sine wave
125
16
120
90
100
14
60
Mean power dissipation - (kW)
T
- ( ° C)
Maximum heatsink temperature, Heatsink
180
30
75
50
12
10
8
6
d.c.
180
120
90
60
30
4
25
2
0
0
0
0
200
400
600
800
500
1000
1500
2000
2500
3000
1000
Mean on-state current, IT(AV) - (A)
Fig.5 Maximum permissible heatsink temperature,
double side cooled – sine wave
Mean on-state current, IT(AV) - (A)
Fig.6 On-state power dissipation – rectangular wave
5/11
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DCR750F85
SEMICONDUCTOR
125
d.c.
d.c.
180
120
90
60
30
100
T
-(o C)
Maximum heatsink temperature heatsink
T -(° C)
Maximum permissible case temperature ,case
125
75
50
25
180
120
100
90
60
30
75
50
25
0
0
0
500
1000
1500
2000
0
500
1000
Mean on-state current, IT(AV) - (A)
Mean on-state current, IT(AV) - (A)
Fig.7 Maximum permissible case temperature,
double side cooled – rectangular wave
Fig.8 Maximum permissible heatsink temperature,
double side cooled – rectangular wave
45.0
Double side cooled
Thermal Impedance Zth(j-c) ( °C/kW )
Double Side Cooled
40.0
Anode side cooled
Ri (°C/kW)
1
7.5608
2
4.0772
Ti (s)
0.6877
0.2537
0.0614
0.0101
Ri (°C/kW)
6.7211
4.6219
15.5387
14.8631
Ti (s)
Cathode Side Cooled
Cathode side cooled
35.0
1500
Ri (°C/kW)
Ti (s)
Anode Side Cooled
3
3.8420
4
2.8671
0.1910
0.0158
5.0011
3.3169
11.5564
8.5810
4.7942
8.3643
4.2216
6.0269
0.0166
0.2255
i 4
Z th  [ Ri i(41  exp(T / Ti )]
Z th  [ Ri  (1  exp(-T/ Ti )]
30.0
i 1
25.0
i 1
20.0
Rth(j-c) Conduction
Tables show the increments of thermal resistance Rth(j-c) when the device
operates at conduction angles other than d.c.
15.0
10.0
5.0
0.0
0.001
0.01
0.1
1
Time ( s )
10
100
°
180
120
90
60
30
15
Double side cooling
Zth (z)
sine.
rect.
3.19
2.14
3.72
3.10
4.29
3.64
4.81
4.23
5.22
4.88
5.40
5.22
°
180
120
90
60
30
15
Anode Side Cooling
Zth (z)
sine.
rect.
2.97
2.03
3.43
2.89
3.92
3.36
4.36
3.87
4.69
4.41
4.84
4.70
Cathode Sided Cooling
Zth (z)
°
sine.
rect.
180
2.95
2.02
120
3.40
2.87
90
3.88
3.34
60
4.31
3.84
30
4.64
4.37
15
4.79
4.65
Fig.9 Maximum (limit) transient thermal impedance – junction to case (°C/kW)
6/11
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DCR750F85
SEMICONDUCTOR
25
2.5
10
Conditions:
Tcase= 125°C
VR = 0
half-sine wave
Conditions:
Tcase = 125°C
VR =0
Pulse width = 10ms
ITSM
15
1.5
I2t
10
1
5
0.5
0
1
1
10
1
100
0
100
10
Pulse width, tP - (ms)
Number of cycles
Fig.10 Multi-cycle surge current
Fig.11 Single-cycle surge current
10000
250
9000
Reverse recovery current, Irr - (A)
Q s max = 3667.9*(di/dt) 0.3917
8000
Stored Charge, Qs - (uC)
2
I2t (MA2s)
Surge current, ITSM - (kA)
Surge current, TI SM- (kA)
20
7000
6000
5000
4000
Q s typical = 3158.5*(di/dt) 0.4161
3000
Conditions:
Tj = 125°C,
V peak ~ 4400V
Vrm ~ 2600V
snubber as appropriate to
control reverse voltage
2000
1000
200
IRRmax = 42.374*(di/dt) 0.7033
150
IRRtypical = 39.671*(di/dt) 0.7197
Conditions:
Tj = 125°C,
V peak ~ 4400V
Vrm ~ 2600V
snubber as appropriate to
control reverse voltage
100
50
0
0
0
2
4
6
8
10
Rate of decay of on-state current, di/dt - (A/us)
Fig.12 Stored charge
12
0
2
4
6
8
10
12
Rate of decay of on-state current, di/dt - (A/us)
Fig.13 Reverse recovery current
7/11
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DCR750F85
SEMICONDUCTOR
10
9
Gate trigger voltage, V GT - (V)
8
7
Upper Limit
6
5
Preferred gate drive
4
3
Tj = -40oC
2
Lower Limit
Tj = 25oC
1
Tj = 125oC
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Gate trigger current I GT , - (A)
Fig14 Gate Characteristics
30
Lower Limit
Upper Limit
5W
Gate trigger voltage, VGT - (V)
25
10W
20W
50W
20
100W
150W
-40C
15
10
5
0
0
1
2
3
4
5
6
7
8
9
10
Gate trigger current, I GT - (A)
Fig. 15 Gate characteristics
8/11
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DCR750F85
SEMICONDUCTOR
1.35
Normalised Turn-off time, Tq - (us)
1.3
Tq (dv/dt) = Tq(20V/us).0.7148.(dv/dt)0.1124
1.25
1.2
1.15
1.1
1.05
Conditions:
Tj = 125oC
I F = 1000A
tp = 1000us
VRM = 100V
di/dt = -5A/us
1
0.95
0.9
0.85
0.8
0.75
0
20
40
60
80
100
120
Rate of change of reapplied voltage, dv/dt - (V/us)
Fig.16 Turn-off time
9/11
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DCR750F85
SEMICONDUCTOR
PACKAGE DETAILS
For further package information, please contact Customer Services. All dimensions in mm, unless stated otherwise.
DO NOT SCALE.
3rd ANGLE PROJECTION
DO NOT SCALE
IF IN DOUBT ASK
HOLE Ø3.60 X 2.00
DEEP (IN BOTH
ELECTRODES)
20° OFFSET (NOM.)
TO GATE TUBE
Ø73.0 MAX
Ø47.0 NOM
Ø1.5
CATHODE
GATE
ANODE
Ø47.0 NOM
Device
DCR1003SF18
DCR1006SF28
DCR1008SF36
DCR1020F65
DCR1050SF42
DCR1180F52
DCR1274SF18
DCR1275SF28
DCR1277SF36
DCR1279SF48
DCR1350F42
DCR1610F28
DCR1640F28
DCR1830F22
DCR750F85
DCR810F85
DCR840F48
DCR890F65
DCR950F65
Maximum Minimum
Thickness Thickness
(mm)
(mm)
26.415
25.865
26.49
25.94
26.72
26.17
27.1
26.55
26.72
26.17
26.84
26.29
26.415
25.865
26.49
25.94
26.72
26.17
26.84
26.29
26.72
26.17
26.49
25.94
26.49
25.94
26.415
25.865
27.46
26.91
27.46
26.91
26.84
26.29
27.1
26.5
27.1
26.5
FOR PACKAGE HEIGHT
SEE TABLE
Lead length: 420mm
Lead terminal connector: M4 ring
Package outline type code: F
Fig.17 Package outline
10/11
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DCR750F85
SEMICONDUCTOR
IMPORTANT INFORMATION:
This publication is provided for information only and not for resale.
The products and information in this publication are intended for use by appropriately trained technical personnel.
Due to the diversity of product applications, the information contained herein is provided as a general guide only and does not constitute
any guarantee of suitability for use in a specific application.The user must evaluate the suitability of the product and the completeness of
the product data for the application. The user is responsible for product selection and ensuring all safety and any warning requirements
are met. Should additional product information be needed please contact Customer Service.
Although we have endeavoured to carefully compile the information in this publication it may contain inaccuracies or typographical
errors. The information is provided without any warranty or guarantee of any kind.
This publication is an uncontrolled document and is subject to change without notice. When referring to it please ensure that it is the
most up to date version and has not been superseded.
The products are not intended for use in applications where a failure or malfunction may cause loss of life, injury or damage to property.
The user must ensure that appropriate safety precautions are taken to prevent or mitigate the consequences of a product failure or
malfunction.
The products must not be touched when operating because there is a danger of electrocution or severe burning. Always use
protective safety equipment such as appropriate shields for the product and wear safety glasses. Even when disconnected any
electric charge remaining in the product must be discharged and allowed to cool before safe handling using protective gloves.
Extended exposure to conditions outside the product ratings may affect reliability leading to premature product failure. Use outside the
product ratings is likely to cause permanent damage to the product. In extreme conditions, as with all semiconductors, this may include
potentially hazardous rupture, a large current to flow or high voltage arcing, resulting in fire or explosion. Appropriate application design
and safety precautions should always be followed to protect persons and property.
Product Status & Product Ordering:
We annotate datasheets in the top right hand corner of the front page, to indicate product status if it is not yet fully approved for
production. The annotations are as follows:Target Information:
Preliminary Information:
No Annotation:
This is the most tentative form of information and represents a very preliminary specification.
No actual design work on the product has been started.
The product design is complete and final characterisation for volume production is in
progress.The datasheet represents the product as it is now understood but details may change.
The product has been approved for production and unless otherwise notified by Dynex any
product ordered will be supplied to the current version of the data sheet prevailing at the
time of our order acknowledgement.
All products and materials are sold and services provided subject to Dynex’s conditions of sale, which are available on request.
Any brand names and product names used in this publication are trademarks, registered trademarks or trade names of their
respective owners.
HEADQUARTERS OPERATIONS
CUSTOMER SERVICE
DYNEX SEMICONDUCTOR LIMITED
Doddington Road, Lincoln, Lincolnshire, LN6 3LF
United Kingdom.
Phone: +44 (0) 1522 500500
Fax:
+44 (0) 1522 500550
Web: http://www.dynexsemi.com
Phone: +44 (0) 1522 502753 / 502901
Fax:
+44 (0) 1522 500020
e-mail: [email protected]
 Dynex Semiconductor Ltd.
Technical Documentation – Not for resale.
11/11
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