2ED020I12FA Data Sheet (1,024 KB, EN)

2ED020I12FA
Dual IGBT Driver IC
SP001054678
1
Overview
Main Features
•
Dual channel isolated IGBT Driver
•
For 600V/1200V IGBTs
•
2 A rail-to-rail output
•
Vcesat-detection
•
Active Miller Clamp
Product Highlights
•
Coreless transformer isolated driver
•
Basic insulation according to DIN EN 60747-5-2
•
Basic insulation recognized under UL 1577
•
Integrated protection features
•
Suitable for operation at high ambient temperature
•
AEC Qualified
Typical Application
•
Drive inverters for HEV and EV
•
Auxiliary inverters for HEV and EV
•
High Power DC/DC inverters
Description
The 2ED020I12FA is a galvanic isolated dual channel IGBT driver in PG-DSO-36 package (32 pins) that provides
two fully independent driver outputs with a current capability of typically 2A.
All logic pins are 5V CMOS compatible and could be directly connected to a microcontroller.
The data transfer across galvanic isolation is realized by the integrated Coreless Transformer Technology.
The 2ED020I12FA provides several protection features like IGBT desaturation protection, active Miller clamping
and active shut down.
Type
Package
Marking
2ED020I12FA
PG-DSO-36
2ED020I12FA
Data Sheet
www.infineon.com
1
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Table of Contents
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
3.1
3.2
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
4.1
4.2
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.4
4.5
4.6
4.6.1
4.6.2
4.6.3
4.7
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Internal Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Undervoltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
READY Status Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Active Shut-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Non-Inverting and Inverting Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Driver Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
External Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5
5.1
5.2
5.3
5.4
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
5.4.7
5.4.8
Electrical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
14
16
16
17
17
18
19
19
20
20
22
22
6
6.1
6.2
6.3
Insulation Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Certified according to DIN EN 60747-5-2 (VDE 0884 Teil 2): 2003-01. Basic Insulation . . . . . . . . . .
Recognized under UL 1577 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
23
23
23
23
7
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Data Sheet
2
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
List of Figures
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Data Sheet
Block Diagram 2ED020I12FA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
PG-DSO-36 (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Application Example Bipolar Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Application Example Unipolar Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Propagation Delay, Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Typical Switching Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
DESAT Switch-Off Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
UVLO Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
PG-DSO-36 (Plastic (Green) Dual Small Outline Package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
List of Tables
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Table 8
Table 9
Table 10
Table 11
Table 12
Table 13
Table 14
Data Sheet
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
According to DIN EN 60747-5-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Recognized under UL 1577 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Block Diagram
2
Block Diagram
VCC1HS
7
UVLO
UVLO
&
INHS+
2
TX
3
DECODER
/RDYH
GND1
RX
TX
ENCODER
FLT2H
&
FLTH
RDY2H
FLTNLH
5
&
&
≥1
GND1
8
1
RSTH
TX
VCC2LS
13
CLAMPLS
VEE2LS
23
OUTLS
20
DESATLS
21
GND2LS
19
VEE2LS
24
VEE2LS
14
RX
TX
ENCODER
FLT2L
DECODER
/ RDYL
GND1
VEE2LS
VCC 2LS
VCC1
RDY2L
FLTNLL
15
FLTL
S
16
GND1
11
GND1
18
&
≥1
9V
R
≥1
VCC1
/RSTLS
&
Q
GND1
delay
1
RSTL
GND2LS
GND1
Data Sheet
25
&
&
Figure 1
VCC2LS
&
RX
VCC1
/ FLTLS
22
2V
delay
GND1
VCC1
RDYLS
VEEHS2
VEE2HS
UVLO
delay
INLS-
VEE2HS
31
2ED020I12FA
UVLO
12
36
GND2HS
&
INLS+
GND2HS
≥1
delay
17
32
R
GND1
VCC1LS
DESATHS
9V
Q
VCC1
1
30
VEE2HS
S
GND1
GND1
OUTHS
VCC2HS
VCC1
6
34
&
4
/RSTHS
CLAMPHS
VCC2HS VEEHS2
VCC1
/FLTHS
35
&
RX
GND1
VCC1
RDYHS
VCC2HS
2V
delay
delay
INHS-
33
VEE2LS
Block Diagram 2ED020I12FA
5
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Pin Configuration and Functionality
3
Pin Configuration and Functionality
3.1
Pin Configuration
Table 1
Pin Configuration
Pin
No.
Name
Function
1
GND1
Common ground input side
2
INHS+
Non inverted driver input high side
3
INHS-
Inverted driver input high side
4
RDYHS
Ready output high side
5
/FLTHS
Inverted fault output high side
6
/RSTHS
Inverted reset input high side
7
VCC1HS
Positive power supply input high side
8
GND1
Common ground input side
9
NC
Not used, internally connected to Pin 10
10
NC
Not used, internally connected to Pin 9
11
GND1
Common ground input side
12
INLS+
Non inverted driver input low side
13
INLS-
Inverted driver input low side
14
RDYLS
Ready output low side
15
/FLTLS
Inverted fault output low side
16
/RSTLS
Inverted reset input low side
17
VCC1LS
Positive power supply input low side
18
GND1
Common ground input side
19
VEE2LS
Negative power supply low side driver
20
DESATLS
Desaturation protection low side driver
21
GND2LS
Signal ground low side driver
22
VCC2LS
Power supply low side driver
23
OUTLS
Output low side driver
24
VEE2LS
Negative power supply low side driver
25
CLAMPLS
Miller clamping low side driver
26
Pin not existing, cut out
27
Pin not existing, cut out
28
Pin not existing, cut out
29
Pin not existing, cut out
30
DESATHS
Desaturation protection high side driver
31
VEE2HS
Negative power supply high side driver
Data Sheet
6
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Pin Configuration and Functionality
Table 1
Pin Configuration (cont’d)
Pin
No.
Name
Function
32
GND2HS
Signal ground high side driver
33
VCC2HS
Power supply high side driver
34
OUTHS
Output high side driver
35
CLAMPHS
Miller clamping high side driver
36
VEE2HS
Negative power supply high side driver
Figure 2
PG-DSO-36 (top view)
3.2
Pin Functionality
1
GND1
VEE2HS
36
2
INHS+
CLAMPHS
35
3
INHS-
OUTHS
34
4
RDYHS
VCC2HS
33
5
/FLTHS
GND2HS
32
6
/RSTHS
VEE2HS
31
7
VCC1HS
DESATHS
30
8
GND1
9
NC
10
NC
11
GND1
12
INLS+
CLAMPLS
25
13
INLS-
VEE2LS
24
14
RDYLS
OUTLS
23
15
/FLTLS
VCC2LS
22
16
/RSTLS
GND2LS
21
17
VCC1LS
DESATLS
20
18
GND1
VEE2LS
19
Remark: xxxHS and xxxLS at the end of pin name only indicates an order for description, both drivers are
isolated and could be used as high side or low side without any preference.
GND1
Common ground connection of the input side.
INHS+, INLS+ Non Inverting Driver Input
Positive control signal for the driver output (see Figure 6).
A minimum pulse width is defined to make the IC robust against glitches at IN+. An internal pull-down-resistor
ensures IGBT off-state.
Data Sheet
7
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Pin Configuration and Functionality
INHS–, INLS– Inverting Driver Input
Negative control signal for the driver output (see Figure 6)..
A minimum pulse width is defined to make the IC robust against glitches at INxx–. An internal pull-up-resistor
ensures IGBT off-state.
/RSTHS, /RSTLS Reset Input
Function 1: Enable/shutdown of the input chip (The IGBT is off if /RSTxx = low). A minimum pulse width is
defined to make the IC robust against glitches at /RSTxx.
Function 2: Resets the DESAT-FAULT-state of the chip if /RSTxx is low for a time TRST. An internal pull-upresistor is used to ensure /FLTxx status output.
/FLTHS, /FLTLS Fault Output
Open-drain output to report a desaturation error of the IGBT (/FLTxx is low if desaturation occurs).
RDYHS, RDYLS Ready Status Output
Open-drain output to report the correct operation of the device (RDYxx = high if both chips are above the UVLO
level and the internal chip transmission is faultless).
VCC1HS, VCC1LS Positive Supply
5 V power supply of the input chip
VEE2HS, VEE2LS Negative Supply
Negative power supply pins of the output chip. If no negative supply voltage is available, each pins has to be
connected to its respective GND2xx.
DESATHS, DESATLS Desaturation Detection Input
Monitoring of the IGBT saturation voltage (VCE) to detect desaturation caused by short circuits. If OUT is high,
VCE is above a defined value and a certain blanking time has expired, the desaturation protection is activated
and the IGBT is switched off. The blanking time is adjustable by an external capacitor.
CLAMPHS, CLAMPLS Miller Clamping
Ties the gate voltage to ground after the IGBT has been switched off at a defined voltage to avoid a parasitic
switch-on of the IGBT.During turn-off, the gate voltage is monitored and the clamp output is activated when
the gate voltage goes below VCLAMP_TH.
GND2HS, GND2LS Reference Ground
Reference ground of the output chip.
OUTHS, OUTLS Driver Output
Output pin to drive an IGBT. The voltage is switched between VEE2xx and VCC2xx. In normal operating mode
Vout is controlled by INxx+, INxx- and /RSTxx. During error mode (UVLO, internal error or DESATxx Vout is
driven to VEE2xx independent of the input control signals.
VCC2HS, VCC2LS Positive Supply
Positive power supply pin of the output side.
Data Sheet
8
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Functional Description
4
Functional Description
4.1
Introduction
The 2ED020I12FA is an advanced IGBT dual gate driver that can be also used for driving power MOS devices.
Control and protection functions are included to make possible the design of high reliability systems.
The device consists of two galvanic separated driver. The input can be directly connected to a standard 5 V
DSP or microcontroller with CMOS in/output and the output driver are connected to the high side and low side
switch.
The rail-to-rail driver outputs enables the user to provide easy clamping of the IGBTs gate voltage during short
circuit of the IGBT. So an increase of short circuit current due to the feedback via the Miller capacitance can be
avoided. Further, a rail-to-rail output reduces power dissipation.
The device also includes IGBT desaturation protection with FAULT status outputs.
Two READY status outputs reports if the device is supplied and operates correctly.
4.2
Supply
The driver 2ED020I12FA is designed to support two different supply configurations, bipolar supply and
unipolar supply.
In bipolar supply the driver is typically supplied with a positive voltage of 15V at VCC2 and a negative voltage
of -8V at VEE2, please refer to Figure 3. Negative supply prevents a dynamic turn on due to the additional
charge which is generated from IGBT input capacitance times negative supply voltage. If an appropriate
negative supply voltage is used, connecting CLAMPxx to IGBT gate is redundant and therefore typically not
necessary.
Data Sheet
9
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Functional Description
+5V
2 * 4k7
10R
VCC1HS
100nF
SGND
GND1
INHS
INHS+
INHS-
RDY
FLT
RS
RDYHS
/FLTHS
10R
/RSTHS
VCC1LS
VCC2HS
1k
1µF
DESATHS
10R
OUTHS
CLAMPHS
220pF
GND2HS
1µF
VEE2HS
VCC2LS
100nF
INLS
+15V_2
-8V_2
+15V_1
1k
1µF
INLS+
INLSRDYLS
/FLTLS
/RSTLS
DESATLS
10R
OUTLS
CLAMPLS
220pF
GND2LS
1µF
VEE2LS
-8V_1
2ED020I12FA
Figure 3
Application Example Bipolar Supply
For unipolar supply configuration the driver is typically supplied with a positive voltage of 15V at VCC2.
Erratically dynamic turn on of the IGBT could be prevented with active Miller clamp function, so CLAMP output
is directly connected to IGBT gate, please refer to Figure 4.
Data Sheet
10
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Functional Description
+5V
2 * 4k7
10R
VCC1HS
100nF
SGND
GND1
INHS
INHS+
INHS-
RDY
FLT
RS
RDYHS
/FLTHS
10R
/RSTHS
VCC1LS
VCC2HS
1k
1µF
DESATHS
10R
OUTHS
CLAMPHS
220pF
GND2HS
VEE2HS
VCC2LS
100nF
INLS
+15V_2
+15V_1
1k
1µF
INLS+
INLSRDYLS
/FLTLS
/RSTLS
DESATLS
10R
OUTLS
CLAMPLS
GND2LS
220pF
VEE2LS
2ED020I12FA
Figure 4
Application Example Unipolar Supply
4.3
Internal Protection Features
4.3.1
Undervoltage Lockout (UVLO)
To ensure correct switching of IGBTs the device is equipped with undervoltage lockout for all driver outputs
as well as for input section, please see Figure 8.
If the power supply voltage VVCC1xx of the input section drops below VUVLOL1 a turn-off signal is sent to the output
driver before power-down. The IGBT is switched off and the signals at INxx+ and INxx- are ignored as long as
VVCC1xx reaches the power-up voltage VUVLOH1.
If the power supply voltage VVCC2xx of the output driver goes down below VUVLOL2 the IGBT is switched off and
signals from the input chip are ignored as long as VVCC2xx reaches the power-up voltage VUVLOH2. VEE2xx is not
monitored.
4.3.2
READY Status Output
The READY outputs shows the status of three internal protection features.
•
•
•
UVLO of the input chip
UVLO of the output chip after a short delay
Internal signal transmission after a short delay
It is not necessary to reset the READY signal since its state only depends on the status of the former mentioned
protection signals.
Data Sheet
11
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Functional Description
4.3.3
Watchdog Timer
During normal operation the internal signal transmission is monitored by a watchdog timer. If the
transmission fails for a given time, the IGBT is switched off and the READY output reports an internal error.
4.3.4
Active Shut-Down
The Active Shut-Down feature ensures a safe IGBT off-state if the output chip is not connected to the power
supply, IGBT gate is clamped at OUTxx to VEE2xx.
4.4
Non-Inverting and Inverting Inputs
There are two possible input modes to control the IGBT. At non-inverting mode INxx+ controls the driver
output while INxx- is set to low. At inverting mode INxx- controls the driver output while INxx+ is set to high,
please see Figure 6. A minimum input pulse width is defined to filter occasional glitches.
4.5
Driver Outputs
The output driver sections uses only MOSFETs to provide a rail-to-rail output. This feature permits that tight
control of gate voltage during on-state and short circuit can be maintained as long as the drivers supply is
stable. Due to the low internal voltage drop, switching behavior of the IGBT is predominantly governed by the
gate resistor. Furthermore, it reduces the power to be dissipated by the driver.
4.6
External Protection Features
4.6.1
Desaturation Protection
A desaturation protection ensures the protection of the IGBT at short circuit. When the DESAT voltage goes up
and reaches VDESAT_TH, the output is driven low. Further, the FAULT output is activated, please refer to Figure 7.
A configurable blanking time is used to allow enough time for IGBT saturation. Blanking time is provided by a
highly precise internal current source and an external capacitor.
4.6.2
Active Miller Clamp
In a half bridge configuration the switched off IGBT tends to dynamically turn on during turn on phase of the
opposite IGBT. A Miller clamp allows sinking the Miller current across a low impedance path in this high dV/dt
situation. Therefore in many applications, the use of a negative supply voltage can be avoided.
During turn-off, the gate voltage is monitored and the clamp output is activated when the gate voltage goes
below VCLAMP_TH. The clamp is designed for a Miller current up to ICLAMPL.
4.6.3
Short Circuit Clamping
During short circuit the IGBTs gate voltage tends to rise because of the feedback via the Miller capacitance. An
additional protection circuit connected to OUTxx and CLAMPxx limits this voltage to a value slightly higher
than the supply voltage. A current of maximum 500 mA for 10 μs may be fed back to the supply through one of
this paths. If higher currents are expected or a tighter clamping is desired external Schottky diodes may be
added.
4.7
RESET
The reset inputs have two functions.
Data Sheet
12
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Functional Description
Firstly, /RSTxx is in charge of setting back the FAULT output. If /RSTxx is low longer than a given time, /FLTxx
will be cleared at the rising edge of /RSTxx; otherwise, it will remain unchanged. Moreover, it works as
enable/shutdown of the input logic.
Data Sheet
13
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
5
Electrical Parameters
5.1
Absolute Maximum Ratings
Note:
Absolute maximum ratings are defined as ratings, which when being exceeded may lead to
destruction of the integrated circuit. Unless otherwise noted all parameters refer to GND1. The
specification for all driver signals is valid for HS and LS with out special notice, e.g. IN+ covers INHS+
as well as INLS+. The signals from driver output side are measured with respect to their specific
GND2HS or GND2LS.
Table 2
Absolute Maximum Ratings 1)
Parameter
Symbol
Values
Min.
Max.
Unit
Note
Positive power supply output side
VVCC2
-0.3
20
V
Referenced to GND2
Negative power supply output side
VVEE2
-12
0.3
V
Referenced to GND2
Maximum power supply voltage
output side
(VVCC2 - VVEE2)
Vmax2
–
28
V
–
Gate driver output
VOUT
VVEE2-0.3
VVCC2+0.3
V
–
VVCC2+
VCLPout
V
time< tCLPmax,
IOUT<500 mA (see
Table 9)
Gate driver high output maximum
current
IOUT
–
2.4
A
t = 2 µs
Gate & Clamp driver low output
maximum current
IOUT
–
2.4
A
t = 2 µs
Maximum short circuit clamping
time
tCLP
–
10
μs
ICLAMP/OUT = 500 mA
Positive power supply input side
VVCC1
-0.3
6.5
V
–
Logic input voltages
(IN+,IN-,RST)
VLogicIN
-0.3
VCC1
V
–
6.5
V
–
Opendrain Logic output voltage
(FLT)
VFLT#
-0.3
6.5V
V
–
Opendrain Logic output voltage
(RDY)
VRDY
-0.3
6.5V
V
–
Opendrain Logic output current
(FLT)
IFLT#
–
10
mA
–
Opendrain Logic output current
(RDY)
IRDY
–
10
mA
–
Pin DESAT voltage
VDESAT
-0.3
VVCC2 +0.3
V
Referenced to GND2
Data Sheet
14
+ 0.3
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
Table 2
Absolute Maximum Ratings (cont’d)1)
Parameter
Pin CLAMP voltage
Symbol
VCLAMP
Values
Unit
Note
Min.
Max.
VVEE2-0.3
VVCC2+0.3
V
–
VVEE2-0.3
VVCC2+
VCLPclamp
V
time< tCLPmax,
ICLAMP<500 mA (see
Table 9)
–
Junction temperature
TJ
-40
150
°C
Storage temperature
TS
-55
150
°C
–
mW
2)
@TA = 25°C
@TA = 25°C
@TA = 25°C
Power dissipation, per input part
PD, IN
–
100
Power dissipation, per output part
PD, OUT
–
400
mW
2)
Power dissipation, total
PD, tot
–
1000
mW
2)
2)
Thermal resistance (Input part)
RTHJA,IN
–
375
K/W
@TA = 25°C,
PD, IN_HS+LS = 200 mW,
PD, OUT_HS+LS =
800 mW
Thermal resistance (Output part)
RTHJA,OUT
–
110
K/W
2)
@TA = 25°C,
PD, IN_HS+LS = 200 mW,
PD, OUT_HS+LS =
800 mW
ESD Capability
VESD
–
1
kV
Human Body Model3)
1) Not subject to production test. Absolute maximum Ratings are verified by design / characterization
2) IC power dissipation is derated linearly at 12 mW/°C above 65°C. Thermal performance may change significantly with
layout and heat dissipation of components in close proximity.
3) According to EIA/JESD22-A114-B (discharging a 100 pF capacitor through a 1.5 kΩ series resistor).
Data Sheet
15
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
5.2
Operating Parameters
Note:
Within the operating range the IC operates as described in the functional description. Unless
otherwise noted all parameters refer to GND1. The specification for all driver signals is valid for HS
and LS with out special notice, e.g. IN+ covers INHS+ as well as INLS+. The signals from driver output
side are measured with respect to their specific GND2HS or GND2LS.
Table 3
Operating Parameters
Parameter
Symbol
Values
Min.
Max.
Unit
Note
Positive power supply output side
VVCC2
13
20
V
referenced to
GND2
Negative power supply output side
VVEE2
-12
0
V
referenced to
GND2
Maximum power supply voltage
output side
(VVCC2 - VVEE2)
Vmax2
–
28
V
–
Positive power supply input side
VVCC1
4.5
5.5
V
–
Pin CLAMP voltage
VCLAMP
VVEE2
VVCC2
V
referenced to
GND2
Pin DESAT voltage
VDESAT
0
VVCC2
V
referenced to
GND2
Ambient temperature
TA
-40
125
°C
–
–
50
kV/μs
@ 500 V, 1)
Common mode transient immunity |DVISO/dt|
1) The parameter is not subject to production test - verified by design/characterization
5.3
Recommended Operating Parameters
Note:
Unless otherwise noted all parameters refer to GND1. The specification for all driver signals is valid
for HS and LS with out special notice, e.g. IN+ covers INHS+ as well as INLS+. The signals from driver
output side are measured with respect to their specific GND2HS or GND2LS.
Table 4
Recommended Operating Parameters
Parameter
Symbol
Value
Unit
Note / Test Condition
Positive power supply output side
VVCC2
15
V
referenced to GND2
Negative power supply output side
VVEE2
-8
V
referenced to GND2
Positive power supply input side
VVCC1
5
V
referenced to GND1
Data Sheet
16
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
5.4
Electrical Characteristics
Note:
The electrical characteristics involve the spread of values for the supply voltages, load and junction
temperatures given below. Typical values represent the median values, which are related to
production processes at T = 25°C. Unless otherwise noted all voltages are given with respect to GND.
The specification for all driver signals is valid for HS and LS with out special notice, e.g. IN+ covers
INHS+ as well as INLS+. The signals from driver output side are measured with respect to their
specific GND2HS or GND2LS.
5.4.1
Voltage Supply
Table 5
Voltage Supply
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note
UVLO Threshold Input
Chip
VUVLOH1
–
4.1
4.3
V
–
VUVLOL1
3.5
3.8
–
V
–
UVLO Hysteresis Input
Chip (VUVLOH1 - VUVLOL1)
VHYS1
0.15
–
–
V
–
UVLO Threshold Output VUVLOH2
Chip
VUVLOL2
–
12.0
12.6
V
–
10.4
11.0
–
V
–
UVLO Hysteresis Output VHYS2
Chip (VUVLOH1 - VUVLOL1)
0.7
0.9
–
V
–
Quiescent Current Input IQ1
Chip
–
7
9
mA
VVCC1 = 5 V
IN+ = High,
IN- = Low
=>OUT = High,
RDY = High,
/FLT = High
Quiescent Current
Output Chip
–
4
6
mA
VVCC2 = 15 V
VVEE2 = -8 V
IN+ = High,
IN- = Low
=>OUT = High,
RDY = High,
/FLT = High
Data Sheet
IQ2
17
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
5.4.2
Logic Input and Output
Table 6
Logic Input and Output
Parameter
Symbol
Values
Unit
Note
Min.
Typ.
Max.
IN+,IN-, RST Low Input Voltage VIN+L,
VIN-L,
VRSTL#
0
–
1.5
V
–
IN+,IN-, RST High Input Voltage VIN+H,
VIN-H,
VRSTH#
3.5
–
VVCC1
V
–
IN-, RST Input Current
IIN-, IRST#
–
100
400
μA
VIN- = GND1
VRST# = GND1
IN+ Input Current
IIN+,
–
100
400
μA
VIN+ = VCC1
RDY,FLT Pull Up Current
IPRDY, IPFLT#
–
100
400
μA
VRDY = GND1
VFLT# = GND1
Input Pulse Suppression IN+,
IN-
TMININ+,
TMININ-
30
40
–
ns
Input Pulse Suppression
RSTfor ENABLE/SHUTDOWN
TMINRST
30
40
–
ns
–
Pulse Width RST
for Resetting FLT
TRST
800
–
–
ns
–
FLT Low Voltage
VFLTL
–
–
300
mV
ISINK(FLT#) = 5 mA
RDY Low Voltage
VRDYL
–
–
300
mV
ISINK(RDY) = 5 mA
Data Sheet
18
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
5.4.3
Gate Driver
Table 7
Gate Driver
Parameter
Symbol
High Level Output
Voltage
Values
Unit
Note
Min.
Typ.
Max.
VOUTH1
VCC2 -1.2
VCC2 -0.8
–
V
IOUTH = -20 mA
VOUTH2
VCC2 -2.5
VCC2 -2.0
–
V
IOUTH = -200 mA
VOUTH3
VCC2 -9
VCC2 -5
–
V
IOUTH = -1 A
VCC2 -10
–
V
IOUTH = -2 A 1)
VOUTH4
High Level Output Peak IOUTH
Current
-1.5
-2.0
–
A
IN+ = High,
IN- = Low;
OUT = High
Low Level Output
Voltage
VOUTL1
–
VVEE2 +0.04
VVEE2+0.09
V
IOUTL = 20 mA
VOUTL2
–
VVEE2 +0.3
VVEE2+0.85
V
IOUTL = 200 mA
VOUTL3
–
VVEE2 +2.1
VVEE2+5
V
IOUTL = 1 A
VOUTL4
–
VVEE2 +7
–
V
IOUTL = 2 A1)
1.5
2.0
–
A
IN+ = Low,
IN- = Low;
OUT = Low,
VVCC2 = 15 V,
VVEE2 = -8 V
Low Level Output Peak IOUTL
Current
1) Not subject to production test. Absolute maximum Ratings are verified by design / characterization
5.4.4
Active Miller Clamp
Table 8
Active Miller Clamp
Parameter
Symbol
Values
Unit
Note
Min.
Typ.
Max.
VCLAMPL1
–
VVEE2+0.03
VVEE2 +0.08
V
ICLAMP = 20 mA
VCLAMPL2
–
VVEE2+0.3
VVEE2 +0.8
V
ICLAMP = 200 mA
VCLAMPL3
–
VVEE2+1.9
VVEE2 +4.8
V
ICLAMP = 1 A
Low Level Clamp
Current
ICLAMPL
2
–
–
A
1)
Clamp Threshold
Voltage
VCLAMP_TH
1.6
2.1
2.4
V
Related to VEE2
Low Level Clamp
Voltage
1) The parameter is not subject to production test - verified by design/characterization
Data Sheet
19
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
5.4.5
Short Circuit Clamping
Table 9
Short Circuit Clamping
Parameter
Symbol
Values
Unit
Note
Min.
Typ.
Max.
Clamping voltage (OUT) VCLPout
(VOUT - VVCC2)
–
0.8
1.3
V
IN+ = High,
IN- = Low,
OUT = High
IOUT = 500 mA
pulse test,
tCLPmax = 10 μs)
Clamping voltage
(CLAMP) (VVCLAMP-VVCC2)
–
1.3
–
V
IN+ = High, IN- = Low,
OUT = High
ICLAMP = 500 mA
(pulse test,
tCLPmax = 10 μs)1)
–
0.7
1.1
V
IN+ = High, IN- = Low,
OUT = High
ICLAMP = 20 mA
VCLPclamp
1) Not subject to production test. Absolute maximum Ratings are verified by design / characterization
5.4.6
Dynamic Characteristics
Table 10
Dynamic Characteristics1)
Parameter
Symbol
Values
Unit
Note
CLOAD = 100 pF
VIN+ = 50%,
VOUT=50% @ 25°C
Min.
Typ.
Max.
Input IN to output propa- TPDON
gation delay ON
145
170
195
ns
Input IN to output propa- TPDOFF
gation delay OFF
145
165
190
ns
Input IN to output propa- TPDISTO
gation delay distortion
(TPDOFF - TPDON)
-35
-5
25
ns
Input IN to output propa- TPDONt
gation delay ON
variation due to temp
160
190
220
ns
Input IN to output propa- TPDOFFt
gation delay OFF
variation due to temp
165
195
225
ns
Input IN to output propa- TPDISTOt
gation delay distortion
(TPDOFF - TPDON)
-25
5
35
ns
Data Sheet
20
CLOAD = 100 pF
VIN+ = 50%,
VOUT = 50% @ 125°C
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
Table 10
Parameter
Dynamic Characteristics1) (cont’d)
Symbol
Values
Unit
Note
CLOAD = 100 pF
VIN+ = 50%,
VOUT = 50% @ -40°C
Min.
Typ.
Max.
Input IN to output propa- TPDONt
gation delay ON
variation due to temp
135
165
195
ns
Input IN to output propa- TPDOFFt
gation delay OFF
variation due to temp
125
155
185
ns
Input IN to output propa- TPDISTOt
gation delay distortion
(TPDOFF - TPDON)
-40
-10
20
ns
Rise Time
10
30
60
ns
CLOAD = 1 nF
VL 10%, VH 90%
200
400
800
ns
CLOAD = 34 nF
VL 10%, VH 90%
10
50
90
ns
CLOAD = 1 nF
VL 10%, VH 90%
200
350
600
ns
CLOAD = 34 nF
VL 10%, VH 90%
Fall Time
TRISE
TFALL
1) Measured under the following conditions: VVCC1=5V, VVEE2=-8V, VVCC2=15V
Data Sheet
21
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
5.4.7
Desaturation Protection
Table 11
Desaturation Protection
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note
Blanking Capacitor
Charge Current
IDESATC
450
500
550
μA
VVCC2 =15 V,
VVEE2=- 8 V
VDESAT = 2 V
Blanking Capacitor
Discharge Current
IDESATD
9.0
14
–
mA
VVCC2 =15 V,
VVEE2 = -8 V
VDESAT = 6 V
Desaturation
Reference Level
VDESAT_TH
8.3
9
9.5
V
VVCC2 = 15 V
Desaturation Filter
Time
TDESATfilter
–
250
–
ns
VVCC2 = 15 V,
VVEE2 = -8 V
VDESAT = 9 V1)
Desaturation Sense to
OUT Low Delay
TDESATOUT
–
350
430
ns
VOUT = 90%
CLOAD = 1 nF
Desaturation Sense to
FLT Low Delay
TDESATFLT
–
–
2.25
μs
VFLT# = 10%;
IFLT # = 5 mA
Desaturation Low
Voltage
VDESATL
0.4
0.6
0.95
V
IN+ = Low, IN- = Low,
OUT = Low
–
400
–
ns
1)
Leading edge blanking TDESATleb
1) Not subject to production test. This parameter is verified by design / characterization
5.4.8
Active Shut Down
Table 12
Active Shut Down
Parameter
Symbol
Active Shut Down Voltage VACTSD
Data Sheet
Values
Min.
Typ.
Max.
–
–
2.0
22
Unit
Note
V
IOUT = -200 mA,
VCC2 open,
referenced to VEE2
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Insulation Characteristics
6
Insulation Characteristics
Insulation characteristics are guaranteed only within the safety maximum ratings which must be ensured by
protective circuits in application. Surface mount classification is class A in accordance with CECCOO802.
This coupler is suitable for “basic insulation” only within the safety ratings. Compliance with the safety ratings
shall be ensured by means of suitable protective circuits.
6.1
Certified according to DIN EN 60747-5-2 (VDE 0884 Teil 2): 2003-01. Basic Insulation
Table 13
According to DIN EN 60747-5-2
Description
Symbol
Characteristics
Unit
Installation classification per EN 60664-1, Table 1
for rated mains voltage ≤ 150 VRMS
for rated mains voltage ≤ 300 VRMS
for rated mains voltage ≤ 600 VRMS
I-IV
I-III
I-II
Climatic Classification
55/125/21
–
Pollution Degree (EN 60664-1)
2
–
–
Minimum External Clearance between input and driver
section
CLR
8.2
mm
Minimum External Creepage between input and driver
section
CPG
8.2
mm
Minimum External Clearance between HS- and LS-driver
output
2.75
mm
Minimum External Creepage between HS- and LS-driver
output
2.85
mm
Minimum Comparative Tracking Index
CTI
175
Maximum Repetitive Insulation Voltage
VIORM
1420
VPEAK
Highest Allowable Overvoltage
VIOTM
6000
VPEAK
Maximum Surge Insulation Voltage
VIOSM
6000
V
Description
Symbol
Characteristics
Unit
Insulation Withstand Voltage / 1 min
VISO
3750
Vrms
Insulation Test Voltage / 1 s
VISO
4500
Vrms
6.2
Recognized under UL 1577
Table 14
Recognized under UL 1577
6.3
Reliability
For Qualification Report please contact your local Infineon Technologies office.
Data Sheet
23
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Timing Diagrams
7
Timing Diagrams
50%
IN+
90%
50%
10%
OUT
TPDON
Figure 5
TRISE
TPDOFF
TFALL
Propagation Delay, Rise and Fall Time
IN+
IN/RST
OUT
Figure 6
Data Sheet
Typical Switching Behavior
24
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Timing Diagrams
IN+
TPDON
TPDON
OUT
TPDOF F
TDE SAT fil te r
TDE SAT OUT
VDE SAT_T H
TDE SAT leb
TDE SAT leb
DESAT
/FLT
TDE SAT FLT
/RST
>TRST min
Figure 7
DESAT Switch-Off Behavior
ESD diode conduction
IN+
VUVLOH1
VUVLOL1
VCC1
VUVLOH2
VUVLOL2
VCC2
OUT
RDY
/FLT
/RST
Figure 8
Data Sheet
UVLO Behavior
25
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Package Outlines
8
Package Outlines
FOOTPRINT
DIM
A
A1
A2
b
c
D
E
E1
e
N
L
h
T
T1
ccc
ddd
F1
F2
F3
Figure 9
Data Sheet
MILLIMETERS
MAX
MIN
2.65
0.10
0.20
2.45
2.25
0.25
0.41
0.23
0.32
12.60
12.80
10.00
10.60
7.40
7.60
0.65 BSC
32
0.50
0.90
0.25
0.45
0°
8°
0°
8°
0.10
0.17
9.73
0.45
1.67
INCHES
MAX
0.104
0.008
0.096
MIN
0.004
0.089
0.010
0.009
0.496
0.394
0.291
0.016
0.013
0.504
DOCUMENT NO.
Z8B00159298
SCALE
0
1.0
0
1.0
0.417
0.299
0.026 BSC
32
0.020
0.010
0°
0°
2mm
EUROPEAN PROJECTION
0.035
0.018
8°
8°
0.004
0.007
0.383
0.018
0.066
ISSUE DATE
25.03.2011
REVISION
02
PG-DSO-36 (Plastic (Green) Dual Small Outline Package)
26
Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Revision History
Page or Item
Subjects (major changes since previous revision)
Rev 3.1, 2016-04-05
Rev 3.0, 2015-11-27
All
Update latest template
Page 7
Removed Figure 1 “Typical Application”.
Page 5
Updated Figure 1.
Page 7
Updated INHS+ and INLS+ description.
Page 8
Updated INHS- and INLS- description.
Page 14
Updated Table 2.
Page 16
Updated Table 3.
Page 18
Updated Table 6.
Page 19
Updated Table 7 (added footnote).
Page 20
Updated Table 9 (added footnote).
Trademarks of Infineon Technologies AG
AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™,
CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™,
EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™, ModSTACK™,
my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™, PrimePACK™, PrimeSTACK™, PRO-SIL™,
PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™,
SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™.
Other Trademarks
Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™,
REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development
partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble
Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG. FLEXGO™ of Microsoft
Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™
of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of
INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim
Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. Mifare™ of NXP. MIPI™ of
MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO.,
MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc.
Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius
Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of
Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of
Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™,
PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND
RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited.
Last Trademarks Update 2010-10-26
Data Sheet
27
Rev. 3.1
2016-04-05
Please read the Important Notice and Warnings at the end of this document
Trademarks of Infineon Technologies AG
µHVIC™, µIPM™, µPFC™, AU-ConvertIR™, AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolDP™, CoolGaN™, COOLiR™, CoolMOS™, CoolSET™, CoolSiC™,
DAVE™, DI-POL™, DirectFET™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, GaNpowIR™,
HEXFET™, HITFET™, HybridPACK™, iMOTION™, IRAM™, ISOFACE™, IsoPACK™, LEDrivIR™, LITIX™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OPTIGA™,
OptiMOS™, ORIGA™, PowIRaudio™, PowIRStage™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, SmartLEWIS™, SOLID FLASH™,
SPOC™, StrongIRFET™, SupIRBuck™, TEMPFET™, TRENCHSTOP™, TriCore™, UHVIC™, XHP™, XMC™.
Trademarks updated November 2015
Other Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2016-04-05
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2016 Infineon Technologies AG.
All Rights Reserved.
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