Data Sheet

DISCRETE SEMICONDUCTORS
DATA SHEET
book, halfpage
M3D087
BSP89
N-channel enhancement mode
vertical D-MOS transistor
Product specification
Supersedes data of 1997 Jun 23
2001 May 18
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
FEATURES
BSP89
QUICK REFERENCE DATA
• Direct interface to C-MOS, TTL,
etc.
• High-speed switching
• No secondary breakdown.
DESCRIPTION
SYMBOL
PARAMETER
MAX.
UNIT
VDS
drain-source voltage (DC)
240
V
VGSth
gate-source threshold voltage
2
V
ID
drain current (DC)
375
mA
RDSon
drain-source on-state resistance
5
Ω
N-channel enhancement mode
vertical D-MOS transistor in a
SOT223 package, intended for use as
a surface-mounted device in line
current interrupters in telephone sets
and for application in relay, high
speed and line transformer drivers.
4
handbook, halfpage
d
g
PINNING - SOT223
1
PIN
DESCRIPTION
2
Top view
3
s
MAM109
Code: BSP89
1
gate
2
drain
3
source
4
drain
Fig.1 Simplified outline (SOT223) and symbol.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
−
240
V
−
±20
V
−
375
mA
−
1.5
A
−
1.5
W
storage temperature
−55
+150
°C
junction temperature
−
150
°C
VDS
drain-source voltage (DC)
VGSO
gate-source voltage (DC)
ID
drain current (DC)
IDM
peak drain current
Ptot
total power dissipation
Tstg
Tj
open drain
Tamb ≤ 25 °C; note 1
Note
1. Transistor mounted on an epoxy printed circuit board, 40 x 40 x 1.5 mm, mounting pad for the drain tab minimum
6 cm2.
2001 May 18
2
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSP89
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
VALUE
UNIT
83.3
K/W
thermal resistance from junction to ambient; note 1
Note
1. Transistor mounted on an epoxy printed circuit board, 40 x 40 x 1.5 mm, mounting pad for the drain tab minimum
6 cm2.
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V(BR)DSS
drain-source breakdown voltage
ID = 10 µA; VGS = 0
240
−
−
V
IDSS
drain-source leakage current
VDS = 60 V; VGS = 0
−
−
200
nA
IGSS
gate-source leakage current
VGS = ±20 V; VDS = 0
−
−
100
nA
VGSth
gate-source threshold voltage
ID = 1 mA; VGS = VDS
0.8
−
2
V
RDSon
drain-source on-state resistance
ID = 340 mA; VGS = 10 V
−
2.8
5
Ω
ID = 340 mA; VGS = 4.5 V
−
−
7.5
Ω
 Yfs 
transfer admittance
ID = 340 mA; VDS = 25 V
140
600
−
mS
Ciss
input capacitance
VDS = 25 V; VGS = 0; f = 1 MHz
−
100
120
pF
Coss
output capacitance
VDS = 25 V; VGS = 0; f = 1 MHz
−
20
30
pF
Crss
reverse transfer capacitance
VDS = 25 V; VGS = 0; f = 1 MHz
−
10
15
pF
Switching times (see Figs 3 and 4)
ton
turn-on time
ID = 250 mA; VDD = 50 V;
VGS = 0 to 10 V
−
6
10
ns
toff
turn-off time
ID = 250 mA; VDD = 50 V;
VGS = 0 to 10 V
−
47
60
ns
2001 May 18
3
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSP89
MBB693
2
handbook, halfpage
Ptot
(W)
1.6
VDD = 50 V
handbook, halfpage
1.2
0.8
10 V
0V
0.4
ID
50 Ω
MBB691
0
0
50
100
200
150
Tamb (°C)
Fig.2 Power derating curve.
handbook, halfpage
Fig.3 Switching times test circuit.
90 %
INPUT
10 %
90 %
OUTPUT
10 %
ton
toff
MBB692
Fig.4 Input and output waveforms.
2001 May 18
4
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSP89
PACKAGE OUTLINE
Plastic surface mounted package; collector pad for good heat transfer; 4 leads
D
SOT223
E
B
A
X
c
y
HE
v M A
b1
4
Q
A
A1
1
2
3
Lp
bp
e1
w M B
detail X
e
0
2
4 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
bp
b1
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.8
1.5
0.10
0.01
0.80
0.60
3.1
2.9
0.32
0.22
6.7
6.3
3.7
3.3
4.6
2.3
7.3
6.7
1.1
0.7
0.95
0.85
0.2
0.1
0.1
OUTLINE
VERSION
SOT223
2001 May 18
REFERENCES
IEC
JEDEC
EIAJ
SC-73
5
EUROPEAN
PROJECTION
ISSUE DATE
97-02-28
99-09-13
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSP89
DATA SHEET STATUS
DATA SHEET STATUS(1)
PRODUCT
STATUS(2)
DEFINITIONS
Objective data
Development
This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data
Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DEFINITIONS
DISCLAIMERS
Short-form specification  The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Life support applications  These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2001 May 18
6
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSP89
NOTES
2001 May 18
7
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SCA 72
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Printed in The Netherlands
613510/03/pp8
Date of release: 2001
May 18
Document order number:
9397 750 08248
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