LV8729V Bi-CMOS LSI PWM Constant-Current Control Stepper Motor Driver Application Note http://onsemi.com Overview The LV8729V is a PWM current-controlled micro step bipolar stepper motor driver. This driver can do eight ways of micro step resolution of 1/128 step from Full step, and can drive simply by the CLK input. Function • Low voltage operation (2.5V min) • Low saturation voltage (upper transistor + lower transistor residual voltage; 0.40V typ at 400mA) • Parallel connection (Upper transistor + lower transistor residual voltage; 0.5V typ at 800mA) • Separate logic power supply and motor power supply • Brake function • Spark killer diodes built in • Thermal shutdown circuit built in • Compact package (14-pin MFP) Typical Applications • Security camera • Projector • Stage Lighting • Industrial Printer • Compact package (14-pin MFP) Semiconductor Components Industries, LLC, 2013 December, 2013 1/34 LV8729V Application Note OUT2B 23 22 SGND NC 26 19 DOWN OUT2B 24 NC 27 18 EMO 21 VREF VM2 28 17 NC PGND2 25 VM2 29 16 OSC2 20 MO RF2 30 OUT2A 32 13 FR 15 OSC1 OUT2A 33 12 NC RF2 31 OUT1B 34 11 RST 14 STP OUT1B 35 10 OE MD3 9 RF1 36 MD2 8 RF1 37 MD1 7 VM1 38 ST 6 VM1 39 VREG1 5 NC 40 NC 4 NC 41 VREG2 3 PGND 42 NC 2 OUT1A 43 VM 1 OUT1A 44 Pin Assignment Top view Package Dimensions unit : mm (typ) 3333 TOP VIEW SIDE VIEW BOTTOM VIEW 15.0 44 23 0.5 (3.5) 7.6 5.6 (4.7) 0.65 0.22 22 0.2 1.7MAX 1 (0.68) 0.1 (1.5) SIDE VIEW SANYO : SSOP44K(275mil) Caution: The package dimension is a reference value, which is not a guaranteed value. Recommended Soldering Footprint Reference symbol eE e b3 l1 X Y SSOP44K(275mil) 7.00 0.65 0.32 1.00 (4.7) (3.5) (Unit:mm) 2/34 LV8729V Application Note Block Diagram VREG2 RF1 OUT1A OUT1B VM1 VM2 OUT2A OUT2B RF2 VM Regulator 2 Output pre stage Output pre stage Output pre stage Output pre stage PGND1 PGND2 MO VREG1 Output control logic Regulator 1 DOWN VREF Current select circuit Current select circuit EMO Oscllator SGND Decay Mode Setting circuit TSD ISD ST OSC2 MD1 MD2 MD3 FR STP RST OE OSC1 3/34 LV8729V Application Note Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Maximum supply voltage VM max 36 V Maximum output current IO max 1.8 A Maximum logic input voltage VIN max 6 V Maximum VREF input voltage VREF max 6 V Maximum MO input voltage VMO max 6 V Maximum DOWN input voltage VDOWN max 6 V Allowable power dissipation Pd max 3.85 W Operating temperature Topr -30 to +85 °C Storage temperature Tstg -55 to +150 °C * * Specified circuit board: 90.0mm×90.0mm×1.6mm, glass epoxy 2-layer board, with backside mounting Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time. Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Recommended Operating Conditions at Ta = 25°C Parameter Symbol Supply voltage range VM Logic input voltage VREF input voltage range Conditions Ratings min ` typ Unit max 9 32 V VIN 0 5 V VREF 0 3 V Electrical Characteristics at Ta = 25°C, VM = 24V, VREF = 1.5V Parameter Symbol Conditions Ratings min typ Unit max Standby mode current drain IMst ST = “L” 70 100 μA Current drain IM ST = “H”, OE = “H”, no load 3.3 4.6 mA Thermal shutdown temperature TSD Design guarantee 180 200 °C Thermal hysteresis width ΔTSD Design guarantee Logic pin input current IINL Logic high-level input voltage Logic low-level input voltage IINH VINH VINL VIN = 0.8V VIN = 5V Chopping frequency Fch 70 OSC1 pin charge/discharge current Iosc1 7 Chopping oscillation circuit Vtup1 threshold voltage Vtdown1 °C 40 3 8 15 μA 30 50 70 μA 0.8 V 100 130 kHz 10 13 μA 0.8 1 1.2 V 0.3 0.5 0.7 V 40 100 mV 2.0 Cosc1 = 100pF VREF pin input voltage Iref VREF = 1.5V DOWN output residual voltage Idown = 1mA MO pin residual voltage VO1DOWN VO1MO Imo = 1mA Hold current switching frequency Fdown Cosc2 = 1500pF Hold current switching frequency threshold voltage V μA -0.5 40 100 mV 1.12 1.6 2.08 Hz Vtup2 0.8 1 1.2 V Vtdown2 0.3 0.5 0.7 V 4.7 5 5.3 V 18 19 20 V 0.35 0.455 Ω 0.3 0.39 Ω 50 μA 1 1.4 V 0.3 0.315 V VREG1 output voltage Vreg1 VREG2 output voltage Vreg2 Output on-resistance Ronu VM=24V IO = 1.8A, high-side ON resistance Rond IO = 1.8A, low-side ON resistance Diode forward voltage IOleak VD VM = 36V ID = -1.8A Current setting reference voltage VRF VREF = 1.5V, Current ratio 100% Output leakage current 150 0.285 4/34 LV8729V Application Note 4.0 90 80 3.5 3.0 70 60 IM (mA) IMst (µA) 100 50 40 30 20 2.5 2.0 1.5 1.0 0.5 10 0 0.0 8 8 10 12 14 16 18 20 22 24 26 28 30 32 VM (V) VM (V) Figure2 Current Drain vs VM Voltage Figure1 Standby Mode Current Drain vs VM Voltage 70 ‐10 60 ‐11 ‐12 ‐13 Iref (nA) IIN (µA) 50 40 30 ‐14 ‐15 ‐16 20 ‐17 10 ‐18 0 ‐19 0 1 2 3 4 0.0 5 5 25 4 20 Vreg2 (V) 30 1.5 2.0 2.5 3.0 15 2 10 1 5 0 1.0 Figure4 VREF Pin Input Current vs VREF Voltage (VM=24V) 6 3 0.5 VREF (V) VIN (V) Figure3 Logic Pin Input Current vs VIN Voltage (VM=24V) Vreg1 (V) 10 12 14 16 18 20 22 24 26 28 30 32 0 8 10 12 14 16 18 20 22 24 26 28 30 32 VM (V) Figure5 VREG1 Output Voltage vs VM Voltage 8 10 12 14 16 18 20 22 24 26 28 30 32 VM (V) Figure6 VREG2 Output Voltage vs VM Voltage 5/34 0.8 0.8 0.7 0.7 0.6 0.6 0.5 0.5 Ron (Ω) Ron (Ω) LV8729V Application Note 0.4 0.3 0.2 0.4 0.3 Ronu Rond Ronu+Rond 0.1 0.0 0 0.2 0.4 0.6 0.8 1 Iout (A) 1.2 1.4 1.6 -30 1.0 1.2 0.8 Ioleak (µA) 1.0 0.4 0 30 60 TEMPERATURE (˚C) 90 120 Figure8 Output on Resistance vs Temperature (VM=24V) 1.4 0.6 Ronu+Rond 0.0 1.8 0.8 Rond 0.1 Figure7 Output on Resistance vs Output Current (VM=24V) VD (V) Ronu 0.2 0.6 0.4 0.2 0.0 0.2 0.0 ‐0.2 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 ID (A) Figure9 Diode Foward Voltage vs Diode Current 8 10 12 14 16 18 20 22 24 26 28 30 32 VM (V) Figure10 Output Leakage Current vs VM Voltage 6/34 LV8729V Application Note Pin Functions Pin No. Pin Name Pin Function 7 MD1 Excitation mode switching pin 8 MD2 Excitation mode switching pin 9 MD3 Excitation mode switching pin 10 OE Output enable signal input pin 11 RST Reset signal input pin 13 FR Forward / Reverse signal input pin 14 STP Step clock pulse signal input pin Equivalent Circuit VREG1 GND 6 ST Chip enable pin. VREG1 GND 23, 24 OUT2B Channel 2 OUTB output pin. 25 PGND2 Channel 2 Power system ground 28, 29 VM2 Channel 2 motor power supply 30, 31 RF2 32, 33 OUT2A Channel 2 OUTA output pin. 34, 35 OUT1B Channel 1 OUTB output pin. 36, 37 RF1 Channel 1 current-sense resistor 38, 39 Channel 1 motor power supply pin. 42 VM1 PGND1 43, 44 OUT1A Channel 1 OUTA output pin. 38 39 28 29 connection pin. Channel 2 current-sense resistor connection pin. 34 35 23 24 43 44 32 33 connection pin. Channel 1 Power system ground 25 42 36 37 30 31 GND 21 VREF Constant-current control reference voltage input pin. VREG1 GND Continued on next page. 7/34 LV8729V Application Note Continued from preceding page. Pin No. 3 Pin Name VREG2 Pin Function Internal regulator capacitor connection pin. Equivalent Circuit VM GND 5 VREG1 Internal regulator capacitor connection pin. VM GND 18 EMO Over-current detection alarm output pin. 19 DOWN Holding current output pin. 20 MO Position detecting monitor pin. VREG1 GND 15 OSC1 Copping frequency setting capacitor connection pin. 16 OSC2 VREG5 Holding current detection time setting capacitor connection pin. GND 8/34 LV8729V Application Note Reference describing operation (1) Stand-by function When ST pin is at low levels, the IC enters stand-by mode, all logic is reset and output is turned OFF. When ST pin is at high levels, the stand-by mode is released. (2) STEP pin function STEP input advances electrical angle at every rising edge (advances step by step) . Input ST Low Operating mode STP * Standby mode High Excitation step proceeds High Excitation step is kept STEP input MIN pulse width (common in H/L): 500ns (MAX input frequency: 1MHz) However, constant current control is performed by PWM during chopping period, which is set by the capacitor connected between OSC1 and GND. You need to perform chopping more than once per step. For this reason, for the actual STEP frequency, you need to take chopping frequency and chopping count into consideration. For example, if chopping frequency is 50kHz (20μs) and chopping is performed twice per step, the maximum STEP frequency is obtained as follows: f = 1/(20μs×2) = 25kHz. (3) Input timing Figure 11. Input timing chart TstepH/TstepL : Clock H/L pulse width (min 500ns) Tds : Data set-up time (min 500ns) Tdh : Data hold time (min 500ns) (4) Excitation setting method Set the micro step resolution setting as shown in the following table by setting MD1 pin, MD2 pin and MD3 pin. Input Initial position MD3 MD2 MD1 Micro step resolution Excitation mode Low Low Low Full Step 1ch current 2ch current 2-phase 100% -100% Low Low High Half Step 1-2 phase 100% 0% Low High Low Quarter Step W1-2 phase 100% 0% Low High High 1/8 Step 2W1-2 phase 100% 0% High Low Low 1/16 Step 4W1-2 phase 100% 0% High Low High 1/32 Step 8W1-2 phase 100% 0% High High Low 1/64 Step 16W1-2 phase 100% 0% High High High 1/128 Step 32W1-2 phase 100% 0% The initial position is also the default state at start-up and excitation position at counter-reset in each Micro step resolution. 9/34 LV8729V Application Note (5) Position detection monitoring function The MO position detection monitoring pin is of an open drain type. When the excitation position is in the initial position, the MO output is placed in the ON state. (Refer to "Examples of current waveforms in each of the excitation modes.") (6) Output current setting Output current is set shown below by the VREF pin (applied voltage) and a resistance value between RF1 (2) pin and GND. IOUT = (VREF / 5) / RF1 (2) resistance * The setting value above is a 100% output current in each micro step resolution. (Example) When VREF = 1.1V and RF1 (2) resistance is 0.22Ω, the setting is shown below. IOUT = (1.1V / 5) / 0.22Ω = 1.0A If VREF is open or the setting is out of the recommendation operating range, output current will increase and you cannot set constant current under normal condition. Hence, make sure that VREF is set in accordance with the specification. However, if current control is not performed (if the IC is used without saturation drive or current limit) make sure that the setting is as follows: VREF=5V or VREF=VREG1 (7) Output enable function When the OE pin is set Low, the output is forced OFF and goes to high impedance. However, the internal logic circuits are operating, so the excitation position proceeds when the STP is input. Therefore, when OE pin is returned to High, the output level conforms to the excitation position proceeded by the STP input. OE High Low Operating mode Output ON Output OFF Figure 12. Output enable function timing chart 10/34 LV8729V Application Note (8) Reset function When the RST pin is set Low, the output goes to initial mode and excitation position is fixed in the initial position for STP pin and FR pin input. MO pin outputs at low levels at the initial position. (Open drain connection) RST High Low Operating mode Normal operation Reset state Figure 13. Reset function timing chart (9) Forward / reverse switching function FR Operating mode Low Clockwise (CW) High Counter-clockwise (CCW) FR CW mode CCW mode CW mode STEP Excitation position (1) (2) (3) (4) (5) (6) (5) (4) (3) (4) (5) 1ch output 2ch output Figure 14.Forward/Reverse switching function timing chart The internal D/A converter proceeds by a bit on the rising edge of the step signal input to the STP pin. In addition, CW and CCW mode are switched by FR pin setting. In CW mode, the channel 2 current phase is delayed by 90° relative to the channel 1 current. In CCW mode, the channel 2 current phase is advanced by 90° relative to the channel 1 current. 11/34 LV8729V Application Note (10)EMO, DOWN output pin The output pin is open -drain connection. When it becomes prescribed, it turns on, and each pin outputs the Low level. Pin state EMO DOWN Low At detection of over-current Holding current state OFF Normal state Normal state (11)Chopping frequency setting function Chopping frequency is set as shown below by a capacitor between OSC1 pin and GND. Fcp = 1 / (Cosc1 / 10 х 10-6) (Hz) (Example) When Cosc1 = 180pF, the chopping frequency is shown below. Fcp = 1 / (180 х 10-12 / 10 х 10-6) = 55.5(kHz) The higher the chopping frequency is, the greater the output switching loss becomes. As a result, heat generation issue arises. The lower the chopping frequency is, the lesser the heat generation becomes. However, current ripple occurs. Since noise increases when switching of chopping takes place, you need to adjust frequency with the influence to the other devices into consideration. The frequency range should be between 40kHz and 125kHz. (12)Open-drain pin for switching holding current The output pin is an open-drain connection. This pin is turned ON when no rising edge of STP between the input signals while a period determined by a capacitor between OSC2 and GND, and outputs at low levels. The open-drain output in once turned ON, is turned OFF at the next rising edge of STP. Holding current switching time (Tdown) is set as shown below by a capacitor between OSC2 pin and GND. Tdown = Cosc2 х 0.4 х 109 (s) (Example) When Cosc2 = 1500pF, the holding current switching time is shown below. Tdown = 1500pF х 0.4 х 109 = 0.6 (s) 12/34 LV8729V Application Note (13)Output current vector locus (one step is normalized to 90 degrees) Full-step Figure 15.Output current vector Current setting ratio in each micro step resolution STEP θ0 θ1 θ2 θ3 θ4 θ5 θ6 θ7 θ8 θ9 θ10 θ11 θ12 θ13 θ14 θ15 θ16 θ17 θ18 θ19 θ20 θ21 θ22 θ23 θ24 θ25 1/128 (%) 1ch 100 100 100 100 100 100 100 100 100 99 99 99 99 99 99 98 98 98 98 97 97 97 96 96 96 95 1/64 (%) 2ch 0 1 2 4 5 6 7 9 10 11 12 13 15 16 17 18 20 21 22 23 24 25 27 28 29 30 1/32 (%) 1ch 100 2ch 0 100 2 100 5 100 7 100 10 99 12 99 15 99 17 98 20 98 22 97 24 96 27 96 29 1/16 (%) 1ch 100 2ch 0 100 5 100 10 99 15 98 20 97 24 96 29 1/8 (%) 1ch 100 2ch 0 100 10 98 20 96 29 Quarter (%) 1ch 100 2ch 0 98 20 1ch 100 2ch 0 Half (%) 1ch 100 Full (%) 2ch 0 1ch 2ch Continued on next page. 13/34 LV8729V Application Note Continued from preceding page. STEP θ26 θ27 θ28 θ29 θ30 θ31 θ32 θ33 θ34 θ35 θ36 θ37 θ38 θ39 θ40 θ41 θ42 θ43 θ44 θ45 θ46 θ47 θ48 θ49 θ50 θ51 θ52 θ53 θ54 θ55 θ56 θ57 θ58 θ59 θ60 θ61 θ62 θ63 θ64 θ65 θ66 θ67 θ68 θ69 θ70 θ71 θ72 θ73 θ74 θ75 θ76 θ77 θ78 θ79 θ80 θ81 θ82 θ83 θ84 θ85 θ86 θ87 θ88 θ89 θ90 1/128 (%) 1ch 95 95 94 94 93 93 92 92 91 91 90 90 89 89 88 88 87 86 86 85 84 84 83 82 82 81 80 80 79 78 77 77 76 75 74 73 72 72 71 70 69 68 67 66 65 64 63 62 62 61 60 59 58 57 56 55 53 52 51 50 49 48 47 46 45 1/64 (%) 2ch 31 33 34 35 36 37 38 39 41 42 43 44 45 46 47 48 49 50 51 52 53 55 56 57 58 59 60 61 62 62 63 64 65 66 67 68 69 70 71 72 72 73 74 75 76 77 77 78 79 80 80 81 82 82 83 84 84 85 86 86 87 88 88 89 89 1/32 (%) 1/16 (%) 1ch 95 2ch 31 1ch 2ch 94 34 94 34 93 36 92 38 92 38 91 41 90 43 90 43 89 45 88 47 88 47 87 49 86 51 86 51 84 53 83 56 83 56 82 58 80 60 80 60 79 62 77 63 77 63 76 65 74 67 74 67 72 69 71 71 71 71 69 72 67 74 67 74 65 76 63 77 63 77 62 79 60 80 60 80 58 82 56 83 56 83 53 84 51 86 51 86 49 87 47 88 47 88 45 89 1/8 (%) Half (%) Quarter (%) 1ch 2ch 1ch 2ch 1ch 2ch 92 38 92 38 92 38 88 47 83 56 83 56 77 63 71 71 71 71 71 71 63 77 56 83 56 83 47 88 Full (%) 1ch 2ch 1ch 2ch 71 71 100 100 Continued on next page. 14/34 LV8729V Application Note Continued from preceding page. STEP θ91 θ92 θ93 θ94 θ95 θ96 θ97 θ98 θ99 θ100 θ101 θ102 θ103 θ104 θ105 θ106 θ107 θ108 θ109 θ110 θ111 θ112 θ113 θ114 θ115 θ116 θ117 θ118 θ119 θ120 θ121 θ122 θ123 θ124 θ125 θ126 θ127 θ128 1/128 (%) 1ch 44 43 42 41 39 38 37 36 35 34 33 31 30 29 28 27 25 24 23 22 21 20 18 17 16 15 13 12 11 10 9 7 6 5 4 2 1 0 2ch 90 90 91 91 92 92 93 93 94 94 95 95 95 96 96 96 97 97 97 98 98 98 98 99 99 99 99 99 99 100 100 100 100 100 100 100 100 100 1/64 (%) 1/32 (%) 1/16 (%) 1ch 2ch 1ch 2ch 43 90 43 90 41 91 38 92 38 92 36 93 34 94 34 94 31 95 29 96 29 96 27 96 24 97 24 97 22 98 20 98 20 98 17 99 15 99 15 99 12 99 10 100 10 100 7 100 5 100 5 100 2 100 0 100 0 100 1/8 (%) Half (%) Quarter (%) 1ch 2ch 1ch 2ch 1ch 2ch 38 92 38 92 38 92 29 96 20 98 20 98 10 100 0 100 0 100 0 100 Full (%) 1ch 2ch 0 100 1ch 2ch 15/34 LV8729V Application Note (14)Current wave example in each micro step resolution. Full Step (CW) STEP MO (%) 100 I1 0 (% ) －100 100 I2 0 －100 Half Step (CW) STEP MO (%) 100 I1 0 －100 (%) 100 I2 0 －100 16/34 LV8729V Application Note Quarter Step (CW) STEP MO (%) 100 I1 0 －100 (%) 100 0 I2 －100 1/8 Step (CW) STEP MONI [%] 100 50 I1 0 -50 -100 [%] 100 50 I2 0 -50 -100 17/34 LV8729V Application Note 1/16 Step Mode (CW) STP MO [%] 100 50 0 -50 -100 [%] 100 50 0 -50 -100 1/32 Step Mode (CW) STEP MO [%] 100 50 I1 0 -50 -100 [%] 100 50 0 I2 -50 -100 18/34 LV8729V Application Note 1/64 Step Mode (CW) STP MO [%] 100 50 I1 0 -50 -100 [%] 100 50 I2 0 -50 -100 1/128 Step Mode ( CW ) STP MO [%] 100 50 I1 0 -50 -100 [%] 100 50 I2 0 -50 -100 19/34 LV8729V Application Note (15)Current control operation (Sine-wave increasing direction) STP Setting current Setting current Coil current Blanking Time fchop Current mode CHARGE SLOW FAST CHARGE SLOW FAST (Sine-wave decreasing direction) STP Setting current Coil current Setting current Blanking Time fchop Current mode CHARGE SLOW FAST Blanking Time FAST CHARGE SLOW Figure 16. Constant current control timing chart Each of current modes operates with the follow sequence. • The IC enters CHARGE mode at a rising edge of the chopping oscillation. ( A period of CHARGE mode (Blanking Time) is forcibly present in approximately 1μs, regardless of the current value of the coil current (ICOIL) and set current (IREF)). • In a period of Blanking Time, the coil current (ICOIL) and the setting current (IREF) are compared. If an ICOIL < IREF state exists during the charge period: The IC operates in CHARGE mode until ICOIL ≥ IREF. After that, it switches to SLOW DECAY mode and then switches to FAST DECAY mode in the last approximately 1μs of the period. If no ICOIL < IREF state exists during the charge period: The IC switches to FAST DECAY mode and the coil current is attenuated with the FAST DECAY operation until the end of a chopping period. The above operation is repeated. Normally, in the sine wave increasing direction the IC operates in SLOW (+ FAST) DECAY mode, and in the sine wave decreasing direction the IC operates in FAST DECAY mode until the current is attenuated and reaches the set value and the IC operates in SLOW (+ FAST) DECAY mode. 20/34 LV8729V Application Note (16)Output transistor operation mode Charge increases current. Switch from Charge to Slow Decay Current regeneration by Slow Decay 4. 5. FAST 6. VM VM VM OFF OFF U1 OFF U2 ON ON L1 RF OUTB OFF L2 OFF L1 RF Switch from Slow Decay to Fast Decay U2 OUTA OFF L1 L2 OFF U1 OUTB OUTA OFF OFF U2 OUTB OUTA ON U1 L2 RF Switch from Fast Decay to Charge Current regeneration by Fast Decay Figure 17. Output transistor operation sequence This IC controls constant current by performing chopping to output transistor. As shown above, by repeating the process from 1 to 6, setting current is maintained. Chopping consists of 3 modes: Charge/ Slow decay/ Fast decay. In this IC, for switching mode (No.2, 4, 6), there are “off period” in upper and lower transistor to prevent crossover current between the transistors. This off period is set to be constant (≈ 0.375μs) which is controlled by the internal logic. The diagrams show parasitic diode generated due to structure of MOS transistor. When the transistor is off, output current is regenerated through this parasitic diode. Output Transistor Operation Function OUTA→OUTB (CHARGE) Output Tr U1 U2 L1 L2 OUTB→OUTA (CHARGE) Output Tr U1 U2 L1 L2 CHARGE ON OFF OFF ON SLOW OFF OFF ON ON FAST OFF ON ON OFF CHARGE OFF ON ON OFF SLOW OFF OFF ON ON FAST ON OFF OFF ON 21/34 LV8729V Application Note 10ms/div STEP 5V/div (LV8729V) VM=24V VREF=0.45V RF=0.22Ω CHOP=180pF Motor Current 0.2A/div OSC1 0.5V/div Figure 18.Constant current control waveform 10µs/div 10µs/div STEP 5V/div Set Current Motor Current 100mA/div Set Current STEP 5V/div Motor Current 100mA/div OCS1 0.5V/div OCS1 0.5V/div Figure 19. Sine wave increasing direction Figure 20. Sine wave decreasing direction Figure 21. Constant current control waveform (Stationary state) 5µs/div Motor Current 100mA/div FAST OSC1 0.5V/div CHARGE SLOW Motor current switches to Fast Decay mode when triangle wave (CHOP) switches from Discharge to Charge. Approximately after 1μs, the motor current switches to Charge mode. When the current reaches to the setting current, it is switched to Slow Decay mode which continues over the Discharge period of triangle wave. 22/34 LV8729V Application Note (17)Blanking period If, when exercising PWM constant-current chopping control over the motor current, the mode is switched from decay to charge, the recovery current of the parasitic diode may flow to the current sensing resistance, causing noise to be carried on the current sensing resistance pin, and this may result in erroneous detection. To prevent this erroneous detection, a blanking period is provided to prevent the noise occurring during mode switching from being received. During this period, the mode is not switched from charge to decay even if noise is carried on the current sensing resistance pin. It is approximately 1µs in the blanking time for this IC. 5µs/div 1µs OUT1A 5V/div CHOP 0.5V/div Figure 22.Blanking time waveform (18)Micro step mode switching operation When Micro step mode is switched while the motor is rotating, each drive mode operates with the following sequence. If you switch Microstepping mode while the motor is driving, the mode setting will be reflected from the next STEP and the motor advances to the position shown in the following. 1. Microstepping (1/128-, 1/64-, 1/32-,1/16-,1/8-,Quarter-.Half-step) Æ Microstepping (1/128-, 1/64-, 1/32-,1/16-,1/8-,Quarter-.Half-step) When a microstepping switches to the next microstepping, the excitation position is switched to the next corresponding step angle of the next microstepping mode. e.g.) When the rotation direction is forward at 1/8-step, and if you switch to 1/128-step (θ16 - θ47), the step angle is set to θ48 at the next step. When the rotation direction is forward at 1/128 step. If you switch to 1/8-step (θ48), the step angle is set to θ49 at the next step. 2. Microstepping (1/128-, 1/64-, 1/32-,1/16-,1/8-,Quarter-.Half-step) Æ Full-step When a microstepping switches to the full-step, the excitation position is switched to full-step angle of the present quadrant. Caution is required when switching from θ64 or higher step angle of microstepping position to full-step. e.g.) When the rotation direction is forward at 1/16 step (θ0 - θ124) and if you switch to full-step, the step angle is set to θ64’ at the next step. When the rotation direction is forward at 1/16 step (θ128) and if you switch to full-step, the step angle is set to -θ64’ at the next step. 3. Full-step Æ Micro step (1/128-, 1/64-, 1/32-,1/16-,1/8-,Quarter-.Half-step) When full step switches to microstepping, the excitation position is switched to the next corresponding step angle. e.g.) When the rotation direction is forward at Full step (θ64’) and if you switch to Quarter-step, the step angle is set toθ96 at the next step. (Please refer to the step angle on p.13-15 for the description on “θ*”.) 23/34 LV8729V Application Note Micro step mode switching operation ● Micro step → Micro step VM=24V, VDD=5V VREF=1.1V, RNF=0.22Ω PS=High, OE=High, RST=High, fSTEP=400Hz MD1 5V/div MD1 5V/div MO 5V/div MO 5V/div θ0 θ0 θ16 θ32 θ64 θ32 θ64 Iout1 0.5A/div θ96 θ96 Iout1 0.5A/div θ112 θ128 θ128 Iout2 0.5A/div 1/8 step Iout2 0.5A/div Quarter step Quarter step Figure.23 Micro step(1/8step) → Micro step(quarter step) MD2=High , MD3=Low 1/8 step Figure24. Micro step(quarter step) → Micro step(1/8step) MD2=High , MD3=Low ● Micro step → Full step, Full step → Micro step VM=24V, VDD=5V VREF=1.1V, RNF=0.22Ω PS=High, OE=High, RST=High, fSTEP=200Hz θ0 MD2 5V/div MD2 5V/div MO 5V/div MO 5V/div θ64' θ32 θ64' θ64 Iout1 0.5A/div - θ64' Quarter step Full step Figure.25 Micro step(quarter step) → Full step MD1=Low , MD3=Low Iout2 0.5A/div Iout1 0.5A/div - θ64' Full step - θ32 Iout2 0.5A/div - θ0 Quarter step Figure26. Full step → Micro step (quarter step) MD1=Low , MD3=Low 24/34 LV8729V Application Note Output short-circuit protection function (1) Output short-circuit detection operation VM short Tr1 Tr1 Tr3 ON OUTA 1.High current flows if Tr3 and Tr4 are ON. 2.If RF voltage> setting voltage, then the mode switches to SLOW decay. 3.If the voltage between D and S of Tr4 exceeds the reference voltage for 2μs, short status is detected. VM VM OFF OUTA OFF OUTB M Tr2 OFF Tr3 Tr4 Tr2 ON ON OFF OUTB M Tr4 ON RF RF Short-circuit Detection GND short VM Short-circuit Detection Short-circuit Detection Tr1 Tr3 ON OUTA M OFF OUTB Tr2 OFF VM Tr1 ON OUTA Tr4 Tr2 ON OFF Tr3 M OFF OUTB Tr4 ON RF RF Load short VM Tr1 ON OUTA Short-circuit Detection Tr3 M Tr2 OFF RF OFF OUTB VM Tr1 ON OUTA Tr4 Tr2 ON OFF Tr3 M OFF OUTB Tr4 ON RF (left schematic) 1.High current flows if Tr3 and Tr4 are ON 2. If the voltage between D and S of Tr1 exceeds the reference voltage for 2μs, short status is detected. (right schematic) 1.Without going through RF resistor, current control does not operate and current will continue to increase in CHARGE mode. 2. If the voltage between D and S of Tr1 exceeds the reference voltage for 2μs, short status is detected. 1.Without L load, high current flows. 2. If RF voltage> setting voltage, then the mode switches to SLOW decay. 3.During load short state in SLOW decay mode, current does not flow and over current state is not detected. Then the mode is switched to FAST decay according to chopping cycle. 4. Since FAST state is short (≈1μs), switches to CHARGE mode before short is detected. 5.If voltage between D and S exceeds the reference voltage continuously during blanking time at the start of CHARGE mode (Tr1), CHARGE state is fixed (even if RF voltage exceeds the setting voltage, the mode is not switched to SLOW decay). After 2us or so, short is detected. 25/34 LV8729V Application Note (2) Output short-circuit protection detect current (Reference value) Short protector operates when abnormal current flows into the output transistor. Ta = 25°C (typ) Upper-side Transistor Lower-side Transistor *RF=GND 4.46A 4.04A 5.0 4.5 Iout (A) 4.0 3.5 3.0 Upper 2.5 Lower 2.0 -50 0 50 100 Temperature (˚C) 150 Figure 27. Detect Current vs Temperature (3) Timer latch period Built-in output short-circuit protection circuit makes output to enter in stand-by mode. This function prevents the IC from damaging when the output shorts circuit by a voltage short or a ground short, etc. When output short state is detected for 2µs, short-circuit detection circuit state the operating and output is once turned OFF. Subsequently, the output is turned ON again after the timer latch period (typ. 256μs). If the output remains in the short-circuit state, turn OFF the output, fix the output to the wait mode, and turn ON the EMO output. When output is fixed in stand-by mode by output short protection circuit, output is released the latch by setting ST = "L". Figure 28 . short-circuit protection function timing chart 50us/div OUT 10V/div OUT-GND short EMO 5V/div Timer latch period (typ:256µs) Figure 29. Timer latch period waveform 26/34 LV8729V Application Note (4) Unusual condition warning output pins (EMO) The LV8729V is provided with the EMO pin which notifies the CPU of an unusual condition if the protection circuit operates by detecting an unusual condition of the IC. This pin is of the open-drain output type and when an unusual condition is detected, the EMO output is placed in the ON (EMO = Low) state. Furthermore, the EMO pin is placed in the ON state when one of the following conditions occurs. 1. Shorting-to-power, shorting-to-ground, or shorting-to-load occurs at the output pin and the output short-circuit protection circuit is activated. 2. The IC junction temperature rises and the thermal protection circuit is activated. Thermal shutdown function The thermal shutdown circuit is incorporated and the output is turned off when junction temperature Tj exceeds 180°C and the abnormal state warning output is turned on. As the temperature falls by hysteresis, the output turned on again (automatic restoration). The thermal shutdown circuit does not guarantee the protection of the final product because it operates when the temperature exceed the junction temperature of Tjmax=150°C. TSD = 180°C (typ) ΔTSD = 40°C (typ) 27/34 LV8729V Application Note Application Circuit Example 1 VM OUT1A 44 2 NC OUT1A 43 0.1µF 3 VREG2 10µF Motor power supply PGND 42 4 NC NC 41 5 VREG1 NC 40 0.1µF 6 ST VM1 39 7 MD1 VM1 38 8 MD2 RF1 37 9 MD3 RF1 36 0.22Ω Logic Input 10 OE OUT1B 35 11 RST OUT1B 34 12 NC OUT2A 33 13 FR OUT2A 32 14 STP RF2 31 15 OSC1 RF2 30 16 OSC2 VM2 29 17 NC VM2 28 M 0.22Ω 180pF 47kΩ Short circuit state detection monitor 18 EMO NC 27 19 DOWN NC 26 20 MO PGND2 25 21 VREF OUT2B 24 22 SGND OUT2B 23 0.1µF Current setting reference voltage The above sample application circuit is set to the following conditions: • Output enable function fixed to the output state ( OE = “H” ) • Reset function fixed to the output state ( RST = “H” ) • Chopping frequency : 55.5kHz ( Cosc1 = 180pF ) The set current value is as follows: IOUT = (Current setting reference voltage / 5) / 0.22Ω 28/34 LV8729V Application Note Allowable power dissipation The pad on the backside of the IC functions as heatsink by soldering with the board. Since the heat-sink characteristics vary depends on board type, wiring and soldering, please perform evaluation with your board for confirmation. Specified circuit board: 90mm x 90mm x 1.6mm, glass epoxy 2-layer board Pd max - Ta Allowable power dissipation, Pd max - W 5.0 (1):Exposed Die-Padsubstrate (2):Without Exposed Die-pad 4.0 3.85 (1) 3.0 (2) 2.70 2.00 2.0 1.40 1.0 0 —30 0 30 60 90 120 Ambient temperature, Ta - C Substrate Specifications (Substrate recommended for operation of LV8729V) Size : 90mm × 90mm × 1.6mm (two-layer substrate [2S0P]) Material : Glass epoxy Copper wiring density : L1 = 85% / L2 = 90% L1 : Copper wiring pattern diagram L2 : Copper wiring pattern diagram Cautions 1) The data for the case with the Exposed Die-Pad substrate mounted shows the values when 90% or more of the Exposed Die-Pad is wet. 2) For the set design, employ the derating design with sufficient margin. Stresses to be derated include the voltage, current, junction temperature, power loss, and mechanical stresses such as vibration, impact, and tension. Accordingly, the design must ensure these stresses to be as low or small as possible. The guideline for ordinary derating is shown below: (1)Maximum value 80% or less for the voltage rating (2)Maximum value 80% or less for the current rating (3)Maximum value 80% or less for the temperature rating 3) After the set design, be sure to verify the design with the actual product. Confirm the solder joint state and verify also the reliability of solder joint for the Exposed Die-Pad, etc. Any void or deterioration, if observed in the solder joint of these parts, causes deteriorated thermal conduction, possibly resulting in thermal destruction of IC. 29/34 LV8729V Application Note Evaluation board LV8729V (90mm x 90mm x 1.6mm, glass epoxy 2-layer board, with backside mounting) M R1 VM Power Supply R2 C1 VDD Power Supply for Switch IC1 C2 SW1 SW2 C3 SW3 C4 C5 R3 R5 C7 SW4 SW5 SW6 SW7 SW8 Input Bill of Materials for LV8729V Evaluation Board Manufacturer Manufacturer Part Number Substitution Allowed Lead Free ±20% SUN Electronic Industries 50ME10HC yes yes 0.1µF 100V ±10% murata GRM188R72A104KA35D yes yes 0.1µF 100V ±10% murata GRM188R72A104KA35D yes yes 180pF 50V ±5% murata GRM1882C1H181JA01 yes yes 1500pF 50V ±5% KOA GRM1882C1H152J yes yes 0.22Ω 1W ±5% ROHM MCR100JZHJLR22 yes yes 0.22Ω 1W ±5% ROHM MCR100JZHJLR22 yes yes 47kΩ 1/10W ±5% KOA RK73B1JT473J yes yes 47kΩ 1/10W ±5% KOA RK73B1JT473J yes yes 0.1µF 100V ±10% murata GRM188R72A104KA35D yes yes ON Semiconductor LV8729V No yes Switch MIYAMA MS-621-A01 yes yes Test points MAC8 ST-1-3 yes yes Designator Qty Description Value Tol C1 1 VM Bypass capacitor 10µF 50V C2 1 C3 1 C4 1 C5 1 R1 1 R2 1 R3 1 R5 1 R7 1 IC1 1 Motor Driver SW1-SW8 8 TP1-TP20 20 VREG2 stabilization Capacitor VREG1 stabilization Capacitor Capacitor to set chopping frequency Capacitor to set switching holding current Channel 1 Output current detective Resistor Channel 2 Output current detective Resistor Pull-up Resistor for terminal EMO Pull-up Resistor for terminal MO VREF stabilization Capacitor Footprint SSOP44K (275mil) 30/34 LV8729V Application Note Evaluation board circuit C1:10µF “VM” Power Supply C2：0.1µF C3：0.1µF SW1 “VDD” Power Supply for Switch SW2 1 VM OUT1A 44 2 NC OUT1A 43 3 VREG2 4 NC NC 41 5 VREG1 NC 40 6 ST VM1 39 7 MD1 VM1 38 8 MD2 RF1 37 9 MD3 RF1 36 SW3 SW4 SW5 (3) PGND 42 10 OE OUT1B 35 11 RST OUT1B 34 12 NC OUT2A 33 13 FR OUT2A 32 Motor Connection Terminal R1：0.22Ω (4) SW6 SW7 (1) SW8 C4:180µF C5:1500µF R3：47kΩ (R4:OPEN) R5：47kΩ (R6:OPEN) (2) 14 STP RF2 31 15 OSC1 RF2 30 16 OSC2 VM2 29 17 NC VM2 28 18 EMO NC 27 19 DOWN NC 26 20 MO PGND2 25 21 VREF OUT2B 24 22 SGND OUT2B 23 R2：0.22Ω (R7)：0.1µF “VREF” Current setting reference voltage Evaluation Board Manual [Supply Voltage] [Toggle Switch State] VM (9 to 32V): Power Supply for LSI VREF (0 to 3V): Const. Current Control for Reference Voltage VDD (2 to 5V): Logic “High” voltage for toggle switch Upper Side: High (VDD) Middle: Open, enable to external logic input Lower Side: Low (GND) [Operation Guide] 1. Initial Condition Setting: Set “Open” the toggle switch STEP, and “Open or Low” the other switches 2. Motor Connection: Connect the Motors between OUT1A and OUT1B, between OUT2A and OUT2B. 3. Power Supply: Supply DC voltage to VM, VREF and VDD. 4. Ready for Operation from Standby State: Turn “High” the following toggle switches : ST , OE, and RST. Channel 1 and 2 are into Full-Step excitement initial position (100%, -100%). 5. Motor Operation: Input the clock signal into the terminal STEP. 6. Other Setting (See Application Note for detail) i. MD1 , MD2 , MD3 : Micro step resolution. ii. FR: Motor rotation direction (CW / CCW) setting. iii. RST : Initial Mode. iv. OE: Output Enable. [Setting for External Component Value] 1. Constant Current (100%) At VREF=1.5V Iout =VREF [V] / 5 / RF [ohm] =1.5 [V] / 5 / 0.22 [ohm] =1.36 [A] 2. Chopping Frequency Fcp = 1 / ( Cosc1 / 10 х 10-6 ) (Hz) -6 =1 / (180 [pF] / 10 х 10 ) (Hz) =55.5 [kHz] 31/34 LV8729V Application Note Waveform of LV8729V evaluation board. ●Figure 30. Full Step VM=24V , VREF=1.5V , VDD=5V ST=H , OE=H , RST=H FR=L MD1=L , MD2=L , MD3=L STEP=300Hz (Duty 50%) ●Figure 31. Half Step VM=24V , VREF=1.5V , VDD=5V ST=H , OE=H , RST=H FR=L MD1=H , MD2=L , MD3=L STEP=300Hz (Duty 50%) 5ms/div 2ms/div (1) STEP 5V/div (2) MONI 5V/div STEP 5V/div (1) MONI 5V/div (2) (3) (3) Iout1 1A/div Iout1 1A/div (4) Iout2 1A/div (4) ●Figure 32. 1/16 Step VM=24V , VREF=1.5V , VDD=5V ST=H , OE=H , RST=H FR=L MD1=L , MD2=L , MD3=H STEP=300Hz (Duty 50%) 50ms/div Iout2 1A/div ●Figure 33. 1/128 Step VM=24V , VREF=1.5V , VDD=5V ST=H , OE=H , RST=H FR=L MD1=H , MD2=H , MD3=H STEP=1500Hz (Duty 50%) (1) STEP 5V/div (2) MONI 5V/div (3) 50ms/div (1) STEP 5V/div (2) MONI 5V/div (3) Iout1 1A/div Iout1 1A/div (4) Iout2 1A/div (4) Iout2 1A/div 32/34 LV8729V Application Note Warning: ●Power supply connection terminal [VM, VM1, VM2] 9 Make sure to short-circuit VM, VM1 and VM2.For controller supply voltage, the internal regulator voltage of VREG1 (typ 5V) is used. 9 Make sure that supply voltage does not exceed the absolute MAX ratings under no circumstance. Noncompliance can be the cause of IC destruction and degradation. 9 Caution is required for supply voltage because this IC performs switching. 9 The bypass capacitor of the power supply should be close to the IC as much as possible to stabilize voltage. Also if you intend to use high current or back EMF is high, please augment enough capacitance. ●GND terminal [GND, PGND, Exposed Die-Pad] 9 Since GND is the reference of the IC internal operation, make sure to connect to stable and the lowest possible potential. Since high current flows into PGND, connect it to one-point GND. 9 The exposed die-pad is connected to the board frame of the IC. Therefore, do not connect it other than GND. Independent layout is preferable. If such layout is not feasible, please connect it to signal GND. Or if the area of GND and PGND is larger, you may connect the exposed die pad to the GND. (The independent connection of exposed die pad to PGND is not recommended.) ●Internal power supply regulator terminal [VREG1] 9 VREG1 is the power supply for logic (typ 5V). 9 When VM supply is powered and ST is ”H”, VREG1 operates. 9 Please connect capacitor for stabilize VREG1. The recommendation value is 0.1µF. 9 Since the voltage of VREG1 fluctuates, do not use it as reference voltage that requires accuracy. ●Input terminal 9 The logic input pin incorporates pull-down resistor (100kΩ). 9 When you set input pin to low voltage, please short it to GND because the input pin is vulnerable to noise. 9 The input is TTL level (H: 2V or higher, L: 0.8V or lower). 9 VREF pin is high impedance. ●OUT terminal [OUT1A, OUT1B, OUT2A, OUT2B] 9 During chopping operation, the output voltage becomes equivalent to VM voltage, which can be the cause of noise. Caution is required for the pattern layout of output pin. 9 The layout should be low impedance because driving current of motor flows into the output pin. 9 Output voltage may boost due to back EMF. Make sure that the voltage does not exceed the absolute MAX ratings under no circumstance. Noncompliance can be the cause of IC destruction and degradation. ●Current sense resistor connection terminal [RF1, RF2] 9 To perform constant current control, please connect resistor to RF pin. 9 To perform saturation drive (without constant current control), please connect RF pin to GND. 9 If RF pin is open, then short protector circuit operates. Therefore, please connect it to resistor or GND. 9 The motor current flows into RF – GND line. Therefore, please connect it to common GND line and low impedance line. ●NC terminal 9 NC pin is not connected to the IC. 9 If VM line and output line are wide enough in your layout, please use NC. 33/34 LV8729V Application Note ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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