5962-03B01 (for MG2RTP series) - Standard Microcircuit Drawing

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
The device type on this drawing have been changed to reflect the part
numbers on SMD 5962-00B03. New device types 01 and 02 have
been added to 1.2.2. - phn
03-12-04
Thomas M. Hess
B
Add device type 06. Add case outline T and M. Changed supply
voltage VDD in absolute maximum rating in 1.3 from 6.0 V to 7.0 V. phn
05-04-12
Thomas M. Hess
C
Add case outline N and 4. - phn
06-02-06
Thomas M. Hess
D
Add case outline 5. Update the boilerplate to the current requirements
of MIL-PRF-38535. - phn
08-06-18
Thomas M. Hess
REV
SHEET
REV
D
D
D
D
D
D
D
SHEET
15
16
17
18
19
20
21
REV STATUS
REV
D
D
D
D
D
D
D
D
D
D
D
D
D
D
OF SHEETS
SHEET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PMIC N/A
PREPARED BY
STANDARD
MICROCIRCUIT
DRAWING
Phu H. Nguyen
DEFENSE SUPPLY CENTER COLUMBUS
CHECKED BY
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
Phu H. Nguyen
APPROVED BY
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
Thomas M. Hess
DRAWING APPROVAL DATE
MICROCIRCUIT, DIGITAL, CMOS, MG2RTP,
GATE ARRAY, MONOLITHIC SILICON
03-11-04
AMSC N/A
REVISION LEVEL
D
DSCC FORM 2233
APR 97
SIZE
CAGE CODE
A
67268
SHEET
1 OF
5962-03B01
21
5962-E436-08
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M)
and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or
Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
-
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
03B01
01
Q
X
C
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
/
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are
marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
01
02
03
04
05
06
MG2RTPL_M01
MG2RTPL_MB02
MG2044P
MG2142P
MG2270P
MG2256A
Circuit function
202 gates available 1/
2,799 gates available 1/
44,000 gates available
142,000 gates available
270,000 gates available
FPGA conversion
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
M
Q or V
Device requirements documentation
Vendor self-certification to the requirements for MIL-STD-883 compliant,
non-JAN class level B microcircuits in accordance with MIL-PRF-38535,
appendix A
Certification and qualification to MIL-PRF-38535
_____
1/
This device is no longer available.
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REVISION LEVEL
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1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter 2/
X
Y
Z
U
T
M
N
4
5
Descriptive designator
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
Terminals
Package style
100
132
160
349
256
208
256
208
132
Leads unformed quad flat pack
Leads unformed quad flat pack
Leads unformed quad flat pack
Multilayer ceramic grid array
Leads unformed quad flat pack
Leads unformed quad flat pack
Leads unformed quad flat pack – grounded lid
Leads unformed quad flat pack – grounded lid
Leads unformed quad flat pack – grounded lid
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
1.3 Absolute maximum ratings 3/ 4/
Supply voltage range (VDD)................................................................
Input voltage range (VIN)....................................................................
Input current (IIN)
Signal pin ..................................................................................
Power pin ..................................................................................
Output short circuit current 6/
VOUT = VDD ................................................................................
VOUT = VSS .................................................................................
Lead temperature (soldering, 10 sec) ...............................................
Storage temperature..........................................................................
Maximum junction temperature (TJ) ..................................................
-0.5 V to 7.0 V
-0.5 V to VDD + 0.5 V 5/
-10 mA to 10 mA
-50 mA to 50 mA
48 mA
-36 mA
300°C
7/
-65°C to 150°C
175°C
1.4 Recommended operating conditions.
Supply voltage range ......................................................................... 2.7 V to 5.5 V 8/
Case operating temperature range (TC) ............................................ -55°C to 125°C
1.5 Digital logic testing for device classes Q and V.
Fault coverage measurement of manufacturing
logic tests (MIL-STD-883, test method 5012)................................. As specified in the AID
1.6 Radiation features.
Maximum total dose available (dose rate = 0.1 rad(Si)/s) ................. 100 Krads 9/
__________
2/
3/
4/
5/
6/
7/
8/
9/
Additional packages are available on SMD 5962-00B03
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
All voltages referenced to Ground unless otherwise specified.
VDD + 0.5 V shall not exceed 7.0 V.
The maximum output current of any single output in short condition for a maximum duration of 1 second.
Duration 10 s max at a distance not less than 1.6 mm.
This gate array device is capable of being configured with VDD = 3.0 V ±10% or VDD = 5.0 V ±10%.
Unless otherwise specified in the AID.
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REVISION LEVEL
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2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at http://assist.daps.dla.mil;quicksearch/ or www.dodssp.daps.mil or
from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract.
AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM)
ASTM F1192
-
Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion
Irradiation of semiconductor Devices.
(Copies of these documents are available online at http://www.astm.org or from ASTM International, 100 Barr Harbor Drive,
P.O. Box C700, West Conshohocken, PA, 19428-2959).
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of
this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.1.1 Microcircuit die. For the requirements for microcircuit die, see appendix A to this document.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in
MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.3 AID requirements. All AIDs written against this SMD shall be sent to DSCC-VA. The following items shall be provided to
the device manufacturer by the customer as part of an AID.
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REVISION LEVEL
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3.3.1 Terminal connections and pin assignments.
3.3.2 Package type (see 1.2.4).
3.3.3 Functional block diagram (or equivalent VHDL behavioral description).
3.3.4 Functional description terms and symbols.
3.3.5 Logic diagram (or equivalent structural VHDL description or mutually agreed to net list).
3.3.6 Pin function description.
3.3.7 Design tape # or Design document name (i.e., net list).
3.3.8 Design functional tape # or name.
3.3.9 Test functional tape # or name.
3.3.10 Timing diagram(s).
3.3.11 Fault coverage measurement of manufacturing logic tests.
3.3.12 Burn-in circuit.
3.3.13 Radiation exposure circuit.
3.3.14 ESD class and voltage.
3.3.15 Device electrical performance characteristics (additions to Table I). Device electrical performance characteristics shall
include dc parametric, functional, ac parameters and any other data which would be considered required by a design engineer.
All electrical performance characteristics apply over the full recommended ambient operating temperature range and specified
test load conditions.
3.3.16 Maximum power dissipation. Maximum power dissipation shall be in accordance with the application specific design.
3.3.17 RHA post-irradiated electrical. For RHA devices supplied to this drawing, the RHA post irradiated electrical shall be
specified in the AID.
3.4 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full
case operating temperature range.
3.5 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are defined in table I.
3.6 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space
limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the
RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535.
Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. The AID number shall be added to the
marking by the manufacturer.
3.6.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
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APR 97
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REVISION LEVEL
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3.7 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this
drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and
herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.8 Certificate of conformance. A certificate of conformance as required for device classes Q and V in
MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to
this drawing.
3.9 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A.
3.10 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.11 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 123 (see MIL-PRF-38535, appendix A).
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REVISION LEVEL
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TABLE I. Electrical performance characteristics.
Conditions
-55°C ≤ TC ≤ +125°C
Group A
subgroups
Device
type
Min
Max
IOH = -300 μA
1, 2, 3
All
- 1.2
-0.2
V
IIL
VIN = GND, VDD = 5.5 V
1, 2, 3
All
-5
-
μA
IILPU
VIN = GND, VDD = 5.5V
1, 2, 3
All
- 100
-
μA
ILLPD
VIN = GND, VDD = 5.5 V
1, 2, 3
All
-5
-
μA
IIH
VIN = VDD = 5.5 V
1, 2, 3
All
-
5
μA
IIHPU
VIN = VDD = 5.5 V
1, 2, 3
All
-
5
μA
IIHPD
VIN = VDD = 5.5 V
1, 2, 3
All
-
300
μA
IOZL
Outputs disabled, VOUT = GND
1, 2, 3
All
-5
-
μA
Output leakage high current Pulldown output 2/
IOZHPD
Outputs disabled, VOUT = VDD
1, 2, 3
All
-
300
μA
Output leakage low current
IOZLPU
Outputs disabled, VOUT = GND
1, 2, 3
All
- 100
-
μA
Outputs disabled, VOUT = VDD
1, 2, 3
All
-
5
μA
Functional verification
1, 2, 3
All
-
0.8
V
1, 2, 3
All
-
0.4
V
Test
Input clamp voltage to GND 1/
Low level input current 2/
Low level input current,
Symbol
VIC
VDD = 5 V ± 10 %
unless otherwise specified
Limits
Unit
Pull-up 2/
Low level input current,
Pull-down 2/
High level input current 2/
High level input current,
Pull-up
2/
High level input current,
Pull-down 2/
Output leakage low current 2/
Pull-up output 2/
Output leakage high current 2/
Low Level Input Voltage 1/
IOZH
VIL
Low level output voltage BOUT12 2/
VOL1
VDD = 5.5 V, IOL = +12 mA
Low level output voltage BOUT6 2/
VOL2
VDD = 5.5 V, IOL = +6 mA
1, 2, 3
All
-
0.4
V
Low level output Voltage BOUT3 2/
VOL3
VDD = 5.5 V, IOL = +3 mA
1, 2, 3
All
-
0.4
V
High Level Output Voltage BOUT12
2/
VOH1
VDD = 4.5 V, IOH = -12 mA
1, 2, 3
All
3.9
-
V
High level output voltage BOUT6 2/
VOH2
VDD = 4.5 V, IOH = -6 mA
1, 2, 3
All
3.9
-
V
High level output voltage BOUT3 2/
VOH1
VDD = 4.5 V, IOH = -3 mA
1, 2, 3
All
3.9
-
V
1, 2, 3
All
2.2
-
V
High level input voltage 1/
VIH
Functional verification
Input capacitance 3/
CI
VDD = 0 V
4
All
15
pF
Output capacitance 3/
CIO
VDD = 0 V
4
All
15
pF
See footnotes at end of table.
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TABLE I. Electrical performance characteristics. – Continued.
Conditions
-55°C ≤ TC ≤ +125°C
VDD = 2.7 V to 3.6 V
unless otherwise specified
Group A
subgroups
Device
type
Min
Max
IOH = -300 μA
1, 2, 3
All
-1.2
-0.2
V
IIL
VIN = GND, VDD = 3.6 V
1, 2, 3
All
-1
-
μA
IILPU
VIN = GND, VDD = 3.6V
1, 2, 3
All
- 50
-
μA
ILLPD
VIN = GND, VDD = 3.6 V
1, 2, 3
All
-1
-
μA
IIH
VIN = VDD = 3.6 V
1, 2, 3
All
-
1
μA
IIHPU
VIN = VDD = 3.6 V
1, 2, 3
All
1
μA
IIHPD
VIN = VDD = 3.6 V
1, 2, 3
All
-
140
μA
IOZL
Outputs disabled, VOUT = GND
1, 2, 3
All
-1
-
μA
Output leakage high current Pulldown output 2/
IOZHPD
Outputs disabled, VOUT = VDD
1, 2, 3
All
-
140
μA
Output leakage low current
Pull-up output 2/
IOZLPU
Outputs disabled, VOUT = GND
1, 2, 3
All
- 50
-
μA
Output leakage high current 2/
IOZH
Outputs disabled, VOUT = VDD
1, 2, 3
All
-
1
μA
Low level input voltage LVTTL input
1/
VIL
Functional verification
1, 2, 3
All
-
0.8
V
VDD = 3.6 V
1, 2, 3
All
-
0.4
V
Test
Input clamp voltage to GND 1/
Low level input current 2/
Low level input current,
Symbol
VIC
Limits
Unit
Pull-up 2/
Low level input current,
Pull-down 2/
High level input current 2/
High level input current,
Pull-up
2/
High level input current,
Pull-down 2/
Output leakage low current 2/
Low level output voltage BOUT12
2/
VOL1
Low level output voltage BOUT6 2/
VOL2
VDD = 3.6 V, IOL = +3 mA
1, 2, 3
All
-
0.4
V
Low level output voltage BOUT3 2/
VOL3
VDD = 3.6 V, IOL = +1.5 mA
1, 2, 3
All
-
0.4
V
High level output voltage BOUT12
2/
VOH1
VDD = 2.7 V, IOH = -4 mA
1, 2, 3
All
0.7 VDD
-
V
High level output voltage BOUT6 3/
VOH2
VDD = 2.7 V, IOH = -2 mA
1, 2, 3
All
0.7 VDD
-
V
High level output voltage BOUT3 3/
VOH3
VDD = 2.7 V, IOH = -1 mA
1, 2, 3
All
0.7 VDD
-
V
VIH
Functional verification
1, 2, 3
All
2.0
-
V
Input capacitance 3/
CI
VDD = 0 V
4
All
15
pF
Output capacitance 3/
CIO
VDD = 0 V
4
All
15
pF
High level input voltage LVTTL
input 1/
IOL = +6 mA
1/ Forcing conditions of the functional test, assure that these limits are met, but they will not be individually recorded.
2/ Read and record measurements in accordance with MIL-PRF-38535.
3/ Tested at initial design and after major process changes, otherwise guaranteed.
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Case X
100 Lead unformed quad flat pack
Millimeters
Inches
Min
Max
Min
Max
A
2.21
2.67
.087
.105
A1
1.83
2.24
.072
.088
A2
0.203 REF
.008 REF
b
0.254 REF
.010 REF
C
0.15
0.20
.006
.008
D/E
33.80
35.30
1.331
1.390
D1/E1
18.80
19.30
.740
e
L
0.635 BSC
7.50
N1/N2
.760
.025 BSC
8.00
.295
25
.315
25
Figure 1. Case outlines
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Case Y
132 Lead unformed quad flat pack
Millimeters
Inches
Min
Max
Min
Max
A
2.36
2.82
.093
.111
A1
1.47
1.83
.058
.072
A2
0.203 REF
.008 REF
b
0.200 REF
.008 REF
C
0.152 TYP
.006 TYP
D/E
37.00
39.38
1.457
D1/E1
24.00
24.38
.945
e
0.635 BSC
L
6.50
N1/N2
1.550
.960
.025 BSC
7.50
.256
33
.295
33
Figure 1. Case outline – Continued.
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Case Z
160 Lead unformed quad flat pack
Millimeters
Inches
Min
Max
Min
Max
A
1.96
2.66
.077
.105
A1
1.70
2.10
.067
.083
A2
0.10
0.30
.004
.012
b
0.25
0.35
.010
.014
C
0.10
0.20
.004
.008
D/E
37.90
39.30
1.492
1.548
D1/E1
26.90
27.50
1.059
e
0.650 BSC
L
5.50
N1/N2
1.083
.0256 BSC
5.90
.216
40
.232
40
Figure 1. Case outline – Continued.
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Case U
349 Multilayer ceramic grid array
Millimeters
Inches
Min
Max
Min
Max
A
4.30
5.90
.169
.232
A1
1.40
1.85
.055
.073
A2
2.40
3.45
.094
.136
b
0.79
0.99
.031
.040
D/E
24.80
25.20
.976
.992
D1/E1
22.86 (1.27 x 18)
0.900 (.05 x 18)
e
1.27 REF
.050 REF
Figure 1. Case outline – Continued.
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Case T
256 Leads unformed quad flat pack
Millimeters
Inches
Millimeters
Inches
Min
Max
Min
Max
A
2.50
3.22
.090
.127
E1/D1
A1
2.06
2.56
.001
.101
E2/D2
31.50 BSC
1.240 BSC
D3
65.90 BSC
2.594 BSC
A2
b
c
0.20 BSC
0.20 Typ
0.10
0.20
.008 BSC
.008 Typ
.004
.008
Min
Max
Min
Max
35.64
36.36
1.403
1.431
E4
70.00 BSC
2.756 BSC
E5
74.60
75.40
2.937
2.968
e
0.50 BSC
.020 BSC
J
0.77
1.03
.030
.040
L3
56.30 BSC
2.217 BSC
F
7.05
8.45
.277
.332
K
0.25
.010
Figure 1. Case outline – Continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-03B01
A
REVISION LEVEL
D
SHEET
13
Case M
208 Leads unformed quad flat pack
Millimeters
Min
Max
Inches
Min
Millimeters
Max
Inches
Min
Max
Min
Max
28.96
29.46
1.14
1.16
A
2.40
3.20
.095
.126
E1/D1
A1
2.06
2.56
.001
.101
E2/D2
25.50 BSC
1.004 BSC
2.594 BSC
A2
0.20 BSC
.008 BSC
D3
65.90 BSC
b
0.20 Typ
.008 Typ
E4
70.00 BSC
c
0.10
0.20
.004
.008
2.756 BSC
E5
74.60
75.40
2.937
2.968
e
0.50 BSC
.020 BSC
J
0.76
1.02
.030
.040
L3
56.30 BSC
2.217 BSC
F
7.05
8.45
.277
.332
K
0.25
.010
Figure 1. Case outline – Continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-03B01
A
REVISION LEVEL
D
SHEET
14
Case N
256 Leads unformed quad flat pack – grounded lid
Millimeters
Inches
Millimeters
Max
Min
A
2.50
3.22
.090
.127
E1/D1
A1
2.06
2.56
.001
.101
E2/D2
31.50 BSC
1.240 BSC
D3
65.90 BSC
2.594 BSC
A2
b
c
0.20 BSC
0.20 Typ
0.10
0.20
Max
Inches
Min
.008 BSC
.008 Typ
.004
Min
Max
Min
Max
35.64
36.36
1.403
1.431
E4
.008
70.00 BSC
2.756 BSC
E5
74.60
75.40
2.937
2.968
e
0.50 BSC
.020 BSC
J
0.77
1.03
.030
.040
L3
56.30 BSC
2.217 BSC
F
7.05
8.45
.277
.332
K
0.25
.010
Figure 1. Case outline – Continued.
Millimeters
Inches
Millimeters
Inches
Min
Max
Min
Max
A
2.50
3.22
.090
.127
E1/D1
A1
2.06
2.56
.001
.101
E2/D2
31.50 BSC
1.240 BSC
D3
65.90 BSC
2.594 BSC
A2
b
c
0.20 BSC
0.20 Typ
0.10
0.20
.008 BSC
.008 Typ
.004
.008
Min
Max
Min
Max
35.64
36.36
1.403
1.431
E4
70.00 BSC
2.756 BSC
E5
74.60
75.40
2.937
2.968
e
0.50 BSC
.020 BSC
J
0.77
1.03
.030
.040
L3
56.30 BSC
2.217 BSC
F
7.05
8.45
.277
.332
K
0.25
.010
Note:
1. Reference mark indicates the lid is connected to ground.
Figure 1. Case outline – Continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-03B01
A
REVISION LEVEL
D
SHEET
15
Case 4
208 Leads unformed quad flat pack – grounded lid
Figure 1. Case outline – Continued.
Millimeters
Min
Max
Inches
Min
Millimeters
Max
Inches
Min
Max
Min
Max
28.96
29.46
1.14
1.16
A
2.40
3.20
.095
.126
E1/D1
A1
2.06
2.56
.001
.101
E2/D2
25.50 BSC
1.004 BSC
A2
0.20 BSC
.008 BSC
D3
65.90 BSC
2.594 BSC
b
0.20 Typ
.008 Typ
E4
70.00 BSC
2.756 BSC
c
0.10
0.20
.004
.008
e
0.50 BSC
.020 BSC
L3
56.30 BSC
2.217 BSC
E5
74.60
75.40
2.937
2.968
J
0.76
1.02
.030
.040
F
7.05
8.45
.277
.332
K
0.25
.010
Note:
1. Reference mark indicates the lid is connected to ground.
Figure 1. Case outline – Continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-03B01
A
REVISION LEVEL
D
SHEET
16
Case 5
132 Leads unformed quad flat pack – grounded lid
Millimeters
Inches
Min
Max
Min
Max
A
2.36
2.82
.093
.111
A1
1.47
1.83
.058
0.072
A2
0.203 REF
.008 REF
b
0.200 REF
.008 REF
C
0.152 TYP
.006 TYP
D/E
37.00
39.38
1.457
1.550
D1/E1
24.00
24.38
.945
.960
e
0.635 BSC
L
6.50
N1/N2
.025 BSC
7.50
.256
33
.295
33
Note:
1. Pin 100 is used to connect the lid to VSS.
Figure 1. Case outline – Continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-03B01
A
REVISION LEVEL
D
SHEET
17
4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in
accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a.
Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition is described in the AID. The test circuit shall be maintained by the manufacturer under document
revision level control and shall be made available to the preparing or acquiring activity upon request. The test
circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent
specified in test method 1015.
(2) TA = +125°C, minimum.
b.
Interim and final electrical test parameters shall be as specified in table II herein.
4.2.2 Additional criteria for device classes Q and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MILPRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test
method 1015 of MIL-STD-883.
b.
Interim and final electrical test parameters shall be as specified in table II herein.
c.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein Quality conformance inspection for
device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed
for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections
(see 4.4.1 through 4.4.4).
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-03B01
A
REVISION LEVEL
D
SHEET
18
TABLE II. Electrical test requirements.
Test requirements
Subgroups
Subgroups
(in accordance with MIL-STD-883,
method 5005, table I)
(in accordance with MIL-PRF-38535,
table III)
Device
Device
Device
class M
class Q
class V
1, 7, 9
1, 7, 9
1, 7, 9
Interim electrical
parameters (see 4.2)
Final electrical
1, 2, 3, 7, 8, 9, 10, 11 1/
1, 2, 3, 7, 8, 9,
10, 11 1/
1, 2, 3, 7, 8, 9, 10,
11 2/
1, 2, 3, 4, 7, 8, 9, 10, 11
1, 2, 3, 4, 7, 8, 9,
10, 11
1, 2, 3, 4, 7, 8, 9,
10, 11
parameters (see 4.2)
Group A test
requirements (see 4.4)
Group C end-point electrical
parameters (see 4.4)
1, 7, 9
1, 7, 9
1, 7, 9
Group D end-point electrical
1, 7, 9
1, 7, 9
1, 7, 9
1, 7, 9
1, 7, 9
1, 7, 9
parameters (see 4.4)
Group E end-point electrical
parameters (see 4.4)
1/ PDA applies to subgroup 1.
2/ PDA applies to subgroups 1 and 7.
4.4.1 Group A inspection.
a.
Tests shall be as specified in table II herein.
b.
For device class Q and V, subgroups 7 and 8 tests shall be sufficient to verify the functionality of the device as
described in the AID. These tests shall have been fault graded in accordance with MIL-STD-883, test method 5012
(see 1.5 herein) or as described in the manufacturers QM plan.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a.
Test condition as described in the AID. The test circuit shall be maintained by the manufacturer under document
revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit
shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified
in test method 1005 of MIL-STD-883.
b.
TA = +125°C, minimum.
c.
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MILSTD-883.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-03B01
A
REVISION LEVEL
D
SHEET
19
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured
(see 3.5 herein).
a.
End-point electrical parameters shall be as specified in table II herein.
b.
For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to
radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device
classes must meet the postirradiation end-point electrical parameter limits as defined in table I at
TA = +25°C ±5°C, after exposure, to the subgroups specified in table II herein.
c.
When specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied.
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883,
method 1019, condition A unless otherwise specified in the AID.
4.4.4.1.1 Accelerated annealing test. Accelerated annealing tests shall be performed on all devices requiring a RHA level
greater than 5k rads (Si). The post-anneal end-point electrical parameter limits shall be as specified in table IA herein and shall
be the pre-irradiation end-point electrical parameter limit at 25°C ±5°C. Testing shall be performed at initial qualification and
after any design or process changes which may affect the RHA response of the device.
4.4.4.2 Dose rate induced latch-up testing. When required by the customer, dose rate induced latch-up testing shall be
performed in accordance with method 1020 of MIL-STD-883 and as specified herein. Tests shall be performed on devices,
SEC, or approved test structures at technology qualification and after any design or process changes which may affect the RHA
capability of the process.
4.4.4.3 Dose rate upset testing. When required by the customer, dose rate upset testing shall be performed in accordance
with method 1021 of MIL-STD-883 and herein.
a. Transient dose rate upset testing for class M devices shall be performed at initial qualification and after any design or
process changes which may affect the RHA performance of the devices. Test 10 devices with 0 defects unless
otherwise specified.
b. Transient dose rate upset testing for class Q and V devices shall be performed as specified by a TRB approved radiation
hardness assurance plan and MIL-PRF-38535. Device parametric parameters that influence upset immunity shall be
monitored at the wafer level in accordance with the wafer level hardness assurance plan and MIL-PRF-38535.
4.4.4.4 Single event phenomena (SEP). When specified in the purchase order or contract, SEP testing shall be performed on
class V devices. SEP testing shall be performed on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as
approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or
latchup characteristics. Test four devices with zero failures. ASTM F1192 may be used as a guideline when performing SEP
testing. The test conditions for SEP are as follows:
a.
The ion beam angle of incidence shall be between normal to the die surface and 60° to the normal, inclusive
(i.e. 0° ≤ angle ≤ 60°). No shadowing of the ion beam due to fixturing or package related effects is allowed.
b.
The fluence shall be ≥ 100 errors or ≥ 107 ions/cm2.
c.
The flux shall be between 102 and 105 ions/cm2/s. The cross-section shall be verified to be flux independent by
measuring the cross-section at two flux rates which differ by at least an order of magnitude.
d.
The particle range shall be ≥ 20 microns in silicon.
e.
The upset test temperature shall be +25°C. The latchup test temperature shall be at the maximum rated operating
temperature ±10°C.
f.
Bias conditions shall be defined by the manufacturer for latchup measurements.
g.
For SEP test limits, see table IB herein.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-03B01
A
REVISION LEVEL
D
SHEET
20
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883
method 1019 condition “B” unless otherwise specified in the AID.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes
Q and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor
prepared specification or drawing.
6.1.2 Substitutability. Device class Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system application
requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list
will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices
(FSC 5962) should contact DSCC-VA, telephone (614) 692-0544.
6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43216-5000, or telephone
(614) 692-0547.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to
this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DSCC-VA.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-03B01
A
REVISION LEVEL
D
SHEET
21
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 08-06-18
Approved sources of supply for SMD 5962-03B01 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next
dated revision of MIL-HDBK-103 and QML-38535.
Standard
Vendor
Vendor
microcircuit drawing PIN 1/
CAGE number
Similar PIN 2/ 3/
5962-03B0101QXC
4/
MMKU-MG2RTPL_M01HxxxMQ
5962-03B0102QXC
4/
MMKU-MG2RTPL_MB02HxxxMQ
5962-03B0103QXC
F7400
MMKU-MG2044PHxxxMQ
5962-03B0103VXC
F7400
SMKU-MG2044PHxxxSV
5962R03B0103VXC
F7400
SMKU-MG2044PHxxxSR
5962-03B0103QYC
F7400
MMKN-MG2044PHxxxMQ
5962-03B0103VYC
F7400
SMKN-MG2044PHxxxSV
5962R03B0103VYC
F7400
SMKN-MG2044PHxxxSR
5962-03B0103QZC
F7400
MMKW-G2044PHxxxMQ
5962-03B0103VZC
F7400
SMKW-G2044PHxxxSV
5/
5962R03B0103VZC
F7400
SMKW-G2044PHxxxSR
5/
5962-03B0103Q5C
F7400
MMKC-G2044PHxxxMQ
5/
5962-03B0103V5C
F7400
SMKC-G2044PHxxxSV
5/
5962R03B0103V5C
F7400
SMKC-G2044PHxxxSR
5/
5962-03B0104QYC
F7400
MMKN-G2142PHxxxMQ
5962-03B0104VYC
F7400
SMKN-G2142PHxxxSV
5/
5962R03B0104VYC
F7400
SMKN-G2142PHxxxSR
5/
5962-03B0104QZC
F7400
MMKW-G2142PHxxxMQ
5962-03B0104VZC
F7400
SMKW-G2142PHxxxSV
5/
5962R03B0104VZC
F7400
SMKW-G2142PHxxxSR
5/
5962-03B0105QYC
F7400
MMKN-G2270PHxxxMQ
5/
5962-03B0105VYC
F7400
SMKN-G2270PHxxxSV
5/
5962R03B0105VYC
F7400
SMKN-G2270PHxxxSR
5/
5962-03B0105QZC
F7400
MMKW-G2270PHxxxMQ
5962-03B0105VZC
F7400
SMKW-G2270PHxxxSV
5/
5962R03B0105VZC
F7400
SMKW-G2270PHxxxSR
5/
5962-03B0105QUC
4/
MM2E-G2270PHxxxMQ
5962-03B0105VUC
4/
SM2E-G2270PHxxxSV
5962R03B0105VUC
4/
SM2E-G2270PHxxxSR
5/
5/
5/
5/
1/
2/
3/
4/
5/
Standard
Vendor
Vendor
microcircuit drawing PIN 1/
CAGE number
Similar PIN 2/ 3/
5962-03B0106QTC
F7400
MMYZ-G2256AHxxxMQ
5962-03B0106VTC
F7400
SMYZ-G2256AHxxxSV
5962R03B0106VTC
F7400
SMYZ-G2256AHxxxSR
5962-03B0106QMC
F7400
MMYY-G2256AHxxxMQ
5962-03B0106VMC
F7400
SMYY-G2256AHxxxSV
5962R03B0106VMC
F7400
SMYY-G2256AHxxxSR
5962-03B0106QNC
F7400
MMYE-G2256AHxxxMQ
5962-03B0106VNC
F7400
SMYE-G2256AHxxxSV
5962R03B0106VNC
F7400
SMYE-G2256AHxxxSR
5962-03B0106Q4C
F7400
MMYD-G2256AHxxxMQ
5962-03B0106V4C
F7400
SMYD-G2256AHxxxSV
5962R03B0106V4C
F7400
SMYD-G2256AHxxxSR
The lead finish shown for each PIN representing a hermetic package is the most readily available from
the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to
determine its availability.
Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the
performance requirements of this drawing. The “xxx” is reserved to indicate the customer specific code
Due to the nature of this SMD, the standard microcircuit drawing PIN and corresponding vendor similar
PIN shall be specified in the AID.
Not available from an approved source of supply.
Not available from an approved source of supply for new design.
Vendor CAGE
number
F7400
Vendor name
and address
Atmel
La Chantrerie
44306 Nantes Cedex3
France
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.