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CS30
High side current sense high voltage op amp
Datasheet - production data
Applications
SOT23-5L
(Plastic package)
• Wireless battery chargers
• Chargers for portable equipment
• Precision current sources
• Wearable
Description
Pin connection
(Top view)
Out 1
The CS30 measures a small differential voltage
on a high-side shunt resistor and translates it into
a ground referenced output voltage. The gain is
internally fixed.
5 Vcc
Gnd 2
Vp 3
Wide input common-mode voltage range, low
quiescent current, and tiny SOT23 packaging
enable use in a wide variety of applications.
4 Vm
The input common-mode and power supply
voltages are independent. The common-mode
voltage can range from 2.8 to 30 V in operating
conditions and up to 60 V in absolute maximum
rating conditions.
Features
• Independent supply and input common-mode
voltages
• Wide common-mode operating range: 2.8 to
30 V
The current consumption below 300 µA and the
wide supply voltage range enable the power
supply to be connected to either side of the
current measurement shunt with minimal error.
• Wide common-mode surviving range: - 0.3 to
60 V (load-dump)
• Wide supply voltage range: 4 to 24 V
• Low current consumption: ICC max = 300 µA
• Internally fixed gain: 20 V/V, 50 V/V or 100 V/V
• Buffered output
Table 1. Device summary
Part number
Temperature range
Package
Packaging
CS30AL
CS30BL
-40°C to +125°C
SOT23-5L
CS30CL
March 2014
This is information on a product in full production.
DocID026040 Rev 1
Tape & reel
Marking
Gain
O104
20
O105
50
O106
100
1/18
www.st.com
Contents
CS30
Contents
1
Application schematic and pin description . . . . . . . . . . . . . . . . . . . . . . 3
2
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1
4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Parameter definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.1
Common mode rejection ratio (CMR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.2
Supply voltage rejection ratio (SVR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.3
Gain (Av) and input offset voltage (Vos) . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.4
Output voltage drift versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.5
Output voltage accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2/18
DocID026040 Rev 1
CS30
1
Application schematic and pin description
Application schematic and pin description
The CS30 high-side current sense amplifier features a 2.8 to 30 V input common-mode
range that is independent of the supply voltage. The main advantage of this feature is that it
allows high-side current sensing at voltages much greater than the supply voltage (VCC).
Figure 1. Application schematic
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Table 2 describes the function of each pin. The pin positions are shown in the illustration on
the cover page and in Figure 1 above.
Table 2. Pin description
Symbol
Type
Function
Out
Analog output
Output voltage, proportional to the magnitude of the sense voltage
Vp-Vm.
Gnd
Power supply
Ground line
VCC
Power supply
Positive power supply line
Vp
Analog input
Connection for the external sense resistor. The measured current
enters the shunt on the Vp side.
Vm
Analog input
Connection for the external sense resistor. The measured current
exits the shunt on the Vm side.
DocID026040 Rev 1
3/18
18
Absolute maximum ratings and operating conditions
2
CS30
Absolute maximum ratings and operating conditions
Table 3. Absolute maximum ratings
Symbol
Vid
Vi
Parameter
Input pins differential voltage (Vp-Vm)
Input pin voltages (Vp and Vm)
(1)
(1)
Value
Unit
±60
V
-0.3 to 60
V
-0.3 to 25
V
VCC
DC supply voltage
Vout
DC output pin voltage(1)
-0.3 to VCC
V
Tstg
Storage temperature
-55 to 150
°C
Maximum junction temperature
150
°C
SOT23-5 thermal resistance junction to ambient
250
°C/Ω
HBM: human body model(2)
2.5
kV
150
V
1.5
kV
Tj
Rthja
ESD
MM: machine model
(3)
CDM: charged device
model(4)
1. Voltage values are measured with respect to the ground pin.
2. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a
1.5kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.
3. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of
connected pin combinations while the other pins are floating.
4. Charged device model: all pins plus package are charged together to the specified voltage and then
discharged directly to the ground.
Table 4. Operating conditions
Symbol
4/18
Parameter
VCC
DC supply voltage from Tmin to Tmax
Toper
Operational temperature range (Tmin to Tmax)
Vicm
Common mode voltage range
DocID026040 Rev 1
Value
Unit
4.0 to 24
V
-40 to 125
°C
2.8 to 30
V
CS30
3
Electrical characteristics
Electrical characteristics
Table 5. Supply(1)
Symbol
ICC
Parameter
Total supply current
Test conditions
Min.
Vsense = 0 V
Tmin < Tamb < Tmax
Typ.
Max.
Unit
165
300
µA
1. Unless otherwise specified, the test conditions are Tamb = 25°C, VCC = 12 V, Vsense = Vp-Vm = 50 mV, Vm = 12 V, no load
on Out.
Table 6. Input(1)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
CMR
Common mode rejection
Variation of Vout versus Vicm
referred to input(2)
2.8 V < Vicm < 30 V
Tmin < Tamb < Tmax
90
105
dB
SVR
Supply voltage rejection
Variation of Vout versus VCC(3)
4.0 V < VCC < 24 V
Vsense = 30 mV
Tmin < Tamb < Tmax
90
105
dB
Vos
Input offset voltage(4)
Tamb = 25°C
Tmin < Tamb < Tmax
±0.2
±0.9
dVos/dT
Input offset drift vs. T
Tmin < Tamb < Tmax
-3
Ilk
Input leakage current
VCC = 0 V
Tmin < Tamb < Tmax
Iib
Input bias current
Vsense = 0 V
Tmin < Tamb < Tmax
5.5
±1.5
±2.3
mV
µV/°C
1
µA
8
µA
1. Unless otherwise specified, the test conditions are Tamb = 25°C, VCC = 12 V, Vsense = Vp-Vm = 50 mV, Vm = 12 V, no load
on Out.
2. See Section 4.1: Common mode rejection ratio (CMR) on page 12 for the definition of CMR.
3. See Section 4.2: Supply voltage rejection ratio (SVR) on page 12 for the definition of SVR.
4. See Section 4.3: Gain (Av) and input offset voltage (Vos) on page 12 for the definition of Vos.
DocID026040 Rev 1
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Electrical characteristics
CS30
Table 7. Output(1)
Symbol
Av
ΔAv
ΔVout/ΔT
Parameter
Test conditions
Gain
CS30A
CS30B
CS30C
Gain accuracy
Tamb = 25°C
Tmin < Tamb < Tmax
Output voltage drift vs. T(2)
Tmin < Tamb < Tmax
ΔVout/ΔIout Output stage load regulation
Min.
Typ.
Max.
20
50
100
V/V
±2.5
±4.5
0.4
-10 mA < Iout <10 mA
Iout sink or source current
3
Unit
%
mV/°C
4
mV/mA
ΔVout
Total output voltage accuracy(3)
Vsense = 50 mV Tamb = 25°C
Tmin < Tamb < Tmax
±2.5
±4.5
%
ΔVout
Total output voltage accuracy
Vsense = 100 mV Tamb = 25°C
Tmin < Tamb < Tmax
±3.5
±5
%
ΔVout
Total output voltage accuracy
Vsense = 20 mV Tamb = 25°C
Tmin < Tamb < Tmax
±8
±11
%
ΔVout
Total output voltage accuracy
Vsense = 10 mV Tamb = 25°C
Tmin < Tamb < Tmax
±15
±20
%
Isc-sink
Short-circuit sink current
Out connected to VCC,
Vsense = -1 V
30
60
mA
Short-circuit source current
Out connected to Gnd
Vsense = 1 V
15
26
mA
Voh
Output stage high-state saturation
voltage
Voh=VCC-Vout
Vsense = 1 V
Iout = 1 mA
0.8
1
V
Vol
Output stage low-state saturation
voltage
Vsense = -1 V
Iout = 1 mA
50
100
mV
Isc-source
1. Unless otherwise specified, the test conditions are Tamb = 25°C, VCC = 12 V, Vsense = Vp-Vm = 50 mV, Vm = 12 V, no load on
Out.
2. See Output voltage drift versus temperature on page 13 for the definition.
3. Output voltage accuracy is the difference with the expected theoretical output voltage Vout-th = Av*Vsense. See Output
voltage accuracy on page 14 for a more detailed definition.
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DocID026040 Rev 1
CS30
Electrical characteristics
Table 8. Frequency response(1)
Symbol
ts
SR
Parameter
Test conditions
Output settling to 1% final value
Vsense = 10 mV to 100 mV
Cload = 47 pF(2)
CS30A
CS30B
CS30C
Slew rate
Vsense = 10 mV to 100 mV
Min.
0.55
Typ.
Max.
Unit
3
6
10
µs
0.9
V/µs
(2)
BW
3dB bandwidth
Cload = 47 pF
Vsense = 100 mV
CS30A
CS30B
CS30C
500
670
450
kHz
1. Unless otherwise specified, the test conditions are Tamb = 25°C, VCC = 12 V, Vsense = Vp-Vm = 50 mV, Vm = 12 V, no load on
Out.
2. For stability purposes, we do not recommend using a greater value of load capacitor.
Table 9. Noise(1)
Symbol
Parameter
Test conditions
Total output voltage noise
Min.
Typ.
50
Max.
Unit
nV/√ Hz
1. Unless otherwise specified, the test conditions are Tamb = 25°C, VCC = 12 V, Vsense = Vp-Vm = 50 mV, Vm = 12 V, no load on
Out.
DocID026040 Rev 1
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18
Electrical characteristics
3.1
CS30
Electrical characteristics curves
For the following curves, the tested device is a CS30C, and the test conditions are
Tamb = 25°C, VCC = 12 V, Vsense = Vp-Vm = 50 mV, Vm = 12 V, no load on Out unless
otherwise specified.
Figure 2. Supply current vs. supply voltage
Figure 3. Supply current vs. Vsense
(Vsense = 0 V)
Figure 4. Vp pin input bias current vs. Vsense
8/18
Figure 5. Vm pin input bias current vs. Vsense
DocID026040 Rev 1
CS30
Electrical characteristics
Figure 6. Minimum common mode operating
voltage vs. temperature
Figure 7. Output stage low-state saturation
voltage versus output current (Vsense = -1 V)
Figure 8. Output stage high-state saturation
voltage versus output current
(Vsense = +1 V)
Figure 9. Output short-circuit source current
versus temperature (Out pin connected to
ground)
Figure 10. Output short-circuit sink current
versus temperature (Out pin connected to VCC)
Figure 11. Output stage load regulation
DocID026040 Rev 1
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Electrical characteristics
CS30
Figure 12. Input offset drift versus temperature
Figure 13. Output voltage drift versus
temperature
Figure 14. Bode diagram (Vsense=100mV)
Figure 15. Power-supply rejection ratio versus
frequency
CS30C
CS30B
CS30A
Figure 16. Total output voltage accuracy versus
Vsense
Figure 17. Output voltage versus Vsense
CS30A
CS30B
CS30C
10/18
DocID026040 Rev 1
CS30
Electrical characteristics
Figure 18. Output voltage versus Vsense (detail
for low Vsense values)
Figure 19. Step response
CS30C
CS30C
CS30B
CS30B
CS30A
CS30A
DocID026040 Rev 1
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18
Parameter definitions
CS30
4
Parameter definitions
4.1
Common mode rejection ratio (CMR)
The common-mode rejection ratio (CMR) measures the ability of the current-sensing
amplifier to reject any DC voltage applied on both inputs Vp and Vm. The CMR is referred
back to the input so that its effect can be compared with the applied differential signal. The
CMR is defined by the formula:
ΔV out
CMR = – 20 ⋅ log --------------------------ΔV icm ⋅ Av
4.2
Supply voltage rejection ratio (SVR)
The supply-voltage rejection ratio (SVR) measures the ability of the current-sensing
amplifier to reject any variation of the supply voltage VCC. The SVR is referred back to the
input so that its effect can be compared with the applied differential signal. The SVR is
defined by the formula:
ΔV out
SVR = – 20 ⋅ log -------------------------ΔV CC ⋅ Av
4.3
Gain (Av) and input offset voltage (Vos)
The input offset voltage is defined as the intersection between the linear regression of the
Vout versus Vsense curve with the X-axis (see Figure 20). If Vout1 is the output voltage with
Vsense=Vsense1=50mV and Vout2 is the output voltage with Vsense=Vsense2=5mV, then Vos
can be calculated with the following formula:
V sense1 – V sense2
V os = V sense1 –  ------------------------------------------------ ⋅ V out1
V out1 – V out2
The amplification gain Av is defined as the ratio between output voltage and input differential
voltage:
V out
Av = ----------------V sense
12/18
DocID026040 Rev 1
CS30
Parameter definitions
Figure 20. Vout versus Vsense characteristics: detail for low Vsense values
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4.4
Output voltage drift versus temperature
The output voltage drift versus temperature is defined as the maximum variation of Vout with
respect to its value at 25°C, over the temperature range. It is calculated as follows:
ΔV out
V out ( T amb ) – V out ( 25°C )
----------------- = max ------------------------------------------------------------------------ΔT
T amb – 25°C
with Tmin < Tamb < Tmax.
Figure 21 provides a graphical definition of output voltage drift versus temperature. On this
chart, Vout is always comprised in the area defined by dotted lines representing the
maximum and minimum variation of Vout versus T.
Figure 21. Output voltage drift versus temperature
DocID026040 Rev 1
13/18
18
Parameter definitions
4.5
CS30
Output voltage accuracy
The output voltage accuracy is the difference between the actual output voltage and the
theoretical output voltage. Ideally, the current sensing output voltage should be equal to the
input differential voltage multiplied by the theoretical gain, as in the following formula:
Vout-th=Av Vsense
The actual value is very slightly different, mainly due to the effects of:
•
the input offset voltage Vos,
•
non-linearity
Figure 22. Vout vs. Vsense theoretical and actual characteristics
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The output voltage accuracy, expressed in percentage, can be calculated with the following
formula:
abs ( V out – ( A v ⋅ V sense ) )
ΔV out = ---------------------------------------------------------------------A v ⋅ V sense
with Av = 20 V/V for CS30A, Av = 50 V/V for CS30B and Av = 100 V/V for CS30C.
14/18
DocID026040 Rev 1
CS30
5
Application information
Application information
The CS30 can be used to measure current and to feed back the information to a
microcontroller, as shown in Figure 23.
Figure 23. Typical application schematic
Vsense
Iload
2.8 V to 30 V
Rsense
Vp
Rg1
Load
Vm
Rg2
CS30
5V
Vreg
VCC
VCC
ADC
Rg3
Out
Microcontroller
Vout
Gnd
Gnd
AM06163v1
The current from the supply flows to the load through the Rsense resistor causing a voltage
drop equal to Vsense across Rsense. The amplifier input currents are negligible, therefore its
inverting input voltage is equal to Vm. The amplifier's open-loop gain forces its non-inverting
input to the same voltage as the inverting input. As a consequence, the amplifier adjusts
current flowing through Rg1 so that the voltage drop across Rg1 exactly matches Vsense.
Therefore, the drop across Rg1 is: VRg1=Vsense=Rsense.Iload
If IRg1 is the current flowing through Rg1, then IRg1 is given by the formula: IRg1=Vsense/Rg1
The IRg1 current flows entirely into resistor Rg3 (the input bias current of the buffer is
negligible). Therefore, the voltage drop on the Rg3 resistor can be calculated as follows:
VRg3=Rg3.IRg1=(Rg3/Rg1).Vsense
Because the voltage across the Rg3 resistor is buffered to the Out pin, Vout can be
expressed as:
Vout=(Rg3/Rg1).Vsense or Vout=(Rg3/Rg1).Rsense.Iload
The resistor ratio Rg3/Rg1 is internally set to 20V/V for CS30A, to 50V/V for CS30B and to
100V/V for CS30C.
The Rsense resistor and the Rg3/Rg1 resistor ratio (equal to Av) are important parameters
because they define the full scale output range of your application. Therefore, they must be
selected carefully.
DocID026040 Rev 1
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18
Package information
6
CS30
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 24. SOT23-5L package mechanical drawing
Table 10. SOT23-5L package mechanical data
Dimensions
Ref.
A
Millimeters
Min.
Typ.
Max.
Min.
Typ.
Max.
0.90
1.20
1.45
0.035
0.047
0.057
A1
16/18
Inches
0.15
0.006
A2
0.90
1.05
1.30
0.035
0.041
0.051
B
0.35
0.40
0.50
0.013
0.015
0.019
C
0.09
0.15
0.20
0.003
0.006
0.008
D
2.80
2.90
3.00
0.110
0.114
0.118
D1
1.90
0.075
e
0.95
0.037
E
2.60
2.80
3.00
0.102
0.110
0.118
F
1.50
1.60
1.75
0.059
0.063
0.069
L
0.10
0.35
0.60
0.004
0.013
0.023
K
0 degrees
10 degrees
DocID026040 Rev 1
CS30
7
Revision history
Revision history
Table 11. Document revision history
Date
Revision
06-Mar-2014
1
Changes
Initial release
DocID026040 Rev 1
17/18
18
CS30
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