500 MHz Voltage Feedback Op Amp

NCS2551
500 MHz Voltage Feedback
Op Amp
NCS2551 is a 500 MHz voltage feedback monolithic operational
amplifier featuring high slew rate and low differential gain and phase
error. The voltage feedback architecture allows for a superior
bandwidth and low power consumption.
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Features
−3.0 dB Small Signal BW (AV = +2.0, VO = 0.5 Vp−p) 500 MHz Typ
Slew Rate 1400 V/ms
Supply Current 5.5 mA
Input Referred Voltage Noise 6.0 nV/ ǸHz
THD −62 dBc (f = 5.0 MHz, VO = 2.0 Vp−p)
Output Current 100 mA
Pin Compatible with AD8055, TSH341
This is a Pb−Free Device
5
1
SOT23−5
(TSOP−5)
SN SUFFIX
CASE 483
MARKING DIAGRAM
Applications
• Line Drivers
• Radar/Communication Receivers
5
YF1 AYWG
G
NORMALIZED GAIN (dB)
3
1
YF1
= Specific Device Code
A
= Assembly Location
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
0
VOUT = 0.5 VPP
−3
VOUT = 1.0 VPP
VOUT = 2.0 VPP
−6
−9
−12
−15
10k
SOT23−5 PINOUT
Gain = +2
VS = ±5V
RF = 150W
RL = 150W
100k
10M
1M
FREQUENCY (Hz)
100M
1G
Figure 1. Frequency Response:
Gain (dB) vs. Frequency Av = +2.0
OUT
1
VEE
2
+IN
3
5 VCC
+
•
•
•
•
•
•
•
•
−
4 −IN
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
September, 2006 − Rev. 2
1
Publication Order Number:
NCS2551/D
NCS2551
PIN FUNCTION DESCRIPTION
Pin
(SOT23−5/SC70)
Symbol
Function
1
OUT
Output
Equivalent Circuit
VCC
ESD
OUT
VEE
2
VEE
Negative Power Supply
3
+IN
Non−inverted Input
VCC
ESD
ESD
−IN
+IN
VEE
4
−IN
Inverted Input
5
VCC
Positive Power Supply
See Above
VCC
−IN
+IN
OUT
CC
VEE
Figure 2. Simplified Device Schematic
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2
NCS2551
ATTRIBUTES
Characteristics
Value
ESD
Human Body Model
Machine Model
Charged Device Model
2.0 kV
200 V
1.0 kV
Moisture Sensitivity (Note 1)
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
1. For additional information, see Application Note AND8003/D.
MAXIMUM RATINGS
Parameter
Symbol
Rating
Unit
Power Supply Voltage
VS
11
Vdc
Input Voltage Range
VI
vVS
Vdc
Input Differential Voltage Range
VID
vVS
Vdc
Output Current
IO
100
mA
Maximum Junction Temperature (Note 2)
TJ
150
°C
Operating Ambient Temperature
TA
−40 to +85
°C
Storage Temperature Range
Tstg
−60 to +150
°C
Power Dissipation
PD
(See Graph)
mW
RqJA
158
°C/W
Thermal Resistance, Junction−to−Air
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded.
MAXIMUM POWER DISSIPATION (mW)
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated is
limited by the associated rise in junction temperature. For
the plastic packages, the maximum safe junction
temperature is 150°C. If the maximum is exceeded
momentarily, proper circuit operation will be restored as
soon as the die temperature is reduced. Leaving the device
in the “overheated’’ condition for an extended period can
result in device damage.
1400
1200
1000
800
600
400
200
0
−50
−25
0
25
50
75 100
AMBIENT TEMPERATURE (C)
125 150
Figure 3. Power Dissipation vs. Temperature
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3
NCS2551
AC ELECTRICAL CHARACTERISTICS (VCC = +5.0 V, VEE = −5.0 V, TA = −40°C to +85°C, RL = 150 W to GND, RF = 150 W,
AV = +2.0, Enable is left open, unless otherwise specified).
Symbol
Characteristic
Conditions
Min
Typ
Max
Unit
FREQUENCY DOMAIN PERFORMANCE
BW
GF0.1dB
Bandwidth
3.0 dB Small Signal
3.0 dB Large Signal
0.1 dB Gain Flatness
Bandwidth
MHz
AV = +2.0, VO = 0.5 Vp−p
AV = +2.0, VO = 2.0 Vp−p
500
300
AV = +2.0
15
MHz
dG
Differential Gain
AV = +2.0, RL = 150 W, f = 3.58 MHz
0.06
%
dP
Differential Phase
AV = +2.0, RL = 150 W, f = 3.58 MHz
0.06
°
Slew Rate
AV = +2.0, Vstep = 2.0 V
1400
V/ms
Settling Time
0.1%
AV = +2.0, Vstep = 2.0 V
10
(10%−90%) AV = +2.0, Vstep = 2.0 V
2.4
ns
TIME DOMAIN RESPONSE
SR
ts
tr tf
Rise and Fall Time
ns
HARMONIC/NOISE PERFORMANCE
THD
Total Harmonic Distortion
f = 5.0 MHz, VO = 2.0 Vp−p
−62
dB
HD2
2nd Harmonic Distortion
f = 5.0 MHz, VO = 2.0 Vp−p
−68
dBc
HD3
3rd Harmonic Distortion
f = 5.0 MHz, VO = 2.0 Vp−p
−63
dBc
IP3
Third−Order Intercept
f = 10 MHz, VO = 1.0 Vp−p
40
dBm
Spurious−Free Dynamic
Range
f = 5.0 MHz, VO = 2.0 Vp−p
63
dBc
SFDR
eN
Input Referred Voltage Noise
f = 1.0 MHz
6.0
nVń ǸHz
iN
Input Referred Current Noise
f = 1.0 MHz
3.0
pAń ǸHz
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4
NCS2551
DC ELECTRICAL CHARACTERISTICS (VCC = +5.0 V, VEE = −5.0 V, TA = −40°C to +85°C, RL = 150 W to GND, RF = 150 W,
AV = +2.0, Enable is left open, unless otherwise specified).
Symbol
Characteristic
Conditions
Min
Typ
Max
Unit
−10
0
+10
mV
DC PERFORMANCE
VIO
DVIO/DT
IIB
DIIB/DT
Input Offset Voltage
Input Offset Voltage
Temperature Coefficient
mV/°C
6.0
Input Bias Current
VO = 0 V
"3.2
"20
Input Bias Current
Temperature Coefficient
VO = 0 V
"40
nA/°C
"3.0
"4.0
V
40
50
dB
mA
INPUT CHARACTERISTICS
VCM
CMRR
Input Common Mode
Voltage Range (Note 3)
Common Mode
Rejection Ratio
(See Graph)
RIN
Input Resistance
4.5
MW
CIN
Differential Input Capacitance
1.0
pF
0.1
17
W
OUTPUT CHARACTERISTICS
ROUT
Output Resistance
Closed Loop
Open Loop
VO
Output Voltage Range
"3.0
"4.0
V
IO
Output Current
"50
"100
mA
10
V
POWER SUPPLY
VS
Operating Voltage Supply
IS
Power Supply Current
PSRR
Power Supply Rejection Ratio
(See Graph)
3. Guaranteed by design and/or characterization.
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5
2.0
5.5
40
60
10
mA
dB
NCS2551
AC ELECTRICAL CHARACTERISTICS (VCC = +2.5 V, VEE = −2.5 V, TA = −40°C to +85°C, RL = 150 W to GND, RF = 150 W,
AV = +2.0, Enable is left open, unless otherwise specified).
Symbol
Characteristic
Conditions
Min
Typ
Max
Unit
FREQUENCY DOMAIN PERFORMANCE
BW
GF0.1dB
Bandwidth
3.0 dB Small Signal
3.0 dB Large Signal
0.1 dB Gain Flatness
Bandwidth
MHz
AV = +2.0, VO = 0.5 Vp−p
AV = +2.0, VO = 1.0 Vp−p
400
200
AV = +2.0
10
MHz
dG
Differential Gain
AV = +2.0, RL = 150 W, f = 3.58 MHz
0.07
%
dP
Differential Phase
AV = +2.0, RL = 150 W, f = 3.58 MHz
0.06
°
Slew Rate
AV = +2.0, Vstep = 1.0 V
800
V/ms
Settling Time
0.1%
AV = +2.0, Vstep = 1.0 V
10
(10%−90%) AV = +2.0, Vstep = 1.0 V
2.2
ns
TIME DOMAIN RESPONSE
SR
ts
tr tf
Rise and Fall Time
ns
HARMONIC/NOISE PERFORMANCE
THD
Total Harmonic Distortion
f = 5.0 MHz, VO = 1.0 Vp−p
−59
dB
HD2
2nd Harmonic Distortion
f = 5.0 MHz, VO = 1.0 Vp−p
−60
dBc
HD3
3rd Harmonic Distortion
f = 5.0 MHz, VO = 1.0 Vp−p
−67
dBc
IP3
Third−Order Intercept
f = 10 MHz, VO = 0.5 Vp−p
35
dBm
Spurious−Free Dynamic
Range
f = 5.0 MHz, VO = 1.0 Vp−p
60
dBc
SFDR
eN
Input Referred Voltage Noise
f = 1.0 MHz
6.0
nVń ǸHz
iN
Input Referred Current Noise
f = 1.0 MHz
3.0
pAń ǸHz
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6
NCS2551
DC ELECTRICAL CHARACTERISTICS (VCC = +2.5 V, VEE = −2.5 V, TA = −40°C to +85°C, RL = 150 W to GND, RF = 150 W,
AV = +2.0, Enable is left open, unless otherwise specified).
Symbol
Characteristic
Conditions
Min
Typ
Max
Unit
−10
0
+10
mV
DC PERFORMANCE
VIO
DVIO/DT
IIB
DIIB/DT
Input Offset Voltage
Input Offset Voltage
Temperature Coefficient
mV/°C
6.0
Input Bias Current
VO = 0 V
"3.2
"20
Input Bias Current
Temperature Coefficient
VO = 0 V
"40
nA/°C
"0.9
"1.5
V
40
50
dB
mA
INPUT CHARACTERISTICS
VCM
CMRR
Input Common Mode Voltage
Range (Note 3)
Common Mode Rejection
Ratio
(See Graph)
RIN
Input Resistance
4.5
MW
CIN
Differential Input Capacitance
1.0
pF
0.1
17
W
OUTPUT CHARACTERISTICS
ROUT
Output Resistance
Closed Loop
Open Loop
VO
Output Voltage Range
"0.9
"1.5
V
IO
Output Current
"50
"100
mA
5.0
V
POWER SUPPLY
VS
Operating Voltage Supply
IS
Power Supply Current
PSRR
Power Supply Rejection Ratio
(See Graph)
4. Guaranteed by design and/or characterization.
+
−
VIN
VOUT
RL
RF
RF
Figure 4. Typical Test Setup
(AV = +2.0, RF = 150 kW, RL = 150 W)
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7
2.0
5.2
40
60
10
mA
dB
3
9
0
6
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
NCS2551
VOUT = 0.5 VPP
−3
VOUT = 1.0 VPP
VOUT = 2.0 VPP
−6
−9
−12
−15
10k
Gain = +2
VS = ±5V
RF = 150W
RL = 150W
100k
3
0
VOUT = 0.5 VPP
−3
−6
−9
1M
10M
FREQUENCY (Hz)
−12
10k
1G
100M
Gain = +1
VS = ±5V
RF = 150W
RL = 150W
100k
Figure 5. Frequency Response:
Gain (dB) vs. Frequency
Av = +2.0
1G
10G
9
Gain = +1
VOUT = 1.0 VPP
6
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
1M
10M
100M
FREQUENCY (Hz)
Figure 6. Frequency Response:
Gain (dB) vs. Frequency
Av = +1.0
9
3
0
Gain = +2
VOUT = 2.0 VPP
−3
−6
−9
VOUT = 1.0 VPP
VS = ±5V
RF = 150W
RL = 150W
−12
10k
100k
Gain = +2
VOUT = 1.0 VPP
1M
10M
100M
FREQUENCY (Hz)
6
Gain = +1
3
0
−3
Gain = +2
−6
VOUT = 0.5 VPP
VS = ±5V
RF = 150W
RL = 150W
−9
1G
−12
10k
10G
Figure 7. Large Signal Frequency Response
Gain (dB) vs. Frequency
100k
1M
10M
100M
FREQUENCY (Hz)
1G
Figure 8. Small Signal Frequency Response
Gain (dB) vs. Frequency
VS = ±5V
VS = ±5V
Figure 9. Small Signal Step Response
Vertical: 500 mV/div
Horizontal: 10 ns/div
Figure 10. Large Signal Step Response
Vertical: 2V/div
Horizontal: 10 ns/div
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8
10G
NCS2551
−50
−50
DISTORTION (dB)
−55
−55
−60
HD3
−65
HD2
THD
−60
HD3
−65
HD2
−70
−70
−75
VS = ±5V
f = 5MHz
RL = 150 W
THD
DISTORTION (dB)
VS = ±5 V
VOUT = 2 VPP
RL = 150 W
−75
1
0
100
10
1
0.5
FREQUENCY (MHz)
Figure 11. THD, HD2, HD3 vs. Frequency
VS = ±5V
PSRR (dB)
CMRR (dB)
4
4.5
−20
−30
−40
−30
−5V
−40
+5V
−50
−50
−60
−60
10
100
10k
1k
FREQUENCY (Hz)
−70
10k
1M
100k
Figure 13. CMRR vs. Frequency
1M
10M
FREQUENCY (Hz)
100M
Figure 14. PSRR vs. Frequency
0.04
0.04
VS = ±5V
RL = 150W
Gain = +2
0.02
DIFFERENTIAL PHASE (°)
DIFFERENTIAL GAIN (%)
3.5
−10
−20
0.01
0
3.58MHz
−0.01
−0.02
4.43MHz
−0.03
−0.04
−0.8
3
0
−10
0.02
2
2.5
VOUT (VPP)
Figure 12. THD, HD2, HD3 vs. Output Voltage
0
0.03
1.5
0
VS = ±5V
RL = 150W
Gain = +2
3.58MHz
−0.02
−0.04
−0.06
4.43MHz
−0.08
−0.1
−0.12
10MHz
−0.14
20MHz
−0.6
−0.4
10MHz
−0.2
0
0.2
0.4
OFFSET VOLTAGE (V)
0.6
−0.16
−0.8
0.8
Figure 15. Differential Gain
20MHz
−0.6
−0.4
−0.2
0
0.2
0.4
OFFSET VOLTAGE (V)
Figure 16. Differential Phase
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9
0.6
0.8
NCS2551
10
10
OUTPUT VOLTAGE (VPP)
9
CURRENT (mA)
8
85°C
7
6
25°C
5
−40°C
4
3
2
25°C
8
85°C
7
6
−40°C
5
4
3
1
0
9
4
5
6
7
8
10
9
2
11
4
5
6
7
8
9
POWER SUPPLY VOLTAGE (V)
POWER SUPPLY VOLTAGE (V)
Figure 17. Supply Current vs. Power Supply
11
Figure 18. Output Voltage Swing vs. Supply Voltage
9
1000
10pF
NORMALIZED GAIN (dB)
VS = ±5V
100
10
1
0.1
6
3
0
−3
−6
−9
0.01
10k
100k
10M
1M
100M
−12
10k
1G
100pF
Gain = +2
VOUT = 0.5 VPP
VS = ±5V
RF = 150W
RL = 150W
100k
47pF
1M
100M
1G
Figure 20. Frequency Response vs. Capacitive
Load
50
VS = ±5 V
40
30
20
10
0
100
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 19. Closed Loop Output Resistance vs.
Frequency
VOLTAGE NOISE (nV/√Hz)
OUTPUT RESISTANCE (W)
10
1k
10k
100k
FREQUENCY (Hz)
Figure 21. Input Referred Voltage Noise vs.
Frequency
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10
1M
10G
NCS2551
Printed Circuit Board Layout Techniques
to input overdrive voltages above the supplies. The ESD
diodes can support high input currents with current limiting
series resistors. Keep these resistor values as low as possible
since high values degrade both noise performance and
frequency response. Under closed−loop operation, the ESD
diodes have no effect on circuit performance. However,
under certain conditions the ESD diodes will be evident. If
the device is driven into a slewing condition, the ESD diodes
will clamp large differential voltages until the feedback loop
restores closed−loop operation. Also, if the device is
powered down and a large input signal is applied, the ESD
diodes will conduct.
NOTE: Human Body Model for +IN and –IN pins are
rated at 0.8kV while all other pins are rated at
2.0kV.
Proper high speed PCB design rules should be used for all
wideband amplifiers as the PCB parasitics can affect the
overall performance. Most important are stray capacitances
at the output and inverting input nodes as it can effect
peaking and bandwidth. A space (3/16″ is plenty) should be
left around the signal lines to minimize coupling. Also,
signal lines connecting the feedback and gain resistors
should be short enough so that their associated inductance
does not cause high frequency gain errors. Line lengths less
than 1/4″ are recommended.
Video Performance
This device designed to provide good performance with
NTSC, PAL, and HDTV video signals. Best performance is
obtained with back terminated loads as performance is
degraded as the load is increased. The back termination
reduces reflections from the transmission line and
effectively masks transmission line and other parasitic
capacitances from the amplifier output stage.
VCC
Internal
Circuitry
External
Pin
ESD Protection
All device pins have limited ESD protection using internal
diodes to power supplies as specified in the attributes table
(see Figure 22). These diodes provide moderate protection
VEE
Figure 22. Internal ESD Protection
ORDERING INFORMATION
Device
NCS2551SNT1G
Package
Shipping †
SOT23−5 (TSOP−5)
(Pb−Free)
3000/Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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11
NCS2551
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE F
NOTE 5
2X
0.10 T
2X
0.20 T
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5. OPTIONAL CONSTRUCTION: AN
ADDITIONAL TRIMMED LEAD IS ALLOWED
IN THIS LOCATION. TRIMMED LEAD NOT TO
EXTEND MORE THAN 0.2 FROM BODY.
D 5X
0.20 C A B
5
1
4
2
3
M
B
S
K
L
DETAIL Z
G
A
DIM
A
B
C
D
G
H
J
K
L
M
S
DETAIL Z
J
C
0.05
SEATING
PLANE
H
T
SOLDERING FOOTPRINT*
0.95
0.037
MILLIMETERS
MIN
MAX
3.00 BSC
1.50 BSC
0.90
1.10
0.25
0.50
0.95 BSC
0.01
0.10
0.10
0.26
0.20
0.60
1.25
1.55
0_
10 _
2.50
3.00
1.9
0.074
2.4
0.094
1.0
0.039
0.7
0.028
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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For additional information, please contact your local
Sales Representative
NCS2551/D
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