5 4 3 Schematics Drafted in : Allegro Design entry CIS 16.6 2 REV D 1 Revision Notes Approver Designer Date A0 Initial Draft Release SHEKHAR SAINI VINOD KUMAR 03NOV2014 A1 Customer Release1 SHEKHAR SAINI Arun Kumar PN 09DEC2014 A2 No Design Change, only stackup was changed SHEKHAR SAINI Arun Kumar PN 15DEC2014 B1 I2C Master Selct SW removed & SOT pckg LDO used SHEKHAR SAINI Arun Kumar PN 28MAY2015 D IoT Camera Development Kit Contents Page No Sheet Name C C B A 01 COVER_PAGE 02 BLOCK_DIAGRAM 03 POWER ON SEQUENCE 04 POWER & RESET SCHEME 05 BATTERY_SECTION 06 POWER_SUPPLY 07 DDR2 CONTROLLER & MEMORY 08 EXTERNAL MEMORY INTERFACE 09 IMAGE_INPUT_INTERFACE 10 ETH_PHY_SD_CARD_I/F 11 USB_AND_UART_INTERFACE 12 AUDIO INTERFACE 13 IMAGE_OUTPUT_OSC 14 SoC_ANALOG_POWER 15 SoC_DIGITAL_POWER 16 ETHERNET_PHY 17 Wi-Fi_GS2011MIES 18 BT_NRF51822 19 PIR & STATUS_LEDS 20 MISCELLANEOUS B A <Variant Name> A3 5 4 3 2 Title : COVER_PAGE Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 1 of B1 20 5 4 3 2 1 BLOCK DIAGRAM D D C C B B A A <Variant Name> A3 5 4 3 2 Title : BLOCK_DIAGRAM Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 2 of B1 20 5 4 3 2 1 D D C C B B A A <Variant Name> A3 5 4 3 2 Title : POWER ON SEQUENCE Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 3 of B1 20 5 4 3 2 1 D D C C B B RESET SCHEME A A <Variant Name> A3 5 4 3 2 Title : POWER & RESET SCHEME Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 4 of B1 20 5 4 3 2 1 D D BATTERY CHARGER IC VCC_VBAT U13 VCC_V_BUS FUEL GUAGE VCC_VBAT_TEST L1 IN2 SW2 C1 R1 33mE FB42 FB43 C2 BT1 VCC_MCU_3V3 CBOOT BATTERY ILIM2 CHARGER R4 NM 0E B3 OTG WEAK FET BAT E3 FTRY SPM CAP1 10uF CAP2 C3 B2 PGND1 PGND2 B1 AGND 2.2uF BAT_CAP C257 CORE D1 D2 5V_REF C256 SCL SDA FLAG# 10K FG_ALARMB D4 Q1 NTLUS3A18PZ 5,17,19 MCU_I2C_SCL E4 3 5,17,19 MCU_I2C_SDA D5 13,17 FG_ALARMB V_BAT_P E5 C5 BC_FTRY R5 NM 0E A3 BC_SPM R7 NM 0E A5 A4 MCU_I2C_SCL 5,17,19 MCU_I2C_SDA 5,17,19 B5 R10 R233 100E 12 R234 100E 11 R230 0E 5 6 7 14 15 BC_TRANS V_BAT_P U44 1uF C SCL SDA TEMP_OUT TSENSE TSW 10 R232 9 100K ALARM# TEST0 TEST1 TEST2 NC1 NC2 NC3 NC4 R9 VCC_MCU_3V3 NM 10K 3.7V/4.2Ah 13 D3 VDD2 SENSN 1 ILIM1 4 8 B4 0E TEMP_OUT 3 1 2 5 6 7 R3 V_BAT_P 2 C463 SENSP C4 + _ VCC_MCU_3V3 V_BAT_P R231 TRANS VCC_V_BUS 0.1uF R2 NM 0E 0.01uF 2 E2 E1 RES# 4 8 16 2 R229 100K V_BAT_P C462 LC709202 0.1uF 620E D1 NCP1855 B BAT_STAT 1 BC_TRANS C253 1 C251 C252 22uF C BATTERY 30E 30E 3 A2 10uF SW1 VDD1 C250 IN1 VSS A1 2.2uH R I2C SLAVE ADDRESS=x16C B Note: Initial Battery Voltage shall be above 3.4V(VFET = 3.4V) to put the battery in charging cycle Without Battery, DC-DC O/P voltage is 3.6V (VBAT =0(<VFET) and SPM = 0 (Default) and CHG-EN = 1(Default)) A A <Variant Name> A3 5 4 3 2 Title : BATTERY_SECTION Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 5 of B1 20 5 4 3 2 1 VCC_VBAT POWER SUPPLY VCC_MCU_3V3 VCC_VBAT VCC_VBAT R582 R583 R584 10K 10K 10K 3V3 REGULATION R586 C509 NM 0.1uF U50 10K 1 VIN EN Z22 VCC_VBAT PWRON_MCU_VCC 6 JMPx1 C86 H16 KILL# PWRON_MCU_VCC MCU_OFF 17 R580 6 0E EN SWITCHER R88 8 NC 9 10K VCC_MCU_3V3 FB35 30E 12 VCC_VBAT 11 VSEL R89 22uF 10K Vih(min) for the VSEL pin is not defined LM3668SD-2833 VCC_2V8_PLL REGULATION VCC_1V35_TEST VCC_1V35 U6 10uF Z23 7 0.1uF 2 1 H8 5 HDR_1X2 R28 R588 SW SYNC BUCK REG AVIN EN 0E 1 3 9 JMPx1 PVIN 1uH VCC_MCU_3V3 FB36 C263 4 FB 6 MODE/PG R24 1V35_PG 30E 220K VCC_2V8_PLL_TEST VCC_1V35_TEST 1V35_PG R26 3 0E R25 R27 IN EN C269 C268 10uF 22uF NCP6332 OUT PG 5 FB37 30E C267 42V8_PLL_PG C 10uF NCP752BSN28T1G 10K 1V35_PG 174K VCC_2V8_PLL U7 1 27pF GND C265 L3 2 2 10uF C264 PGND AGND AGND_EP 8 C534 17 SYS_PWR_EN MODE/SYNC FB AUTOMATIC MODE(ADAPTIVE SWITCHING TO PWM/PFM MODE 1.35V REGULATION FROM VCC_VBAT 1 VOUT C89 SGND After a pushbutton turn-off event is detected, the LTC2950 interrupts the system (µP) by bringing the INT pin low. Once the system finishes its power down and housekeeping tasks, it sets KILL low, which in turn releases the enable output. ON Time = 1.4 sec OFF Time = 3 sec C 10 2.2uH VCC_MCU_3V3_TEST Mount R580 after power testing 0.1uF L2 2 SW2 C510 NM 0.47uF 4 SW1 R587 LTC2950-1 10K VCC_VBAT RANGES 3.0V TO 4.35V D 5 7 VDD HDR_1X2 0E PVIN MCU_OFF_REQ 17 NM 8 10uF PGND OFFT C508 0.22uF 5 R585 4 C507 INT# ONT SGND_EP 7 U15 3 3 0.1uF 2 1 LTC2950-1 13 C506 PB# GND 2 11 ON_OFF_SW D VCC_2V8_PLL_TEST R616 Enable By GS2011 10K SoC POWER ON SEQUENCE 1.8V REGULATION FROM C466 L4 U47 VCC_2V8_VAA 10uF 7 0.1uF 5 B EN_1V8_SoC R36 EN 30E 27pF FB MODE/PG 4 1uH R31 0E2 R248 220K R250 1V8_PG 10K EN C467 0.01uF 5 TADJ POWER SEQUENCER C274 1V8_PG 22uF 10K 0E 4 R249 FLAG2 FLAG3 INV VCC_2V8_VAA_TEST 10K 10K 7 EN_1V8_SoC 6 EN_3V3_SoC VCC_2V8_VAA U10 100K EN_2V8_VAA R32 R618 8 FLAG1 R35 VCC_MCU_3V3 R252 1 R34 6 R251 R30 VCC C270 NCP6332 3 0E IN EN C275 100K OUT PG 5 FB38 30E C273 42V8_VAA_PG 10uF B NCP752BSN28T1G VCC_2V8_VAA_TEST 10uF R617 100K R624 LM3881 3 1 3 9 0E FB39 VCC_1V8_TEST SYNC BUCK REG AVIN 2 VCC_2V8_PLL GND C272 SW PGND AGND AGND_EP C271 PVIN 0.1uF GND U9 VCC_1V8 2 VCC_1V8_TEST 8 10uF VCC_2V8_VAA REGULATION VCC_2V8_VAA VCC_2V8_VAA VCC_VBAT 1 VCC_VBAT RANGES 3.0V TO 4.35V C532 10K 2V8_PLL_PG 2V8_VAA_PG 10K 10K C277 SoC_RESET_SW SW2 10K R42 0E 2.4K 7 8 NC SUPERVISOR RESET# TP3 7 V_RESET 4 PFI R41 PFO# 5 PFO# AND_PFO#_SOC_RESET 5 3 V_RESET 6 SOC_POR_nRESET 13 A R39 R40 GND NL27WZ08 MAX708 10K 10K 10K 2 R43 R44 <Variant Name> 100K 1K 5 AND_PFO#_SOC_RESET 2 17 SOC_nRESET 3 1 KMR231NG 0.1uF 1 PFO# RESET 0.1uF 1 2 Q8 NTK3134 6 C279 3 +0.85V (Vgs) MR# R38 DM368 RESET A 1 4 C278 NM 0.1uF 0.1uF VCC U12 VCC NTLUS3A18PZ U11 GND 3 Vth(max) = -1.0V (VGS) C276 VCC_1V8 2 R37 VCC_3V3 3 4 8 4 EN_3V3_SoC VCC_3V3 VCC_3V3 7 6 5 2 1 8 Q2 VCC_MCU_3V3 Vth = SYSTEM RESET-SOC POR DM368 VOTLAGE RESET SOC 3V3 POWER ENABLE A2 4 3 2 Title : POWER_SUPPLY Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 6 of B1 20 5 4 3 2 1 DDR2 CONTROLLER & MEMORY DDR2 CONTROLLER D VCC_1V8 VCC_1V8 D VCC_DDR_VREF_0V9 C280 T12 R13 10E ST_DDR_CLK_P W11 10E ST_DDR_CLK_N W12 DDR_DQM0 DDR_DQM1 T11 W6 DDR INTERFACE DDR_DQS[0] DDR_DQS[0]# DDR_RAS# DDR_CAS# DDR_WE# DDR_DQS[1] DDR_DQS[1]# DDR_CS# DDR_CKE DDR_DQGATE0 DDR_CLK DDR_CLK# DDR_DQGATE1 DDR_PADREFP DDR_DQM[0] DDR_DQM[1] DDR_VREF T7 U6 DDR_DQS1_P DDR_DQS1_N T8 R45 DDR_A0 TP64 DDR_A13 DDR_BA0 DDR_BA1 DDR_BA2 10E T9 R11 P11 R48 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 L2 L3 L1 DDR_RAS# DDR_CAS# DDR_W E# K7 L7 K3 DDR_CS# DDR_CKE L8 K2 DDR_CLK_P J8 DDR_CLK_N K8 49.9E VCC_DDR_VREF_0V9 DDR_DQM0 DDR_DQM1 F3 B3 TMS320DM368 K9 J1 C1 G1 C3 G3 C7 G7 A9 C9 E9 G9 A1 E1 R1 J9 M9 J2 DDR_DQ[15:0] DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DDR2 SDRAM BA0 BA1 BA2 LDQS LDQS#/NU RAS# CAS# WE# UDQS UDQS#/NU CS# CKE CK CK# G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 DDR_DQ0 DDR_DQ1 DDR_DQ2 DDR_DQ3 DDR_DQ4 DDR_DQ5 DDR_DQ6 DDR_DQ7 DDR_DQ8 DDR_DQ9 DDR_DQ10 DDR_DQ11 DDR_DQ12 DDR_DQ13 DDR_DQ14 DDR_DQ15 F7 E8 DDR_DQS0_P DDR_DQS0_N B7 A8 DDR_DQS1_P DDR_DQS1_N DDR_DQ0 TP61 DDR_DQ15 TP62 C A2 E2 NC1 NC2 R3 R7 RFU_R3 RFU_R7 LDM UDM ODT VSS1 VSS2 VSS3 VSS4 VSS5 C281 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 VDDL DDR_DQS0_P DDR_DQS0_N TP63 DDR_A0 DDR_A1 DDR_A2 DDR_A3 DDR_A4 DDR_A5 DDR_A6 DDR_A7 DDR_A8 DDR_A9 DDR_A10 DDR_A11 DDR_A12 DDR_A13 VREF T10 U9 U2 DDR_A[0:13] N1 A3 E3 J3 P9 0.1uF VSSDL DDR_CS# DDR_CKE TMS320DM368 DDR_DQ0 DDR_DQ1 DDR_DQ2 DDR_DQ3 DDR_DQ4 DDR_DQ5 DDR_DQ6 DDR_DQ7 DDR_DQ8 DDR_DQ9 DDR_DQ10 DDR_DQ11 DDR_DQ12 DDR_DQ13 DDR_DQ14 DDR_DQ15 J7 DDR_RAS# U12 DDR_CAS# V12 DDR_W E# W13 DDR_BA[0] DDR_BA[1] DDR_BA[2] U11 V11 R10 V10 W10 V9 W9 R9 W8 U8 R8 V8 W7 R7 V7 V6 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 W14 T13 V13 DDR_DQ[15:0] DDR_DQ00 DDR_DQ01 DDR_DQ02 DDR_DQ03 DDR_DQ04 DDR_DQ05 DDR_DQ06 DDR_DQ07 DDR_DQ08 DDR_DQ09 DDR_DQ10 DDR_DQ11 DDR_DQ12 DDR_DQ13 DDR_DQ14 DDR_DQ15 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 DDR_BA0 DDR_BA1 DDR_BA2 DDR_A00 DDR_A01 DDR_A02 DDR_A03 DDR_A04 DDR_A05 DDR_A06 DDR_A07 DDR_A08 DDR_A09 DDR_A10 DDR_A11 DDR_A12 DDR_A13 VDD1 VDD2 VDD3 VDD4 VDD5 U14 V14 W15 T14 U15 V15 W16 T15 W17 U16 V16 W18 V17 T16 B2 D2 F2 H2 A7 E7 B8 D8 F8 H8 C DDR_A0 DDR_A1 DDR_A2 DDR_A3 DDR_A4 DDR_A5 DDR_A6 DDR_A7 DDR_A8 DDR_A9 DDR_A10 DDR_A11 DDR_A12 DDR_A13 VDD18_DDR_1 VDD18_DDR_2 VDD18_DDR_3 VDD18_DDR_4 VDD18_DDR_5 VDD18_DDR_6 DDR_A[13:0] DDR_CLK_P R46 DDR_CLK_N R47 N9 N11 P9 P10 P12 R12 0.01uF U1A AS4C128M16D2-25BCN Layout Notes: Place Differential Pair(_DQSn_P/_DQSn_N) 100Ohms Differential Impedance Short and Straight as Possibile with minimum number of Vias. B B VCC_1V8 VREF SOURCE VCC_1V8 C3 C4 C5 C6 10uF 10uF 1uF 1uF R49 C282 PLACE THE CAPS CLOSER TO THE VDD, VDDQ, VDDL PINS OF DDR2 VCC_1V8 0.1uF VCC_DDR_VREF_0V9 1K C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF R50 C283 0.1uF 1K A A PLACE CLOSE TO DDR2 VREF pin <Variant Name> A3 5 4 3 2 Title : DDR2 CONTROLLER & MEMORY Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 7 of B1 20 5 4 3 2 EXTERNAL MEMORY INTERFACE 1 NOR FLASH INTERFACE VCC_3V3 VCC_3V3 VCC_3V3 R51 10K C24 C25 C26 0.01uF 0.01uF 0.1uF EM_A14/EM_BA[0] P17 EM_BA1 R17 10K 10K EM_CE0# EM_CE1# M17 J17 M15 11 SoC_REV0 EM_D00/HD0 K16 EM_D1 EM_D01/HD1 EM_D02/HD2 EM_D04/HD4 EM_D05/HD5 EM_D06/HD6 EM_D07/HD7 EM_D09/GIO58/HD9 C EM_W E# J15 EM_OE# J19 EM_W AIT J18 EM_D13/GIO62/HD13 EM_OE#/GIO53/HDS1# EM_D14/GIO63/HD14 EM_WAIT/GIO52/HRDY# EM_D15/GIO64/HD15 EM_D6 L16 EM_D7 EM_CE0# EM_CE1# N16 EM_D11 R55 R56 P19 EM_D13 VCC_3V3 13 NOR_RESET P16 EM_D14 R57 B4 D8 F1 VPP/WP# F2 G2 A5 B5 F7 VCCQ2 EM_OE# EM_W E# NOR_RESET 8 EM_A21 0E 0E NM P15 EM_D12 EM_D12/GIO61/HD12 EM_WE#/GIO54/HDS2# EM_D5 L18 N18 EM_D10 EM_D10/GIO59/HD10 EM_CLK/GIO50 EM_ADV/GIO51/HR_W# EM_D4 L19 N19 EM_D9 EM_D11/GIO60/HD11 NAND_W P M16 L15 N15 EM_D8 EM_D08/GIO57/HD8 EM_CE0#/GIO56/HCS# EM_CE1#/GIO55/HAS# EM_A4 K15 EM_D3 EM_D03/HD3 EM_BA0/EM_A14/GIO65/KEYB0 EM_BA1/GIO66/KEYB1/HINT# TP72 K19 EM_D2 NOR FLASH CE# OE# WE# RST# BYTE# 15K BYTE# P18 EM_D15 VSS3 R52 R53 EM_A00/GIO67/KEYB2/HCNTLB EM_A01/HHWIL EM_A02/HCNTLA EM_A03/GIO68/KEYB3 EM_A04/GIO69/KEYA0 EM_A05/GIO70/KEYA1 EM_A06/GIO71/KEYA2 EM_A07/GIO72/KEYA3 EM_A08/GIO73/AECFG[0] EM_A09/GIO74/AECFG[1] EM_A10/GIO75/AECFG[2] EM_A11/GIO76/BTSEL[0] EM_A12/GIO77/BTSEL[1] EM_A13/GIO78/BTSEL[2] K18 EM_D0 H7 VCC_3V3 L17 M19 M18 R15 R19 R16 R18 T17 T19 T18 U19 V19 U18 V18 E8 EM_A0 EM_A1 EM_A2 EM_A3 EM_A4 EM_A5 EM_A6 EM_A7 EM_A8 EM_A9 EM_A10 EM_A11 EM_A12 EM_A13 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 VCCQ1 E2 D2 C2 A2 B2 D3 C3 A3 B6 A6 C6 D6 B7 A7 C7 D7 E7 B3 C4 D5 D4 C5 B8 VSS2 EM_A0 EM_A1 EM_A2 EM_A3 EM_A4 EM_A5 EM_A6 EM_A7 EM_A8 EM_A9 EM_A10 EM_A11 EM_A12 EM_A13 EM_A14 EM_A15 EM_A16 EM_A17 EM_A18 EM_A19 EM_A20 H2 EM_A[20:0] EM_D[15:0] 10 EM_A[20:0] VSS1 TMS320DM368 External Memory Interface D U3 VCC EM_BA1 G5 U1B EM_D[15:0] DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15/A-1 RY/BY# RFU1 RFU2 RFU3 RFU4 RFU5 RFU6 RFU7 RFU8 RFU9 RFU10 RFU11 RFU12 E3 H3 E4 H4 H5 E5 H6 E6 F3 G3 F4 G4 F5 G6 F6 G7 A4 EM_D0 EM_D1 EM_D2 EM_D3 EM_D4 EM_D5 EM_D6 EM_D7 EM_D8 EM_D9 EM_D10 EM_D11 EM_D12 EM_D13 EM_D14 D EM_BA0 8 VCC_3V3 EM_W AIT R54 10K A1 A8 B1 C1 C8 D1 E1 F8 G1 G8 H1 H8 C PC28F128M29EW L TMS320DM368 NAND FLASH INTERFACE VCC_3V3 BOOT MODE SELECTION BOOT MODE SELECTION TABLE :(DEFAULT: NOR 16-BIT) SW 3 B VCC_3V3 R60 10K R63 1K EM_A8 AECFG[1] ON 1 2 4 AECFG[0] R61 EM_A9 3 R64 1K 10K R66 10K EM_A10 1 R68 10K EM_A11 2 ON 1K R72 1K BTSEL[1] BTSEL[2] 2 NAND Boot 0 0 0 SD Boot 0 1 0 1 EM_A13 0 0 EM_A12 EM_A11 AECFG[2] R67 1K ADD MUX BTSEL[0] 1K 8-bit NOR Boot 0 1 0 16-bit NOR Boot 1 0 1 NAND Boot 0 0 R69 VIL(MAX)=0.8V ON 1 1 3 SW 5 R70 0 4 TDA02H0SB1 VCC_3V3 EM_A12 4 EM_A13 3 R71 R73 10K AECFG2 Address Line 10K EM_A10 AECFG1 EM_CE0# EM_CE1# R58 R59 NM 0E 0E VCC_3V3 R62 10K EM_A1 EM_A2 C4 D5 EM_CE# EM_OE# C6 D4 EM_W E# C7 NAND_W P C3 G3 G5 G8 A1 A2 A9 A10 B1 B9 B10 D6 D7 D8 E3 E4 E5 E6 E7 E8 F3 F4 AECFG0 0 EM_A9 EM_A8 TDA02H0SB1 Address Mux A EM_A14/EM_BA[0] R74 0E R75 R76 0E NM 0E R30, R31, R33 EM_BA0 8 8-bit NOR R32, R34 EM_A14 8 IN GENERAL 11 EM_A21/EM_A14 5 R78 0E NM 0E R32, R34 R30, R31, R33 EM_BA0 8 BOOT MODES SW1.1SW1.2SW2.1SW2.2SW3.1SW3.2 OFF OFF OFF ON OFF OFF EM_A21 8 NOR 8-bit ON ON ON OFF OFF OFF EM_A14 8 NOR 16-bit OFF OFF OFF OFF OFF OFF NAND R77 No-Mount 4 ALE CLE I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 CE# RE# WE# WP# DNU_G3 DNU_G5 DNU_G8 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 C28 C29 C30 C31 0.01uF 0.01uF 0.01uF 0.01uF 10uF R/B# NAND FLASH NC19 NC20 NC21 NC22 NC23 NC24 NC25 NC26 NC27 NC28 NC29 NC30 NC31 NC32 NC33 NC34 NC35 NC36 NC37 H4 J4 K4 K5 K6 J7 K7 J8 EM_D0 EM_D1 EM_D2 EM_D3 EM_D4 EM_D5 EM_D6 EM_D7 EM_D2 TP71 B VCC_3V3 C8 EM_W AIT R65 10K F5 F6 F8 G6 G7 H3 H5 H6 H7 J3 J5 L1 L2 L9 L10 M1 M2 M9 M10 A C5 F7 K3 K8 EM_D15 Mount 16-bit NOR VCC1 VCC2 VCC3 VCC4 BTSEL0 0 Address Line SW 4 BTSEL1 NOR Boot USB TDA02H0SB1 VCC_3V3 BTSEL2 VSS1 VSS2 VSS3 VSS4 Boot Mode EM_A[20:0] C27 U4 EM_D[15:0] MT29F2G08ABAEAH4-IT:E D3 G4 H8 J6 NOTE: BY DEFAULT THE SWITCH SHOULD BE AT OFF POSITION. VCC_3V3 SD CARD OFF OFF OFF OFF ON OFF USB OFF OFF OFF ON OFF ON 3 <Variant Name> A3 2 Title : EXTERNAL MEMORY INTERFACE Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 8 of B1 20 5 4 3 2 1 IMAGE INPUT INTERFACE VCC_1V8 VCC_2V8_PLL VCC_1V8 VCC_2V8_VAA VCC_2V8_VAA TP5 U1D C_WE_FIELD/GIO93/CLKOUT0/USBDRVVBUS PCLK DM368_IMG_RESET IMG_TRIGGER DOUT[11:0] R82 10K 10K A3 B3 10K A5 B5 A6 B6 DOUT0 DOUT1 DOUT2 DOUT3 DOUT4 DOUT5 DOUT6 DOUT7 A4 B4 1V8_IMG_SDA R83 10E HD_SIGNAL C14 R273 E13 ST_IMG_CLK R85 D13 R275 10E 10E D5 10K 1V8_IMG_SCL E6 SLVS3_P SLVS3_N AR0230CS SLVSC_P SLVSC_N DIGITAL E9 VAA_PIX C1 D9 F9 G1 VAA1 VAA2 VAA3 VAA4 A8 E1 G9 H1 J2 J7 J9 VDD_IO1 VDD_IO2 VDD_IO3 VDD_IO4 VDD_IO5 VDD_IO6 VDD_IO7 C4 B1 VDD_PLL SLVS2_P SLVS2_N LINE_VALID IMAGE SENSOR FRAME_VALID SDATA EXTCLK SADDR PIXCLK SCLK FLASH 10E VD_SIGNAL B14 R274 E3 SLVS1_P SLVS1_N DOUT[11:0] DOUT0 DOUT1 DOUT2 DOUT3 DOUT4 DOUT5 DOUT6 DOUT7 DOUT8 DOUT9 DOUT10 DOUT11 IMG_CLK R84 0E OE_BAR J8 IMG_TRIGGER D6 P_CLK DM368_IMG_RESET R220 H7 0E TMS320DM368 OE# TRIGGER RESET# R246 10K RESERVED1 RESERVED2 DOUT0 DOUT1 DOUT2 DOUT3 DOUT4 DOUT5 DOUT6 DOUT7 DOUT8 DOUT9 DOUT10 DOUT11 F6 HD_SIGNAL E5 VD_SIGNAL D3 IMG_CLK D4 P_CLK E4 IMG_FLASH TP6 B9 IMG_SHUTTER TP7 C9 F7 RSVD1 RSVD2 TP8 TP9 H8 TEST DOUT11 TP59 DOUT0 TP60 R19 0E AR0230CS I2C R87 J4 J3 J1 H6 H5 H4 G6 G5 G4 F5 F4 F3 C SHUTTER AGND1 AGND2 AGND3 AGND4 AGND5 VD/GIO94 R79 R80 SLVS0_P SLVS0_N C2 D8 E8 F8 G2 HD/GIO95 B17 A18 C16 A17 A16 B16 C15 A15 A2 B2 DOUT8 DOUT9 DOUT10 DOUT11 B7 B8 C3 C6 C7 C8 D2 D7 E2 E7 F2 G3 G7 G8 H2 H3 J6 CIN0 CIN1 CIN2 CIN3 CIN4 CIN5 CIN6 CIN7 D15 D14 B15 A14 D12 B13 A13 C12 VDD_SLVS DOUT[11:0] YIN0/GIO96 YIN1/GIO97 YIN2/GIO98 YIN3/GIO99 YIN4/GIO100/SPI3_SOMI/SPI3_SCS[1]# YIN5/GIO101/SPI3_SCS[0]# YIN6/GIO102/SPI3_SIMO YIN7/GIO103/SPI3_SCLK VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 U17 VIDEO INPUT INTERFACE C A7 A9 C5 D1 F1 H9 J5 D TMS320DM368 DGND1 DGND2 DGND3 DGND4 DGND5 DGND6 DGND7 DGND8 DGND9 DGND10 DGND11 DGND12 DGND13 DGND14 DGND15 DGND16 DGND17 D SLAVE ADDRESS=x20(write), X21(read) 0E AGND AGND VCC_1V8 VCC_2V8_VAA VCC_2V8_VAA VCC_2V8_PLL C324 0.1uF VCC_3V3 B C325 0.1uF B 11 SOC_I2C_SCL 6 5 EN 2 R96 R97 1.5K 1.5K C293 C294 C295 C296 C297 C298 C299 C300 C301 C302 C303 C304 C305 0.1uF C307 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.01uF 0.01uF 0.01uF 0.01uF 10uF 0.1uF 0.01uF 10uF C306 0.1uF Layout Notes: PLACE NEAR VAA PINS OF AR0230 AGND SCL2 SCL1 SDA2 SDA1 1 11 SOC_I2C_SDA 8 GND 10K VREF1 U19 VREF2 R93 7 VCC_1V8 3 1V8_IMG_SCL 4 1V8_IMG_SDA AGND VCC_1V8 PCA9306 C308 C309 C310 C311 C312 C461 C318 C319 10uF 0.1uF 0.1uF 0.1uF 0.01uF 0.01uF 0.01uF 10uF Layout Notes: PLACE NEAR VAA_PIX PINS OF AR0230 Layout Notes: PLACE NEAR VDD_PLL PINS OF AR0230 Layout Notes: PLACE NEAR VDD PINS OF AR0230 VCC_1V8 A VCC_1V8 C326 C327 C328 C329 C334 C335 C340 C341 10uF 0.1uF 0.1uF 0.01uF 0.01uF 10uF 0.1uF 10uF Layout Notes: PLACE NEAR VDDIO PINS OF AR0230 <Variant Name> Layout Notes: PLACE NEAR C5 A3 5 4 3 2 A Title : PIN OF AR0230 IMAGE_INPUT_INTERFACE Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 9 of B1 20 5 4 3 2 1 SD CARD INTERFACE D D U1C TMS320DM368 Eth Media Access Ctrl & SD Card Interface 16 16 16 16 A3 A2 C2 B2 EPHY_RXD0 EPHY_RXD1 EPHY_RXD2 EPHY_RXD3 B4 A4 B3 16 EPHY_RXDV 16 EPHY_RXER 16 EPHY_RXCLK 16 16 16 16 B1 C1 D3 D1 EPHY_TXD0 EPHY_TXD1 EPHY_TXD2 EPHY_TXD3 E4 E1 16 EPHY_TXEN 16 EPHY_TXCLK R99 17 MCU_PRGM_SoC_W AKE 16 EPHY_MDC 16 EPHY_MDIO C 0E SoC_GIO0 B5 D6 C4 D2 C5 16 EPHY_COL 16 EPHY_CRS GIO7/EMAC_RXD0 GIO8/EMAC_RXD1 GIO9/EMAC_RXD2 GIO10/EMAC_RXD3 MMCSD0_DATA0 MMCSD0_DATA1 MMCSD0_DATA2 MMCSD0_DATA3 GIO5/EMAC_RX_DV GIO4/EMAC_RX_ER GIO6/EMAC_RX_CLK MMCSD0_CMD MMCSD0_CLK GIO11/EMAC_TXD0 GIO12/EMAC_TXD1 GIO13/EMAC_TXD2 GIO14/EMAC_TXD3 H18 H19 H17 H16 SoC_SD0_DATA0 SoC_SD0_DATA1 SoC_SD0_DATA2 SoC_SD0_DATA3 SoC_SD0_CMD H15 J16 R98 10E SoC_SD0_CLK EM_A[20:0] 8 GIO38/MMCSD1_DATA0/EM_A15 GIO39/MMCSD1_DATA1/EM_A16 GIO40/MMCSD1_DATA2/EM_A17 GIO41/MMCSD1_DATA3/EM_A18 GIO17/EMAC_TX_EN/UART1_RXD GIO16/EMAC_TX_CLK/UART1_TXD GIO0 GIO1/MDCLK GIO2/MDIO V5 R5 U5 W5 EM_A15 EM_A16 EM_A17 EM_A18 R6 T6 EM_A19 EM_A20 C GIO42/MMCSD1_CMD/EM_A19 GIO43/MMCSD1_CLK/EM_A20 GIO15/EMAC_COL GIO3/EMAC_CRS TMS320DM368 VCC_3V3 SD CARD CONN VCC_3V3 B2 U20 B1 SD0_CMD C1 VCC_EXT SD0_CLK CLK_INT CMD_INT SD0_DATA0 SD0_DATA1 CD1 CD2 10K P1 SD0_DATA0 SD0_DATA1 SD0_DATA2 SD0_DATA3 R608 SD0_CD 13 R609 CON_MICROSD SDCMD_EXT EMI-FILTER DATA0_INT DATA1_INT DATA2_INT DATA3_INT SDDATA0_EXT SDDATA1_EXT SDDATA2_EXT SDDATA3_EXT B4 SoC_SD0_CLK C4 SoC_SD0_CMD A4 A3 D3 D4 SoC_SD0_DATA0 SoC_SD0_DATA1 SoC_SD0_DATA2 SoC_SD0_DATA3 B EMI6316 Layout Notes: To be placed very close the SD Connector PGB1010603 2 A1 A2 D2 D1 SDCLK_EXT GND2 10uF GND1 0.1uF SD0_CLK 1 DET_SW-B DET_SW-A SD0_DATA2 SD0_DATA3 SD0_CMD 1 2 3 4 5 6 7 8 C343 B3 S1 S2 S3 S4 DAT 2 CD/DAT 3 CMD VDD CLK VSS DAT 0 DAT 1 C342 C3 B MICRO-SD J5 1K A A <Variant Name> A3 5 4 3 2 Title : ETH_PHY_SD_CARD_I/F Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 10 of B1 20 5 4 3 2 1 For DM368 Rev Control VCC_3V3 D PORT1: UART0 MICRO USB B CONNECTOR R605 D 10K 10K 6 U21 D+ ID GND CON_USB_M_UART CON_USB_P_UART CON_USB_P_UART 1 CON_USB_M_UART 2 IN_1+ OUT_1+ EMI-FILTER IN_1- OUT_1- FB22 3 4 5 CON_USB Micro-B C TMS320DM368 R604 8 USB_P_UART0 7 USB_M_UART0 10K R101 SPI, UART, USB & ADC 10K 17 MCU_SoC_GPIO1 17 SoC_MCU_STDY_W AKE SOC_UART1_TX GND_EP S5 S6 D- 9 S4 1 2 3 4 5 VBUS VCC_3V3 SoC_REV0 8 NM GND1 GND2 GND3 S3 R606 VDD/ID VCC_V_BUS_UART S1 S2 U1F SoC_REV0 SoC_REV1 VCC_V_BUS_UART J2 SPI, UART, USB, ADC Controllers R603 NM 17 MCU_SPI_MOSI 17 MCU_SPI_MISO 17 MCU_SPI_CLK 17 MCU_SPI_CS EMI2121 18 BT_SPI_MOSI 18 BT_SPI_MISO 18 BT_SPI_CLK 18 BT_SPI_CS 30E TP42 R102 R103 R104 R105 0E 0E 10E 0E SPI1_MOSI SPI1_MISO SPI1_CLK SPI1_CS U1 T2 V1 U2 R106 R107 R108 R109 0E 0E 10E 0E SPI2_MOSI SPI2_MISO SPI2_CLK SPI2_CS T4 U4 W2 V3 NM NM NM NM SOC_UART1_RX V4 SoC_REV1 W3 W4 T5 TP41 USB TO UART CONVERTER R2 V2 T3 T1 8 EM_A21/EM_A14 17 MCU_SoC_GPIO4 GIO22/SPI0_SIMO GIO23/SPI0_SOMI/SPI0_SCS[1]#/PWM0 GIO24/SPI0_SCLK GIO25/SPI0_SCS[0]#/PWM1/UART1_TXD USB_VBUS USB_ID USB_DP USB_DM GIO26/SPI1_SIMO GIO27/SPI1_SOMI/SPI1_SCS[1]#/B0 GIO28/SPI1_SCLK/B1 GIO29/SPI1_SCS[0]#/G0 VCOM GIO30/SPI2_SIMO/G1 GIO31/SPI2_SOMI/SPI2_SCS[1]#/CLKOUT2 GIO32/SPI2_SCLK/R0 GIO33/SPI2_SCS[0]#/USBDRVVBUS/R1 LINEO MICIP MICIN SPP SPN GIO34/SPI4_SIMO/SPI4_SOMI/UART1_RXD GIO35/SPI4_SOMI/SPI4_SCS[1]#/CLKOUT1 GIO36/SPI4_SCLK/EM_A21/EM_A14 GIO37/SPI4_SCS[0]#/MCBSP_CLKS/CLKOUT0 ADC_CH0 ADC_CH1 ADC_CH2 ADC_CH3 ADC_CH4 ADC_CH5 VCC_V_BUS_UART USB_P_UART0 6 USB_M_UART0 7 3V3OUT 1 VCC 8 C347 0.01uF VCCIO U22 C346 0.1uF RXD TXD USBDP FT230X USBDM USB to UART Interface C349 GND_EP 17 RESET# GND2 9 3 10K 13 R117 GND1 FT_VCC_3V3_OUT B VCC_3V3 CTS# RTS# CBUS0 CBUS1 CBUS2 CBUS3 R594 NM R595 NM 18 DB_SW DCLK 18 DB_SW DIO/BLE_RST# 10 C345 0.01uF FT_VCC_3V3_OUT B6 A5 18 BT_GPIO_16 18 BT_GPIO_17 FT_VCC_3V3_OUT 2 15 R118 R119 1.5K 1.5K 17 MCU_SoC_GPIO2 18 BT_GPIO_20 SOC_UART0_TX SOC_UART0_RX 4 16 0E 0E SOC_UART0_RX SOC_UART0_TX E6 D5 E7 C6 E3 E2 F1 F3 9 SOC_I2C_SCL 9 SOC_I2C_SDA GIO45/MCBSP_CLKR GIO48/MCBSP_CLKX N2 M1 N1 P1 VCC_V_BUS USB_ID SOC_USB_P SOC_USB_M A8 1.5K VCOM B8 C8 C344 10uF MIC_IN_P 12 AVSS_VC MIC_IN_N 12 C9 B9 A9 E8 R110 B7 R111 A7 R112 D8 R113 D7 R114 A6 R115 10K 10K 10K 10K 10K 10K R116 GIO46/MCBSP_DR GIO49/MCBSP_DX COMPY COMPPB COMPPR GIO44/MCBSP_FSR GIO47/MCBSP_FSX VREF IREF GIO19/UART0_RXD GIO18/UART0_TXD IDACOUT VFB GIO20/UART1_CTS/I2C_SCL GIO21/UART1_RTS/I2C_SDA TVOUT 12 11 5 14 C SPEAKER_P 12 SPEAKER_N 12 0E B12 A12 C11 D11 A11 R610 R611 0E 0E B11 B10 A10 TMS320DM368 B FT230XQ 0.01uF Layout Notes: Differential Pair 90 ohm Differential Impedance short and straight as possible with minimum number of VIAS. VCC_V_BUS J4 VCC_MCU_3V3 A 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 USB_W AKEUP_MCU 17 SOC_USB_M SOC_USB_P VCC_V_BUS ON_OFF_SW 6 FACTORY_RESET 17 4 3 25.5K R661 47K C529 0.1uF A <Variant Name> A3 CON_B2B_2X10 5 R647 2 Title : USB_AND_UART_INTERFACE Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 11 of B1 20 5 4 3 2 1 AUDIO INTERFACE D D Microphone VCC_2V8_PLL REGULATION VCC_2V8_MIC_TEST VCC_2V8_MIC VCC_2V8_MIC U52 1 2V8_MIC_EN 3 C516 EN OUT 2 10uF IN GND VCC_3V3 PG 5 42V8_MIC_PG FB40 30E C515 C479 C513 C511 10uF 1uF 10uF 0.1uF R612 NCP752BSN28T1G VCC_2V8_MIC_TEST AVSS_VC 2.2K R620 MK2 VCC_3V3 R619 0E 2V8_MIC_EN C 2V8_MIC_PG 10K + 1 MIC_P _ 2 MIC_N CMC-5044TF-A C512 1uF R410 R411 0E R409 MIC_IN_P 11 C478 1uF C MIC_IN_N 11 R412 NM NM 0E 2.2K 0E AVSS_VC AVSS_VC SPEAKER INTERFACE VCC_3V3 B A2 C360 10uF 11 SPEAKER_P 11 SPEAKER_N C361 0.01uF A1 C362 0.01uF C1 VDD U26 INP INM OUTP AUDIO OUTM AGND PGND B3 B1 R133 CNTL 0E SPEAKER_P R614 0E B A3 NM C531 100uF SPK_P 1 C3 C530 100uF SPK_N 2 NM PWR - AMP C2 13 SoC_AMP_CNTL SPEAKER_N R613 SP1 + INTEGRATED ASSEMBLY _ CABLE SP-1605 B2 NC NCP2824 10K A A <Variant Name> A3 5 4 3 2 Title : AUDIO INTERFACE Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 12 of B1 20 5 4 3 2 1 IMAGE OUTPUT AND OSC SECTION D D NOTE: JTAG controllers from Texas Instruments actively drive TRST high. However, some third-party JTAG controllers may not drive TRST high but expect the use of a pullup resistor on TRST IMAGE OUTPUT INTERFACE PRTCSS & OSC U1G TMS320DM368 U1E TMS320DM368 VIDEO OUPUT INTERFACE YOUT0[G5] YOUT1[G6] YOUT2[G7] YOUT3[R3] YOUT4[R4] YOUT5[R5] YOUT6[R6] YOUT7[R7] GIO85/COUT0[B3]/PWM3 GIO86/COUT1[B4]/PWM3/STTRIG GIO87/COUT2[B5]/PWM2/RTO3 GIO88/COUT3[B6]/PWM2/RTO2 GIO89/COUT4[B7]/PWM2/RTO1 GIO90/COUT5[G2]/PWM2/RTO0 GIO91/COUT6[G3]/PWM1 GIO92/COUT7[G4]/PWM0 C HSYNC/GIO84 VSYNC/GIO83 LCD_OE/GIO82 VCLK/GIO79 GIO80/EXTCLK/B2/PWM3 GIO81_OSCCFG/LCD_FIELD/R2/PWM3 VCC_3V3 NOR_RESET R148 C514 E16 F17 F19 F16 F18 F15 G19 G16 R137 10K 10K 1000pF SOC_TDI SOC_TDO SOC_TMS JTAG_TRST# SOC_TCK F5 G4 G2 H5 F4 SOC_RTCK F2 SOC_EMU0 SOC_EMU1 G5 H4 H3 6 SOC_POR_nRESET R143 D17 D18 D19 D16 R615 E17 E15 E19 E18 0E SoC_LED_RED_CTRL 19 SoC_LED_GREEN_CTRL 19 SoC_MCU_W AKE_UP 17 NOR_RESET 8 SoC_PBT_PW R_EN 18 C363 36pF R145 1 GND FG_ALARMB 5,17 K1 3 GND 24MHz SD0_CD 10 RTCK EMU0 EMU1 PWCTRO0 PWCTRO1 PWCTRO2 PWCTRO3 RESET# RSV0 RSV1 RSV2 PWRCNTON PWRST MXI1 RTCXI MXO1 RTCXO J3 J2 J1 J5 J4 K5 K4 R134 10K R217 NM 0E R136 NM 0E R138 10K R139 10K R140 10K R141 10K PIR_DIG_OUT 17,19 MCU_PRGM_GPIO27 17 R142 0E K2 L5 L4 L3 M3 PW RST R144 1K M2 PW RCNTON R146 1K VCC_1V35 L2 VSS_MX1 VSS_32K G1 R147 1K R149 1K H1 H2 C364 36pF EPHY_RSTn 16 B18 PWCTRIO0 PWCTRIO1 PWCTRIO2 PWCTRIO3 PWCTRIO4 PWCTRIO5 PWCTRIO6 C 4 C19 0E A1 R1 R4 L1 X1 2 G15 G18 10K TDI TDO TMS TRST# TCK R150 NM 0E TMS320DM368 MCU_SoC_GPIO3 17 B19 SoC_AMP_CNTL 12 C18 OSCCFG R100 TMS320DM368 10K JTAG CONNECTIONS B B VCC_3V3 TP13 C365 SOC_TDI 10uF SOC_TMS SOC_TCK SOC_RTCK SOC_TDO SOC_EMU0 SOC_EMU1 TP14 TP15 TP16 TP17 Place all togther in 0.1inch spacing. TP18 TP19 TP20 TP21 Please place all together. A A <Variant Name> A3 5 4 3 2 Title : IMAGE_OUTPUT_OSC Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 13 of B1 20 5 4 3 2 1 ANALOG POWER VCC_1V8 U1H VCC_1V35 VCC_3V3 G6 G8 H7 H8 H12 J8 J12 J14 K8 K12 L13 M6 M10 M12 M13 D R3 VCC_1V8 G14 H11 H14 J7 M14 P7 VDD_ISIF18_33_1 VDD_ISIF18_33_2 CVDD1 CVDD2 CVDD3 CVDD4 CVDD5 CVDD6 CVDD7 CVDD8 CVDD9 CVDD10 CVDD11 CVDD12 CVDD13 CVDD14 CVDD15 VDD_AEMIF1_18_33_1 VDD_AEMIF1_18_33_2 VDD_AEMIF2_18_33_1 VDD_AEMIF2_18_33_2 VDD12_PRTCSS_1 VDD12_PRTCSS_2 C C367 1uF P14 R14 VCC_1V8 VCCA_USB_1V8 30E FB10 C104 C106 C107 1uF 0.1uF 1uF 30E FB11 30E C109 D 0.1uF K14 L14 AVSS J6 K7 AVSS AVSS FB12 VCC_3V3 VCCA_VC_3V3 VCC_1V8 30E FB14 30E K6 C111 C113 C249 C114 1uF 0.1uF 0.01uF 1uF AVSS_VC VCC_DAC_1V35 TMS320DM368 VDDS18_1 VDDS18_2 VDDS18_3 VDDS18_4 VDDS18_5 VDDS18_6 POWER VDDA12_DAC VDDA12LDO_USB 30E VCCA_VC_1V8 VCC_1V8 VPP E12 M5 C110 C248 0.1uF 0.01uF C366 0.22uF AVSS_VC VCCA_VC_1V8 AVSS_VC E9 VCCA_PLL_1V8 VDD18_SLDO VDDA18_PLL D4 FB9 FB13 VDD18_PRTCSS VCC_3V3 F6 F7 F10 H6 H13 L12 N6 P5 P6 VCCA_USB_3V3 VCC_3V3 VCC_1V35 VDDA18_VC E5 F12 F13 N4 VCC_1V8 VCCA_PLL_1V8 VCCA_ADC_1V8 FB16 VDDS33_1 VDDS33_2 VDDS33_3 VDDS33_4 VDDS33_5 VDDS33_6 VDDS33_7 VDDS33_8 VDDS33_9 VDDA18_ADC VDDA18_DAC VDDA18_USB 30E G9 VCCA_DAC_1V8 D10 C117 C119 C120 1uF 0.1uF 0.01uF C VCCA_USB_1V8 N5 AVSS VCCA_VC_3V3 VDDRAM VDDA33_VC E10 VCCA_USB_3V3 VCC_1V8 VCCA_DAC_1V8 VCCA_PLL_1V8 L6 VDDMXI VDDA33_USB P4 FB17 TMS320DM368 30E C124 C126 C127 1uF 0.1uF 0.01uF VCCA_ADC_1V8 VCC_1V8 FB19 30E U1I B A19 E14 F14 G11 G12 H9 H10 J9 J10 J11 J13 K9 K10 K11 L7 L8 L9 L10 L11 M7 M8 M9 M11 N8 N12 N14 P8 P13 W1 W19 A DAC/ADC is not used VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSSA12_DAC VSSA18_USB C130 C131 1uF 0.1uF 0.01uF B F11 P2 VCC_DAC_1V35 VCC_1V35 VSSA_ADC TMS320DM368 GROUND VSSA18_DAC VSSA18_VC VSSA33_VC F8 FB21 30E C132 C134 C135 1uF 0.1uF 0.01uF E11 F9 D9 AVSS_VC VSSA33_USB P3 A VSSA M4 TMS320DM368 5 C128 4 <Variant Name> A3 AVSS 3 2 Title : SoC_ANALOG_POWER Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 14 of B1 20 5 4 3 2 1 D D DIGITAL POWER CAPS VCC_1V35 VCC_1V35 C136 C137 C138 C139 C140 C141 C142 C143 C144 C145 C146 C147 C148 C149 C150 C151 C152 C153 C154 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 560pF 560pF 560pF 560pF 560pF 560pF 560pF 560pF 10uF 10uF 10uF Layout Notes: PLACE NEAR CVDD PINS OF DM368 C C VCC_3V3 VCC_3V3 C155 C156 C157 C158 C159 C160 C161 C162 C163 C164 C165 C166 C167 C168 C169 C170 C171 C172 C173 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 560pF 560pF 560pF 560pF 560pF 560pF 560pF 560pF 10uF 10uF 10uF Layout Notes: PLACE NEAR VDDS33 PINS OF DM368 VCC_1V8 VCC_1V8 C174 C175 C176 C177 C178 C179 C180 C181 C182 C183 C184 C185 C186 C187 C188 C189 C190 C191 C192 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 560pF 560pF 560pF 560pF 560pF 560pF 560pF 560pF 10uF 10uF 10uF B B Layout Notes: PLACE NEAR PINS OF 1.8V POWER SECTION A A <Variant Name> A3 5 4 3 2 Title : SoC_DIGITAL_POWER Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 15 of B1 20 5 4 3 2 1 Place Ce, Cf,Cg,FBb close to PWFBOUT and place Ch close to PWFBIN. ETHERNET PHY PHY_PW FBOUT Ce C368 Cf C369 10uF 10uF Cg C370 FB27 VCC_3V3 VCC_3V3 0.1uF FBa D FBb FB28 30E AVDD33 Ca Cb C371 0.1uF C372 Cc C373 Cd C374 0.1uF 0.1uF 10uF 30E PHY_PW FBIN 10 EPHY_RXDV 10 EPHY_RXER NOTE: set set set set set set set 6 5 4 3 EPHY_TXD0 EPHY_TXD1 EPHY_TXD2 EPHY_TXD3 2 10 EPHY_TXEN ISOLATE to '0' for make MII interface active MII/SNIB to '1' for MII mode RPTR to '0' for normal mode SPEED to '1' for 100/AUTO mode DUPLEX to '1' for full duplex ANE to '1' for Auto negotiation LDPS to '1' for Power save mode Enable 22 24 16 10 EPHY_RXCLK 10 10 10 10 C EPHY_RXER 7 10 EPHY_TXCLK EPHY_CRS 23 10 EPHY_CRS 1 10 EPHY_COL 36 DVDD33_1 DVDD33_2 AVDD33 RXDV RXER/FXEN RXC TXD0 TXD1 TXD2 TXD3 MDIO MDC RTL8201CP ETHERNET PHY ISOLATE RPTR DUPLEX SPEED LDPS ANE COL RESET# 9 10 12 13 15 PWFBOUT 31 30 PHY_RDp PHY_RDn 34 33 PHY_TDp PHY_TDn AGND_PHY T1 1 TD 28 26 1CT:1CT 2 EPHY_MDIO 25 6 RD R156 EPHY_MDC 10 43 16 TX_P 14 TX_N 15 CTX 11 RX_P 9 RX_N 10 CRX TX 3 EPHY_MDIO 10 1CT:1CT VCC_3V3 7 40 38 39 41 37 RX 2K C 8 EPHY_RSTn 42 8 PHY_PW FBIN 32 PHY_PW FBOUT EPHY_RSTn 13 X2 LED0/PHYAD0 LED1/PHYAD1 LED2/PHYAD2 LED3/PHYAD3 LED4/PHYAD4 X1 749 013 011 C377 46 1 2 47 3 4 0.1uF R162 R165 R163 R164 CLOCK NC 29 35 27 MII/SNI# X2 DGND1 DGND2 DGND3 PHY_AD0/LINK_LED PHY_AD1/LED1 PHY_AD2/LED2 PHY_AD3/ACT_LED PHY_AD4/LED4 11 17 45 10K 10K 10K 10K 10K PWFBIN AGND1 AGND2 VCC_3V3 R157 R158 R159 R160 R161 0.1uF CRS VCC_3V3 44 TPTX+ TPTXRTSET TXEN TXC C376 0.1uF 4 5 12 13 EPHY_COL EPHY_RXER EPHY_CRS EPHY_MDIO EPHY_RSTn TPRX+ TPRX- NETWORK INTERFACE 10K 10K 10K 10K 10K C375 AGND_PHY CONFIG R151 R152 R153 R154 R155 RXD0 RXD1 RXD2 RXD3 MII-INTERFACE VCC_3V3 21 20 19 18 EPHY_RXD0 EPHY_RXD1 EPHY_RXD2 EPHY_RXD3 AGND_PHY 14 48 Ch U27 10 10 10 10 D AGND_PHY AGND_PHY Place FBa, Ca, Cb, Cc, Cd as close to each power pin as possible. FB29 30E 49.9E 49.9E 49.9E 49.9E C378 C379 24pF 24pF 25MHz AGND_PHY AGND_PHY C380 RTL8201CP-LF 0.1uF AGND_PHY C381 PHY Address[:] =1000b 0.1uF AGND_PHY AGND_PHY B B RJ45 CONN J7 TX_P TX_N RX_P R167 75E R169 75E RX_N CTX CRX R168 R171 75E 75E L1 1 2 3 4 5 6 7 8 DA+ DADB+ DC+ DCDBDD+ DD- G R166 510E PHY_AD0/LINK_LED R170 510E PHY_AD3/ACT_LED S1 S2 L3 Y C382 L2 L4 CON_RJ45 1000pF C383 1000pF A A <Variant Name> A3 5 4 3 2 Title : ETHERNET_PHY Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 16 of B1 20 5 4 3 2 1 MCU+WI-FI: GS2011MIES VRTC VCC_MCU_CT_3V3 VCC_MCU_3V3 VCC_MCU_CT_3V3 GS2011 RESET D VCC_MCU_CT_3V3 VRTC FB34 R253 30E D 0E C468 C469 C475 C476 C477 1uF 0.1uF 10uF 0.1uF 0.1uF TP57 MCU_RESET_SCH 1.5K 3 4 SW 9 C474 System Reset 11 SoC_MCU_STDY_W AKE 1.5K 9 11 KMR231NG TP58 DC_DC_CNTRL 12 ADC_1 20 35 VDDIO VRTC 4 23 24 5,19 MCU_I2C_SCL 5,19 MCU_I2C_SDA 0.1uF 1 2 ADC_MCU TP43 R622 R621 10K VIN_3V3 VCC_MCU_3V3 R266 VOUT_1V8 10 U48 34 VCC_MCU_3V3 UART0_RX/GPIO0 UART0_TX/GPIO1 RTC_IO_1 RTC_IO_2 UART0_CTS/GPIO24 UART0_RTS/GPIO25 I2C_CLK/GPIO9 I2C_DATA/GPIO8 UART1_RX/GPIO3 UART1_TX/SDIO_DAT2/GPIO32 11 MCU_SPI_CS 11 MCU_SPI_CLK 18 MCU_BT_GPIO C R597 0E SDIO_DATA1 7 2 5 8 11 MCU_SPI_MOSI 11 MCU_SPI_MISO UART1_CTS/GPIO26 UART1_RTS/GPIO27 SPI0_CS#_0/SDIO_DAT3/GPIO33 WIFI-MODULE SPI0_CLK/SDIO_CLK/GPIO35 SDIO_DAT1_INT/GPIO37 PWM0/GPIO10 PWM2/GPIO31 SPI0_DIN/SDIO_CMD/GPIO34 SPI0_DOUT/SDIO_DAT0/GPIO36 CLK_HS_XTAL/GPIO19 R271 R272 0E 0E MCU_SPI1_DIN 17 MCU_SPI1_DOUT 18 15 SPI1_CS#_0/GPIO4 SPI1_CS#_1/GPIO13 CLK_RTC/GPIO21 SPI1_CLK/GPIO5 EXT_RESET# SPI1_DIN/GPIO6 SPI1_DOUT/GPIO7 SW 8 R262 R263 VCC_MCU_3V3 1K 1K ON 1 2 4 3 MCU_PRGM_GPIO27 R261 MCU_PRGM_SoC_W AKE 19 VCC_MCU_3V3 10K VPP GND2 MCU_SPI1_CLK 31 32 MCU_SoC_GPIO1 11 MCU_PRGM_SoC_W AKE 10 27 28 SDIO_DATA2 25 26 MCU_PRGM_GPIO27 22 3 GPIO_IO_EXP_INT 21 MCU_CLK_HS R598 R267 MCU_BT_UART_RX 18 MCU_BT_UART_TX 18 0E 13 CLK_RTC 33 MCU_RESET_SCH 37 MCU_OTP_VPP SOC_nRESET 6 MCU_PRGM_GPIO27 13 SYS_PW R_EN 6 C VCC_MCU_3V3 0E MCU_SoC_GPIO4 11 R607 NM 10K R260 10K TP55 GS2011MIES 36 0E GND1 13,19 PIR_DIG_OUT 11 FACTORY_RESET 0E 0E R270 GND 6 MCU_OFF GS2011 PROGRAM R268 R269 16 14 1 11 MCU_SoC_GPIO2 6 MCU_OFF_REQ MCU_SPI1_CS0 MCU_SPI1_CS1 MCU_UART0_RX MCU_UART0_TX DC_DC_CNTRL/RTC_IO_4 GS2011MXXS 6 30 29 R662 R264 10K TDA02H0SB1 1K FACTORY_RESET B B IO EXPANDER VCC_MCU_3V3 VDD SCL SDA I/O EXPANDER 17 HDR_1X4 A0 A1 INT# RESET# 15 16 R235 R236 12 13 MCU_I2C_SCL MCU_I2C_SDA 11 1 GPIO_IO_EXP_INT 10K 10K VCC_MCU_3V3 R237 10K VSS MCU_UART0_TX MCU_UART0_RX IO0 IO1 IO2 IO3 IO4 IO5 IO6 IO7 VSS_EP H17 2 3 4 5 7 8 9 10 6 18 BT_MCU_W AKE_UP 13 SoC_MCU_W AKE_UP 19 MCU_LED_RED_CTRL 19 MCU_LED_GREEN_CTRL 5,13 FG_ALARMB 18 MCU_BT_PW R_EN 13 MCU_SoC_GPIO3 11 USB_W AKEUP_MCU VCC_MCU_3V3 10K 14 U46 GS2011 UART 1 2 3 4 VCC_MCU_3V3 GPIO_IO_EXP_INT R242 C465 0.1uF PCA9538BS I2C ADDRESS=x1110000 A Note: Note that changing an I/O from an output to an input may cause a false interrupt to occur if the state of the pin does not match the contents of the Input Port register. A <Variant Name> A3 5 4 3 2 Title : Wi-Fi_GS2011MIES Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 17 of B1 20 5 4 3 2 1 BLE INTERFACE VCC_BT_3V3 RF Front End D VCC_BT_3V3 D R658 NM 0E R602 10K C 36 35 1 ANT2 VDD_PA DCC RF_nRF51822_ANT2 32 OUT RF_nRF51822_ANT 3 2 GND2 GND1 DC_FEED IN 4 BAL_PORT2 5 1 C424 5pF VDD_PA GND2 31 1 2.45GHz 2450BM14E0003 VDD_PA 30 2 NRF51822 2 C429 0.1uF DEC1 39 C C430 DEC2 0.047uF 29 C432 12pF XC1 X6 XTAL_1 37 1 XTAL_2 24 11 DB_SW DCLK SWDCLK 23 11 DB_SW DIO/BLE_RST# ANT1 4 GND1 P0_0/AREF0 P0_1/AIN2 P0_2/AIN3 P0_3/AIN4 P0_4/AIN5 P0_5/AIN6 P0_6/AIN7/AREF1 P0_7 P0_8 P0_9 P0_10 P0_11 P0_12 P0_13 P0_14 P0_15 P0_16 P0_17 P0_18 P0_19 P0_20 P0_21 P0_22 P0_23 P0_24 P0_25 P0_26/AIN0/XL2 P0_27/AIN1/XL1 P0_28 P0_29 P0_30 1 For Revision 4 5 R599 BT_REV0 6 BT_REV1 7 NM 8 9 10K BT_REV0 10 BT_REV1 11 17 MCU_BT_GPIO 14 11 BT_SPI_CLK R600 R240 0E BT_UART_TX 15 17 MCU_BT_UART_RX 16 11 BT_SPI_CS BT_UART_RX 17 R241 0E 17 MCU_BT_UART_TX 18 19 10K 11 BT_SPI_MOSI 20 11 BT_SPI_MISO 21 17 BT_MCU_W AKE_UP 22 11 BT_GPIO_16 25 11 BT_GPIO_17 26 27 28 11 BT_GPIO_20 40 control 41 42 43 C431 18pF 44 BT_XL1 45 BT_XL2 46 X5 32.768KHz 47 48 3 C433 18pF UNBAL_PORT 6 10K BAND PASS FILTER RF_nRF51822_ANT1 BAL_PORT1 2 NM FL2 BALUN + BPF 3 AVVD2 R601 U30 SWDIO/RESET# R186 13 33 34 NM XC2 VSS_EP 1000pF 49 C422 0.1uF AVDD1 C421 0.1uF 0.1uF VDD2 C420 10uF VDD1 C418 C419 10uF VSS1 VSS2 VSS3 C417 VCC_BT_3V3 12 U58 GND 3 2 4 38 16MHz C434 12pF NRF51822 10K B B UFL CONNECTOR BLE POWER ENABLE VCC_MCU_3V3 JTAG HEADER VCC_BT_3V3 NM FB31 J6 L13 RF_nRF51822_ANT R660 0E C428 2.7pF VCC_MCU_3V3 30E 8 4 1.8nH BT_UFL 1 2 H15 1 BT_UART_TX3 5 NTLUS3A18PZTCG 3 NM C528 NM 2.7pF 3 R189 R659 VCC_BT_3V3 7 6 5 2 1 Q4 10K C436 NM 0.1uF 2 4 6 DB_SW DIO/BLE_RST# DB_SW DCLK BT_UART_RX HDR_2X3 0E CON_COAXIAL 3 Vth(max) = -1.0V (VGS) Q9 A 17 MCU_BT_PW R_EN 0E R239 NM 0E A 1 NTK3134NT1G R193 2 13 SoC_PBT_PW R_EN R238 <Variant Name> R194 A3 100K 1K 5 4 3 2 Title : BT_NRF51822 Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 18 of B1 20 5 4 3 2 1 PIR & STATUS_LEDS VCC_MCU_3V3 VCCA_PIR_3V3 D D FB32 C438 C439 1uF 0.01uF FB33 30E C440 0.1uF PIR DETECTOR 30E AVSS_PIR R195 NM 10K R205 R206 R207 R208 XDCR1 1 2 D S D2 D3 220E 6 PIR_PW R PIR_OUT 3 GND D4 IRA-S210ST01 D5 PIR_OUT 5 R197 C441 2 220E 2 2 2 220E C442 1000pF 0.1uF + C443 R198 OP1_N 4 620K 47K R 1 YG 1 1 R 1 33uF C 3 AVSS_PIR PIR_ANA_OUT C445 100uF R202 3 10K 5 R667 47K Variable Resistor for Sensitivity Control 4 6 R664 10K 2 R668 47K VCCA_PIR_3V3 C448 1 U33 5,17 MCU_I2C_SCL 3 13 SoC_LED_RED_CTRL R665 10K 5 R669 47K R666 10K 2 R670 47K 5,17 MCU_I2C_SDA 6 13 SoC_LED_GREEN_CTRL 4 PIR LED_EN# PIR_DIG_OUT 13,17 VCCA_PIR_3V3 10K 10 R200 NM 10K C 9 AVSS_PIR TP26 VCCA_PIR_3V3 OP2_N OP2_O 8 OSC 11 R203 220K C447 0.47uF 13 AVSS_PIR NCS36000D AVSS_PIR AVSS_PIR RH DIG-POT SDA 10K 100K SCL 2 4 B 3 1 0.22uF 0.1uF VDD MBT3904DW 1T1G Q7 C446 AVSS_PIR R196 R204 1 17 MCU_LED_GREEN_CTRL 3.3K OP2_N 2 MODE_SEL CTLR 7 R663 OP1_O NC OP2_N 12 R199 LED 12K GND 17 MCU_LED_RED_CTRL OP1_N OUT TP25 Q6 MODE AVSS_PIR OP1_P C444 0.015uF YG R201 VREF Note: MODE_SEL = 0 FOR SINGLE PULSE DETECTION 14 U32 VDD PIR Sensor VSS VCC_MCU_3V3 220E VCCA_PIR_3V3 Layout Notes: PLACE NEAR VDD PIN OF PIR CTLR IC STATUS LEDS RW 6 5 CAT5137 B AVSS_PIR I2C ADDRESS=0101110 1 MBT3904DW 1T1G A A <Variant Name> A3 5 4 3 2 Title : PIR & STATUS_LEDS Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 19 of B1 20 5 4 3 2 1 MISCELLANEOUS MOUNTING HOLES MH1 MH2 MH3 C455 R215 D 1000pF 10M D 118MILS 98MILS 98MILS GLOBAL FUDICIALS FD1 FD2 FD3 FD4 FD5 FD6 Global Global Global Global Global Global LOCAL FUDICIALS For DM368 For NOR FLASH For BT For GS2011M For AR0230 For DDR2 FD7 FD8 FD9 FD10 FD11 FD12 FD13 FD14 FD15 FD16 FD17 FD18 Local Local Local Local Local Local Local Local Local Local Local Local C C GROUND POST TP29 TP30 TP31 TP32 ON SEMI LOGO ON PCB OFF BOARD COMPONENTS MIS2 MIS1 BPCB1 DAT2 CD/DAT3 CMD VDD CLK VS S DAT0 DAT1 B LENS HOLDER uSD CARD Z12 B SD-C04G2R7Y(66CGP) BPCB A02-002 M127B02820WR2 Z13 Z14 FXP73.07.0100A FXP73.07.0100A MIS3 PIR PATCH ANTENNA-WIFI PATCH ANTENNA-BT LENS PD55-14006 A A <Variant Name> A2 5 4 3 2 Title : MISCELLANEOUS Asy No : 701-1-00237 Fab No : 501-1-00198 Rev: Sheet 1 20 of B1 20