DS5035AB 01

RT5035A/B
7+3 Channel DC/DC Converters with RTC and I2C Interface
General Description
Features
RT5035A/B is a highly-integrated DSC Power
Management IC that contains 7ch switching DC/DC
converters and two generic LDOs, one keep-alive
low-quiescent LDO for RTC, one load switch with
soft-start control and current limit, a switch with reverse
leakage prevention for backup battery, and a
Real-Time-Clock (RTC) including time counter and
32768Hz oscillator. The DC/DC converters are one
low-voltage Step-Up operated in either Async-PFM or
Sync-PWM, one current mode Sync Step-Up/Down
(Buck-Boost), four Sync Step-Down, and one Asyn

CH1 Sync Step-Up in PWM Mode or Async

Step-Up in Pulse Frequency Mode
CH2 Current Mode Sync Step-Up/Down







Step-Up for WLED driver. All power MOS are
integrated. And compensation networks are built in.

2

RT5035A/B uses I C interface to set power-on and
power-off timing, output voltage, and WLED current
and dimming level, and also access RTC time counters
and oscillator fine-tuning. RT5035A/B dedicate for
CMOS image sensor application by providing one Sync
Step-Down, one LDO, and one load switch. The
RT5035A/B also provides rich protection functions
include Over-Current Protection, Under-Voltage



Protection,
Over-Voltage
Protection,
OverTemperature Protection, and Over-Load Protection.


RT5035A/B is available in WQFN-40L 5x5 package.
Applications



Digital Cameras
Portable Instruments
CH3/CH4/CH5 Current Mode Sync Step-Down
SW4 Load Switch with Soft-Start Inrush Control
And Current Limit
CH6 Generic Low Voltage LDO for CMOS Sensor
CH7 WLED Driver in Async Step-Up Mode
Open LED Protection
32 Dimming Levels
CH8 Generic Low Voltage LDO for Multiple
Purpose Power Supply
CH9 Keep-Alive Low-Quiescent LDO
CH10 Sync Step-Down or Async Step-down in
Pulse Frequency Mode for Memory Standby
Mode Application
LV Sync Step-Down DC/DC Converter High
Efficiency Up to 95%
100% (max) Duty Cycle for CH3, CH4, CH5 &CH10
I2C Control Interface to Program Enable, Power
On/Off Delay Time, Output Regulated Voltage,
WLED Dimming Current
RTC Timer And Oscillator
Fixed 2MHz Switching Frequency for CH1, CH3,
CH4, CH5, CH10
Fixed 1MHz Switching Frequency for CH2, CH7
Simplified Application Circuit
RT5035A/B
BAT
VDDM
VOUT1
Step-Up for Motor
VOUT2
Step-Up/Down for I/O
VOUT3
Step-Down for Core
VOUT4
Step-Down for CMOS
SWO
2
I C Control
SCL
SDA
C32K
Step-Down for CMOS
VOUT6
LDO for CMOS
LX7
EN
Load Switch for CMOS
VOUT5
VOUT8
SYNC
RTCPWR
RESET
VOUT10
Step-Up for LED Backlight
LDO for HDMI
LDO for RTC
Step-Down for Memory
GND
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS5035A/B-01
April
2016
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
1
RT5035A/B
Pin Configurations
Ordering Information
(TOP VIEW)
RT5035A/B
VOUT1
SYNC
VDDM
RTCPWR
XIN
XOUT
RTCGND
VOUT3/FB3
PVDD3
C32K
Package Type
QW : WQFN-40L 5x5 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
A : Li-ion
B : 2AA Alkaline
40 39 38 37 36 35 34 33 32 31
Richtek products are :

RoHS compliant and compatible with the current
requirements of IPC/JEDEC J-STD-020.

Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
RT5035AGQW
RT5035A
GQW
YMDNN
1
30
2
29
3
28
27
4
5
26
GND
6
25
7
24
8
41
23
22
9
21
10
LX3
PVDD8
VOUT8
VOUT5/FB5
PVDD5
LX5
PVDD2
LX2A
EN
LX2B
11 12 13 14 15 16 17 18 19 20
CN
CP
BAT
VOUT4/SWI
VOUT10/FB10
SWO
SDA
SCL
VOUT2
SEQ
Note :
LX1
RESET
FB7
VOUT6
PVDD6
LX7
LX4
PVDD4/10
LX10
VNEG
RT5035AGQW : Product Number
YMDNN : Date Code
WQFN-40L 5x5
RT5035BGQW
RT5035B
GQW
YMDNN
RT5035BGQW : Product Number
YMDNN : Date Code
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
LX1
Switch Node of CH1. This pin is in high impedance during shutdown.
2
RESET
Open drain output port to assert the status of monitored VDDM voltage.
3
FB7
Feedback input pin for CH7. This pin is in high impedance during shutdown.
4
VOUT6
Regulated output node of CH6 generic LDO. When turning off, RT5035A/B would
discharge CH6 output capacitors internally till VOUT6 < 0.1V. This pin is in high
impedance during shutdown.
5
PVDD6
Power Input of CH6 Generic LDO. This pin is in high impedance during
shutdown.
6
LX7
Switch Node of CH7. This pin is in high impedance during shutdown.
7
LX4
Switch Node of CH4. This pin is in high impedance during shutdown.
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
Pin No.
Pin Name
Pin Function
8
PVDD4/10
Power input pin of CH4 and CH10. This pin is in high impedance during
shutdown.
9
LX10
Switch Node of CH10. This pin is in high impedance during shutdown.
10
VNEG
Output node of Negative Charge Pump to enhance CH2 (PVDD2 LX2A), CH3,
CH4, CH5, CH10 PMOS driving. The regulated voltage is the higher one
between (BAT  4.5V) and (BAT). When the Negative Charge Pump is off,
VNEG is internally connected to GND. Connect this pin to an external 1F
capacitor.
11
CN
Negative Switch node of Charge Pump. A fly capacitor is needed between pin
CP and CN.
12
CP
Positive Switch node of Charge pump.
BAT
Battery power input and sense pin. Recommend that input bypass capacitors are
as close as possible to the IC. The IC would sense the voltage of this pin for
UVLO and perform body-diode direction control of CH1 PMOS switches. This pin
is also the power input pin of negative charge pump circuit for VNEG.
13
Sense pin for CH4 output voltage and power pin for load switch SW4. When
turning off, RT5035A/B would discharge CH4 output capacitors internally till
VOUT4 < 0.1V. Recommend that output capacitors are as close to RT5035A/B
as possible. This pin is in high impedance during shutdown.
Sense Pin of CH10 Output Voltage. This pin is also the feedback pin for VOUT10
if I2C is set to use the external resistor. When turning off, the IC discharges CH10
output capacitors internally until VOUT10 < 0.1V. Recommend that output
capacitors are as close as possible to the IC. This pin is in high impedance
during shutdown.
Power switch output pin of load switch SW4. When turning off, RT5035A/B would
discharge SWO output capacitors internally. This pin is in high impedance during
shutdown.
14
VOUT4/SWI
15
VOUT10/FB10
16
SWO
17
SDA
Data Input and output Pin for the I2C Serial Port.
18
SCL
Clock Input Pin for the I2C Serial Port.
19
VOUT2
Power output pin for CH2 output voltage. When turning off, RT5035A/B would
discharge CH2 output capacitors internally till VOUT2 < 0.1V.
I2C interface power level must be equal to CH2 output voltage. This pin is in high
impedance during shutdown.
20
SEQ
Sequence Setting pin.
21
LX2B
Switch Node B of CH2. This pin is in high impedance during shutdown.
22
EN
Enable input pin to activate the RT5035A/B power on (EN = High) and off.
RT5035A/B includes an internal pull-low at EN pin.
23
LX2A
Switch Node A of CH2. This pin is in high impedance during shutdown.
24
PVDD2
Power input pin of CH2 and it must connect to the same node as BAT. This pin is
in high impedance during shutdown.
25
LX5
Switch Node of CH5. This pin is in high impedance during shutdown.
26
PVDD5
Power input pin of CH5. PVDD5 could be separated from BAT. And the logic low
level for PMOS is automatically selected. (VNEG or GND) This pin is in high
impedance during shutdown.
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS5035A/B-01
April 2016
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
3
RT5035A/B
Pin No.
Pin Name
Pin Function
Sense Pin of CH5 Output Voltage. This pin is also the feedback pin for VOUT5 if
I2C is set to use the external resistor. When turning off, the IC discharges CH5
output capacitors internally until VOUT5 < 0.1V. Recommend that output
capacitors are as close as possible to the IC. This pin is in high impedance
during shutdown.
Regulated output node of CH8 generic LDO. When turning off, RT5035A/B would
discharge CH8 output capacitors internally till VOUT8 < 0.1V. This pin is in high
impedance during shutdown.
27
VOUT5/FB5
28
VOUT8
29
PVDD8
Power input node of CH8 generic LDO. This pin is in high impedance during
shutdown.
30
LX3
Switch Node of CH3. This pin is in high impedance during shutdown.
31
C32K
RTC 32768Hz clock output pin. Its rails are VDDM and GND. When RESET
goes low, C32K outputs low.
32
PVDD3
Power input pin of CH3 and it must connect to the same node as BAT. This pin is
in high impedance during shutdown.
Sense Pin of CH3 Output Voltage. This pin is also the feedback pin for VOUT3 if
I2C is set to use the external resistor. When turning off, the IC discharges CH3
output capacitors internally until VOUT3 < 0.1V. Recommend that output
capacitors are as close as possible to the IC. This pin is in high impedance
during shutdown.
Ground pin for RTC timer counter and oscillator.
33
VOUT3/FB3
34
RTCGND
35
XOUT
Crystal Output. This pin’s parasitic capacitance should be kept as low as
possible. Noise interference should also be avoided.
36
XIN
Crystal Input. This pin’s parasitic capacitance should be kept as low as possible.
Noise interference should also be avoided.
37
RTCPWR
RTCLDO power pin. Connect this pin to a backup battery
38
VDDM
Regulation voltage output of CH9 keep-alive LDO. It also provides power for all
IC control circuit.
39
SYNC
PLL Synchronous Input Pin.
40
VOUT1
Power output and sense pin for CH1 output voltage. Recommend that output
capacitors are as close to RT5035A/B as possible. This pin is in high impedance
during shutdown.
41
GND
(Exposed Pad)
RT5035A/B power ground and control circuit ground. Exposed PAD should be
soldered to PCB and connected to GND.
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
www.richtek.com
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is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
Functional Block Diagram
BAT
BAT UVLO
2.6V/2.4V (Part A)
or 1.7V/1.5 (Part B)
CH5
LV C-Mode
Sync.
Step-Down
LX5
VOUT1
VDDM VOUT1
VDDM
PVDD5
Body
Diode
Control
CH1
PFM Async.
or
C-Mode Sync.
LV Step-Up
VOUT5/FB5
BAT
VOUT1
LX1
+
Floating GND
Selection
+
VREF &
DAC
A9.Bit0
VREF & DAC
(W / DVS)
VDDM
PVDD2
VNEG
PVDD6
CH6
Generic LDO
LX2A
VOUT2
CH2
LV C-Mode
Sync.
Step-Up/Down
VOUT6
+
VREF & DAC
LX2B
VDDM
VREF & DAC
FB7
-
VNEG
CH7 (WLED)
HV C-Mode
Async. Step-Up
For 2 to 6WLED
LX7
+
VREF & DAC
VDDM
PVDD3
+
-
CH3
LV C-Mode
Sync.
Step-Down
PVDD8
CH8
Generic LDO
LX3
VOUT3/FB3
VOUT8
VNEG
VREF & DAC
(W / DVS)
-
+
+
VREF & DAC
(W / DVS)
VDDM
VDDM
PVDD4/10
PVDD4/10
CH10
PFM or
LV C-Mode
Sync.
Step-Down
LX10
VOUT10/FB10
CH4
LV C-Mode
Sync.
Step-Down
Reg.PFM10
LX4
VOUT4/SWI
VNEG
+
VNEG
+
VREF & DAC
(W / DVS)
VDDM
VREF & DAC
(W / DVS)
I2C Control Interface
(Fast Mode up to 400kb/s)
SCL
SDA
BAT
VDDM
VOUT1
SW4 Control
SWO
VM
Body
Diode
Control
CH9 LDO
Keep Alive
3.1V
VDDM
RESET
Max (BAT, VOUT1)
RESET
2.4V/2.2V
Always On
Reverse Leakage
Control
RTCPWR
VOUT1
Chip Enable
Register File
Output Voltage,
Power On/Off
Sequence Control,
Delay time,
WLED dim. Ratio,
CH7 OVP
Threshold
32bits Memory
XIN
XOUT
RTCGND
VDDM
RTC + OSC+
[email protected]
Charge
Pump for SW
Base Controller
POR/OSC/UVP/
OVP/OCP/OTP
Sequence
Selection
PLL
VDDM
EN
SEQ
SYNC
BAT
VNEG
Charge Pump
VNEG = BAT-4.5V
CP
CN
VNEG
C32K
GND
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS5035A/B-01
April 2016
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
5
RT5035A/B
Operation
The RT5035A/B is a highly integrated DSC power
management IC that contains 7-CH switching DC/DC
converters, two generic LDO, one Keep Alive low
quiescent LDO, one load switch with soft-start control
and current limit, one switch with reverse leakage
prevention from backup battery, and a Real-Time Clock
(RTC) that includes a time counter and a 32768Hz
oscillator.
CH6 : Generic LDO
CH1 : Step-Up DC/DC Converter
CH8 : Generic LDO
CH1 is a step-up converter for motor driver power in
DSC system. The converter operates at asynchronous
CH8 is a generic low voltage LDO for multiple purpose
power.
PFM or fixed frequency PWM current mode which can
be set by the I2C interface.
CH9 : Keep Alive LDO and RTC
CH2 : Synchronous Step-Up / Down DC/DC
The RT5035A/B provides a 3.1V output LDO for all IC
control circuits and real time clock.
Converter CH2 is a synchronous step-up / down
converter for system I/O power. The converter operates
VNEG Charge Pump
at fixed frequency PWM Current Mode.
CH3 : Synchronous Step-Down DC/DC Converter
CH3 is suitable for core power in DSC system. The
converter operates in fixed frequency PWM mode with
integrated internal MOSFETs, FB resistors and
CH6 is a generic low voltage LDO for multiple purpose
power.
CH7 : WLED Driver
CH7 is a WLED driver that can support 6WLED/30mA,
and it can setting OVP threshold, dimming current level
and power on/off by I2C interface.
The Charge pump is to increase the Vgs driving of big
P-MOSFET in Ch2/3/4/5/10. When BAT < 3.6V and
one of Ch2/3/4/5/10 turns on, VNEG charge pump will
turn on and start to pump.
Load Switch (SW4)
compensation network. The CH3 also can be adjusted
output voltage if I2C is set to use the external resistor.
The Load Switch is equipped with soft-start inrush
control and current limit function (SW4).
CH4 : Synchronous Step-Down DC/DC Converter
CH10 : Synchronous Step-Down DC/DC Converter
CH4 is suitable for memory power in DSC system. The
CH10 is suitable for memory power in DSC system.
The converter operates at asynchronous PFM or fixed
frequency PWM current mode which can be set by the
I2C interface and it integrated internal MOSFETs, FB
resistors and compensation network. The CH10 also
can be adjusted output voltage if I2C is set to use the
external resistor.
converter operates in fixed frequency PWM mode with
integrated internal MOSFETs, FB resistors and
compensation network.
CH5 : Synchronous Step-Down DC/DC Converter
The converter operates in fixed frequency PWM mode
with integrated internal MOSFETs, FB resistors and
compensation network. The CH5 also can be adjusted
output voltage if I2C is set to use the external resistor.
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is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
Absolute Maximum Ratings
(Note 1)

Supply Voltage: BAT, PVDD2, PVDD3, PVDD4/10, PVDD5, PVDD6, PVDD8, SWI -----------0.3V to 6V

Power Switch: LX1,LX2A, LX2B, LX3, LX4, LX5, LX10, CP -------------------------------------------0.3V to 6V

Power Switch: LX7------------------------------------------------------------------------------------------------0.3V to 24V

Output Node : VOUT1 to VOUT6, SWO, VOUT8, VOUT10, RTCPWR, VDDM-------------------0.3V to 6V

Output Node : CN, VNEG -------------------------------------------------------------------------------------(BAT  6V) to 0.3V

Other Pins ----------------------------------------------------------------------------------------------------------0.3V to 6V

Power Dissipation, PD @ TA = 25C
WQFN-40L 5x5 ----------------------------------------------------------------------------------------------------3.63W

Package Thermal Resistance
(Note 2)
WQFN-40L 5x5, JA ----------------------------------------------------------------------------------------------27.5C/W
WQFN-40L 5x5, JC----------------------------------------------------------------------------------------------6C/W

Junction Temperature --------------------------------------------------------------------------------------------150C

Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------260C

Storage Temperature Range -----------------------------------------------------------------------------------65C to 125C

ESD Susceptibility
(Note 3)
HBM (Human Body Model) ------------------------------------------------------------------------------------ 2kV
MM (Machine Model) ------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
(Note 4)

Supply Voltage: BAT -------------------------------------------------------------------------------------------- 1.8V to 5.5V

Ambient Temperature Range---------------------------------------------------------------------------------- 40C to 85C

Junction Temperature Range --------------------------------------------------------------------------------- 40C to 125C
Electrical Characteristics
(VDDM = 3.1V, TA = 25C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
5.8
6
6.2
V
--
0.25
--
V
--
2.6
2.678
V
2.328
2.4
--
V
--
1.7
1.751
V
1.455
1.5
--
V
Supply Voltage
VDDM Over Voltage Protection
VDDM Rising
VDDM Over Voltage Protection
Hysteresis
BAT UVLO High Threshold
Voltage (For Li) (Part. A)
VBAT Rising
BAT UVLO Low Threshold
Voltage (For Li) (Part. A)
BAT UVLO high Threshold
Voltage (For 2AA) (Part. B)
BAT UVLO low Threshold
Voltage (For 2AA) (Part. B)
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS5035A/B-01
April 2016
VBAT Rising
is a registered trademark of Richtek Technology Corporation.
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7
RT5035A/B
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Supply Current
Shutdown Supply Current into
BAT (Including CH9 keep-alive
LDO)
IOFF,BAT
EN = 0V, Reg.SHDN_EN1 = 0,
Reg.SHDN_EN10 = 0 and
VOUT1 = 0V, BAT = 3.3V
--
10
--
A
IOFF,BAT
EN = 0V, Reg.SHDN_EN1 = 0,
Reg.SHDN_EN10 = 1 and
VOUT1 = 0V, BAT = 3.3V
And CH10 no-switching
--
--
80
A
IOFF,VOUT1
EN = 0V, Reg.SHDN_EN1 = 1,
Reg.SHDN_EN10 = 0 and Ch1
no-switching and VOUT1 = 4.2V,
BAT = 3.3V
--
--
80
A
IOFF,VOUT1
EN = 0V, Reg.SHDN_EN1 = 1,
Reg.SHDN_EN10 = 1 and Ch1
no-switching and VOUT1 = 4.2V,
BAT = 3.3V
--
--
100
A
EN = 3.3V, Reg.SHDN_EN1 = 1,
And Non switching.
--
--
1600
A
EN = 3.3V, And Non switching.
--
--
1400
A
EN = 3.3V, And Non switching
--
--
400
A
EN = 3.3V, And no load.
--
--
100
A
CH7 (WLED) in Async Step-Up
I
Mode Supply Current into VDDM Q7bo
EN = 3.3V, And Non switching
--
--
500
A
CH8 (LDO)
Supply Current into VDDM
IQ8
EN = 3.3V, And no load.
--
--
100
A
CH10 (sync Step-Down)
Supply Current into VDDM
IQ10
EN = 3.3V, And Non switching,
--
--
400
A
CH1,3,4,5,10 Operation
Frequency
FOSC
CH1 in PWM mode
1800
2000
2200
kHz
CH2,7 Operation Frequency
FOSC
900
1000
1100
kHz
Shutdown Supply Current into
BAT (Including CH9 keep-alive
LDO)
Shutdown Supply Current into
VOUT1 (Including CH9
keep-alive LDO)
Shutdown Supply Current into
VOUT1 (including CH9
keep-alive LDO)
CH1 (Sync Step-Up PWM)+ CH2
(Sync Step-Up/Down) + CH3
(Sync Step-Down) + CH4 (Sync
IQ1234,10
Step-Down) +CH10(Sync
Step-Down) Supply Current into
VDDM
CH2 (Sync Step-Up/Down) +
CH3 (Sync Step-Down) + CH4
(Sync Step-Down) +CH10(Sync IQ234,10
Step-Down) Supply Current into
VDDM
CH5 (sync Step-Down)
IQ5
Supply Current into VDDM
CH6 (LDO)
Supply Current into VDDM
IQ6
Oscillator
CH1 Maximum Duty Cycle
(Step-Up)
FOSC = 2000kHz
80
83
86
%
CH2 Maximum Duty Cycle at
LX2B
FOSC = 1000kHz
80
83
86
%
--
--
100
%
CH2 Maximum Duty Cycle at
LX2A
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
Parameter
Symbol
Min
Typ
Max
Unit
CH3 Maximum Duty Cycle
(Step-Down)
--
--
100
%
CH4 Maximum Duty Cycle
(Step-Down)
--
--
100
%
CH5 Maximum Duty Cycle
(Step-Down)
--
--
100
%
91
93
97
%
--
--
100
%
A1.VOUT1 = 0 to 7
1.5
--
1.5
%
A1.VOUT1 = 8 to 15
2
--
2
%
The VOUTx typical values are
listed next.
1.5
--
1.5
%
A2.VOUT4 = 0 to 3 (near 1.8V)
1.5
--
1.5
%
A2.VOUT4 = 4 to 7 (near 1.5V)
2
--
2
%
A2.VOUT5 = 0 to 3
1.5
--
1.5
%
A2.VOUT5 = 4 to 7
2
--
2
%
A3.VOUT6 = 0 to 8
2
--
2
%
A3.VOUT6 = 9 to 15
2
--
2
%
A4.VOUT8 = 0 to 3
2
--
2
%
A4.VOUT8 = 4 to 7
2
--
2
%
Feedback Regulation Voltage @
FB7
0.285
0.3
0.315
V
VDDM Voltage
(CH9 LDO Output Regulation)
3.01
3.1
3.19
V
P-MOSFET, VOUT1 = 3.3V
--
150
200
m
N-MOSFET, VOUT1 = 3.3V
--
100
150
m
2.5
3.5
4.5
A
PMOSFET (PVDD2 LX2A),
PVDD2 = VOUT2 = 3.3V
--
100
150
m
NMOSFET (LX2A  GND),
PVDD2 = VOUT2 = 3.3V
--
200
300
m
PMOSFET (LX2B  VOUT2),
PVDD2 = VOUT2 = 3.3V
--
150
200
m
NMOSFET (LX2B  GND),
PVDD2 = VOUT2 = 3.3V
--
100
150
m
2.2
3
4
A
--
200
300
m
CH7 Maximum Duty Cycle
(WLED)
Test Conditions
Step-Up mode
CH10 Maximum Duty Cycle
(Step-Down)
Feedback and Output Regulation Voltage
VOUT1 Accuracy
VOUT2, 3, 10 Accuracy
VOUT4 Accuracy
VOUT5 Accuracy
VOUT6 Accuracy
VOUT8 Accuracy
Power Switch Ron and Current Limit
CH1 On Resistance of MOSFET
RDS(ON)_1
CH1 Current Limitation (Step-Up) ILIM_1
CH2 On Resistance of MOSFET
CH2 On Resistance of MOSFET
RDS(ON)_2A
RDS(ON)_2B
CH2 Current Limitation
ILIM_2
Both PMOS (PVDD2  LX2A)
and NMOS (LX2B GND)
CH3 On Resistance of MOSFET
RDS(ON)_3
PMOSFET, PVDD3 = 3.3V
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS5035A/B-01
April 2016
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
9
RT5035A/B
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
--
150
220
m
2.2
3
3.8
A
P-MOSFET, PVDD4 = 3.3V
--
350
400
m
N-MOSFET, PVDD4 = 3.3V
--
350
400
m
1
1.5
2
A
P-MOSFET, PVDD5 = 3.3V
--
350
400
m
N-MOSFET, PVDD5 = 3.3V
--
350
400
m
1
1.5
2
A
N-MOSFET, PVDD3 = 3.3V
CH3 Current Limitation
(Step-Down)
ILIM_3
CH4 On Resistance of MOSFET
RDS(ON)_4
CH4 Current Limitation
(Step-Down)
ILIM_4
CH5 On Resistance of MOSFET
RDS(ON)_5
CH5 Current Limitation
(Step-Down)
ILIM_5
CH7 On Resistance of MOSFET
RDS(ON)_7
N-MOSFET
--
400
500
m
CH7 Current Limitation
ILIM_7
N-MOSFET
0.6
0.8
1
A
CH10 On Resistance of
MOSFET
RDS(ON)_10
P-MOSFET, PVDD10 = 3.3V
--
350
400
m
N-MOSFET, PVDD10 = 3.3V
--
350
400
m
CH10 Current Limitation
(Step-Down)
ILIM_10
1
1.5
2
A
3.6
V
SW4 Load Switch
Supply Voltage of SW4 at SWI
SW4 On Resistance of MOSFET
SWI
RDS(ON)
_SW4
SW4 Soft-Start Time
Current Limit of SW4
ILIM_SW4
1.2
SWI = 1.8V, VOUT1 = 3.6V,
IO = 400mA
--
100
130
m
SWI = 3.6V, VOUT1 = 5V,
IO = 400mA
--
100
130
m
From enabled to VSWO = VSWI =
1.8V
--
1.4
--
ms
500
900
--
mA
2.7
--
5.5
V
SWI = 1.8V
CH6 LDO
Supply Voltage of Ch6
PVDD6
PSRR+ of Ch6
1kHz, IO = 10mA, PVDD6 = 3.6V,
VOUT6 = 2.7V
--
60
--
dB
Ch6 Dropout Voltage
VOUT6 = 2.7V, IO = 100mA
--
50
80
mV
300
450
600
mA
CP Pull Down Resistance
70
100

k
EN Input High Level Threshold
1.3
--
--
V
EN Input Low Level Threshold
--
--
0.4
V
EN Sink Current
--
1
3
A
1.3
--
--
V
SYNC Input Low Level Threshold
--
--
0.4
V
SYNC Sink Current
--
1
3
A
Current Limit of Ch6
ILIM_6
VOUT6 = 2.7V
Control
SYNC Input High Level
Threshold
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
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10
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
125
160
--
°C
--
20
--
°C
3.4
3.6
3.8
V
0.1
0.2
0.3
V
4.1
4.5
4.9
V
2.7
--
5.5
V
Thermal Protection
Thermal Shutdown
TSD
Thermal Shutdown Hysteresis
TSD
VNEG Charge Pump
Charge Pump Low Threshold to
Start
Charge Pump Hysteresis gap to
Stop
(BAT-VNEG) Clamp Level
NVst
Monitor BAT falling
NVst
CH8 LDO
Supply Voltage of Ch8
PVDD8
PSRR+ of Ch8
1kHz, IO = 10mA, PVDD8 = 3.6V,
VOUT8 = 3.4V
--
60
--
dB
Ch8 Dropout Voltage
VOUT8 = 3.4V, IO = 100mA
--
40
60
mV
220
300
380
mA
2.4
--
5.5
V
Current Limit of Ch8
ILIM_8
VOUT8 = 3.4V
CH9 Keep-Alive LDO
Supply Voltage of CH9 at VOUT1
Pin
PSRR+ of CH9
1kHz, IO = 1mA, VDDM = 3.1V
--
40
--
dB
CH9 Dropout Voltage
VDDM = 3.1V, IO = 20mA
--
220
300
mV
VDDM = 3.1V
50
100
--
mA
Current Limit of RTC LDO
ILIM_9
RESET Hysteresis Low
RESET Falling
2.15
2.2
--
V
RESET Hysteresis High
RESET Rising
--
2.4
2.45
V
--
--
0.5
s
--
10
--
A
1.9
--
3.3
V
RTCPWR > UVLO Threshold XIN
= XOUT = 14pF
--
--
3
A
RTCPWR < UVLO Threshold
--
--
0.2
A
--
32.768
--
kHz
10
--
10
ppm
VDDM
0.3
--
--
V
--
--
0.3
V
RESET Rising Delay Time
CH9 Quiescent Current
Excluding RTC quiescent current
RTC
RTC Operation Voltage
RTC Quiescent Current
(Including RTC_UVLO,
RTC_OSC, and Time Counter)
RTC Clock
RTC Clock Accuracy
RTCPWR = 1.9V to 3.3V
RTC Clock Output High
Pin C32K Source Out 0.1mA
RTC Clock Output Low
Pin C32K Sink 0.1mA
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS5035A/B-01
April 2016
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
11
RT5035A/B
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
VRTC_F
RTCPWR Falling
1.8
1.9
2
V
VRTC_R
RTCPWR Rising
VRTC_F
+ 20m
2.2
2.3
V
--
0.5
1
s
--
60
--

CH1 OVP Threshold @ VOUT1
5.6
5.8
6
V
CH2 OVP Threshold @ VOUT2
5.8
6
6.2
V
RTC Under Voltage Lockout
Threshold (UVLO)
RTC OSC Startup Time
Switch Ron from VDDM to
RTCPWR
P-MOSFET, VDDM = 3.1V
Under-Voltage and Over-Voltage Protection
CH7 OVP Threshold Accuracy @
LX7
Target voltage is the chosen one Target
Target
Target
in A7.OVP7
1
+1
V
CH1 UVP Threshold @ VOUT1
1.95
2.25
2.55
V
CH2 UVP Threshold @ VOUT2
1.4
1.6
1.8
V
CH3 UVP Threshold @ VOUT3
0.525
0.6
0.675
V
CH4 UVP Threshold @ VOUT4
0.7
0.8
0.9
V
SW4 Load Switch UVP Threshold
VSWI-VSWO
--
0.9
--
V
SW4 Load Switch UVP Threshold
VSWO
--
0.9
--
V
0.7
0.8
0.9
V
A3.VOUT6 = 0 to 9
--
1.6
--
A3.VOUT6 = 10 to 15
--
0.8
--
Target voltage is the chosen one
in A4.VOUT8
--
0.5 x
Target
--
V
0.7
0.8
0.9
V
CH5 UVP Threshold @ VOUT5
CH6 UVP Threshold @ VOUT6
CH8 UVP Threshold @ VOUT8
CH10 UVP Threshold @ VOUT10
V
CH1 Over-Load P threshold
(OLP) @ VOUT1
Target voltage is the chosen one
in A1.VOUT1
--
Target
0.6
--
V
CH2 OLP Threshold @ VOUT2
Target voltage is the chosen one
in A1.VOUT2
--
Target
0.4
--
V
CH3 OLP Threshold @ VOUT3
Target voltage is the chosen one
in A2.VOUT3
--
Target
0.15
--
V
CH4 OLP Threshold @ VOUT4
Target voltage is the chosen one
in A2.VOUT4
--
Target
0.2
--
V
CH5 OLP Threshold @ VOUT5
Target voltage is the chosen one
in A3.VOUT5
--
Target
0.2
--
V
CH10 OLP Threshold @ VOUT10
Target voltage is the chosen one
in A5.VOUT10
--
Target
0.2
--
V
Protection Delay Time
for OCP and OLP, except OCP of
CH2
--
100
--
ms
SDA, SCLK Input High Level
Threshold
0.7 x
VDDM
--
--
V
SDA, SCLK Input Low Level
Threshold
--
--
0.3 x
VDDM
V
I2C
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
Parameter
Symbol
Test Conditions
VDDM = 3.1V, VOUT2 = 3.3V
Min
Typ
Max
Unit
--
--
400
kHz
SCLK Clock Rate
f SCL
Hold Time (Repeated) START
condition.
After this Period, the First Clock
Pulse is Generated
tHD;STA
0.6
--
--
s
LOW Period of the SCL Clock
tLOW
1.3
--
--
s
HIGH Period of the SCL Clock
tHIGH
0.6
--
--
s
Set-up Time for a Repeated
START Condition
tSU;STA
0.6
--
--
s
Data Hold Time
tHD;DAT
0
--
0.9
s
Data Set-Up Time
tSU;DAT
100
--
--
ns
Set-Up Time for STOP Condition tSU;STO
0.6
--
--
s
Bus Free Time between a STOP
and START Condition
tBUF
1.3
--
--
s
Rise Time of both SDA and SCL
Signals
tR
20
--
300
ns
Fall Time of both SDA and SCL
Signals
tF
20
--
300
ns
SDA and SCL Output Low Sink
Current
IOL
SDA or SCL Voltage = 0.4V
2
--
--
mA
VOUT1 Ramp Rate
VOUT1 = 3.6V to 5.3V
--
1.24
--
V/ms
VOUT2 Ramp Rate
VOUT2 = 0V to 3.25V
--
0.82
--
V/ms
VOUT3 Ramp Rate
VOUT3 = 0V to 1.1V
--
0.33
--
V/ms
VOUT4 Ramp Rate
VOUT4 = 0V to 1.8V
--
0.44
--
V/ms
VOUT5 Ramp Rate
VOUT5 = 0V to 2.2V
--
0.6
--
V/ms
VOUT6 Ramp Rate
VOUT6 = 0V to 2.7V
--
0.84
--
V/ms
VOUT8 Ramp Rate
VOUT8 = 0V to 3.4V
--
0.84
--
V/ms
VOUT10 Ramp Rate
VOUT10 = 0V to 1.35V
--
0.41
--
V/ms
40
--
+40
%
For ENDLY2, 3, 4, 10
1.5
2
2.5
ms
VOUT1, 2, 3, 4, 5, 10 Discharge
Equivalent Resistance
VDDM = 3.1V and VOUTx = 1V
50
--
--

SW4 Discharge Equivalent
Resistance
VDDM = 3.1V and SWO = 1V
400
--
--

VOUT6 Discharge Equivalent
Resistance
VDDM = 3.1V and VOUT6 = 1V
200
--
--

VOUT8 Discharge Equivalent
Resistance
VDDM = 3.1V and VOUT8 = 1V
200
--
--

Output Voltage Ramp Rate
Ramp Rate Accuracy of All the
Above
Enabling Delay Time
Delay Time Step Resolution
Off Discharge
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS5035A/B-01
April 2016
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
13
RT5035A/B
Parameter
Symbol
Min
Typ
Max
Unit
200
--
--

0.05
0.1
0.15
V
N-MOSFET On-Time
--
0.5
--
s
Minimum Off-Time
--
0.5
--
s
N-MOSFET Current Limit
--
0.8
--
A
3.5
3.6
3.7
V
VDDM Discharge Equivalent
Resistance
Test Conditions
VM = 4.2V and VDDM = 1V
Each Channel Discharge Finish
Threshold for Next Channel
Starting to Turn Off
CH1 Async. PFM
VOUT1 Regulation Voltage
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2. JA is measured at TA = 25C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. JC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
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14
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
Typical Application Circuit
RT5035A/B
26
VBAT
CIN5
4.7μF
L5
2.2μH
VOUT5
25
27
COUT5
10μF
13
VBAT
CBAT
4.7μF
PVDD5
VOUT1
LX5
VOUT5/FB5
CIN6
1μF
4
VOUT6
COUT6
2.2μF
R6
5k
PVDD6
LX2B
VOUT6
VOUT2
L7
10μH
VBAT
VOUT3/FB3
6
3
LX7
COUT8
2.2μF
28 VOUT8
29
CIN8
1μF
VOUT10
9
15
CVDDM
2.2μF RRESET
10k
VDDM
37
CRTCPWR
1μF
31 C32K
36 XIN
To ASIC Power Sequencer
Chip Enable
VBAT
L4
2.2μH
VOUT4
COUT4
10μF
VI/O
3.25V
RSDA
2
I C Bus
SDA 17
SWO 16
CP
CSWO
10μF
SWO
12
CN 11
CCP
10nF
CVNEG
1μF
SYNC 39
SEQ
20
RSEQ
35 XOUT
CXOUT
15pF
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
April 2016
CIN4
4.7μF
RTCGND 34
Y1
From ASIC
Power Sequencer
DS5035A/B-01
RTCPWR
VBAT
COUT3
40μF
LX4 7
VOUT4/SWI 14
VOUT10/FB10
2 RESET
VOUT2
VOUT3
PVDD4/10 8
LX10
38 VDDM
VBAT
33
VNEG 10
RRTCPWR
1k
CXIN
15pF
CIN3
10μF
PVDD8
To ASIC Power Sequencer
Backup
Battery
COUT2
10μF x 2
SCL 18
COUT10
10μF
+
19
RSCL
L10
2.2μH
VMOTOR
21
FB7
REXT
10
VBAT
L2
2.2μH
L3
1.2μH
30
LX3
CIN7
1μF
D5
D6
VDDM
To ASIC Power Sequencer
CIN2
10μF
PVDD3 32
COUT7
1μF
VMOTOR
COUT1
10μF x 2
BAT
Back Light
VOUT8
CIN1
4.7μF
PVDD2 24
D7
D1
D2
D3
D4
L1
2.2μH
40
LX2A 23
5
VMOTOR
LX1 1
GND
41 (Exposed Pad)
22 EN
is a registered trademark of Richtek Technology Corporation.
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15
RT5035A/B
Typical Operating Characteristics
CH1 Boost Efficiency vs. Output Current
CH2 Buck-Boost Efficiency vs. Output Current
100
100
90
90
80
VIN = 1.8V
70
Efficiency(%)
Efficiency(%)
80
VIN = 2.4V
60
VIN = 3V
50
VIN = 3.6V
40
VIN = 4.2V
30
VIN = 4.5V
VIN = 1.8V
70
VIN = 2.4V
60
VIN = 3V
50
VIN = 3.6V
40
VIN = 4.2V
30
VIN = 5V
20
20
10
10
VOUT = 5V, L = 2.2μH, C OUT = 10μF x 2
10
100
1000
VOUT = 3.25V, L = 2.2μH, C OUT = 10μF x 2
0
0
10
10000
100
Output Current (mA)
CH4 Buck Efficiency vs. Output Current
100
90
90
80
80
VIN = 2.1V
70
VIN = 1.8V
70
VIN = 2.4V
60
VIN = 2.4V
60
VIN = 3V
50
VIN = 3V
50
VIN = 3.6V
40
VIN = 3.6V
40
VIN = 4.2V
30
VIN = 4.2V
30
VIN = 5V
20
VIN = 5V
Efficiency (%)
Efficiency (%)
CH3 Buck Efficiency vs. Output Current
100
10
20
10
VOUT = 1.16V, L = 1.2μH, C OUT = 44μF
0
VOUT = 1.8V, L = 2.2μH, C OUT = 10μF
0
10
100
1000
10000
10
100
Output Current (mA)
1000
Output Current (mA)
CH5 Buck Efficiency vs. Output Current
CH7 Efficiency vs. Input Voltage
100
100
90
90
80
80
VIN = 1.8V
70
Efficiency (%)
Efficiency (%)
1000
Output Current (mA)
VIN = 2.4V
60
VIN = 3V
50
VIN = 3.6V
40
VIN = 4.2V
30
VIN = 5V
70
60
50
40
30
20
20
10
VOUT = 1.23V, L = 2.2μH, C OUT = 10μF
10
Load = 6WLEDs/30mA, L = 10μH, C OUT = 1μF
0
0
10
100
Output Current (mA)
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
www.richtek.com
16
1000
1.8 2.1 2.4 2.7
3 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7
Input Voltage (V)
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
CH10 Buck Efficiency vs. Output Current
CH1 Boost Output Voltage vs. Output Current
100
5.06
90
5.04
70
VIN = 1.8V
60
VIN = 2.4V
50
VIN = 3V
Output Voltage (V)
Efficiency (%)
80
VIN = 3.6V
40
VIN = 4.2V
30
VIN = 5V
20
10
10
VIN = 1.8V
5.00
VIN = 2.4V
4.98
VIN = 3V
4.96
VIN = 3.6V
VIN = 4.2V
4.94
VIN = 4.5V
4.92
4.90
4.88
VOUT = 1.35V, L = 2.2μH, C OUT = 10μF
0
5.02
100
L = 2.2μH, C OUT = 10μF x 2
4.86
0
1000
200
400
600
800
1000
1200
Output Current (mA)
Output Current (mA)
CH3 Buck Output Voltage vs. Output Current
CH2 Buck-Boost Output Voltage vs. Output Current
1.18
3.30
1.16
3.25
VIN = 1.8V
Output Voltage (V)
Output Voltage (V)
L = 2.2μH, C OUT = 10μF x 2
VIN = 2.4V
3.20
VIN = 3V
VIN = 3.6V
VIN = 4.2V
3.15
VIN = 5V
3.10
VIN = 1.8V
VIN = 2.4V
1.14
VIN = 3V
VIN = 3.6V
1.12
VIN = 4.2V
VIN = 5V
1.10
1.08
L = 1.2μH, C OUT = 44μF
3.05
1.06
0
200
400
600
800
1000
0
500
Output Current (mA)
1000
1500
2000
Output Current (mA)
CH5 Buck Output Voltage vs. Output Current
CH4 Buck Output Voltage vs. Output Current
1.240
1.81
1.79
VIN = 2.1V
1.78
VIN = 2.4V
1.77
VIN = 3V
1.76
VIN = 3.6V
1.75
VIN = 4.2V
Output Voltage (V)
Output Voltage (V)
1.80
VIN = 5V
1.74
1.235
1.230
VIN = 1.8V
VIN = 4.2V
VIN = 2.4V
VIN = 5V
VIN = 3V
1.225
1.73
VIN = 3.6V
1.72
L = 2.2μH, C OUT = 10μF
L = 2.2μH, C OUT = 10μF
1.71
1.220
0
200
400
600
800
Output Current (mA)
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS5035A/B-01
April 2016
1000
0
200
400
600
800
1000
Output Current (mA)
is a registered trademark of Richtek Technology Corporation.
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17
RT5035A/B
CH8 LDO Output Voltage vs. Output Current
5.07
2.945
5.06
2.940
5.05
Output Voltage (V)
Output Voltage (V)
CH6 LDO Output Voltage vs. Output Current
2.950
2.935
2.930
VIN = 3V
2.925
VIN = 3.3V
2.920
VIN = 3.6V
2.915
VIN = 4.2V
2.910
VIN = 4.5V
2.905
VIN = 5V
VIN = 5V
5.04
VIN = 5.1V
5.03
VIN = 5.2V
5.02
VIN = 5.3V
5.01
VIN = 5.4V
5.00
VIN = 5.5V
4.99
COUT = 1μF
2.900
COUT = 1μF
4.98
0
50
100
150
200
0
50
Output Current (mA)
100
150
200
Output Current (mA)
CH10 Buck Output Voltage vs. Output Current
CH9 LDO Output Voltage vs. Output Current
1.355
3.20
Output Voltage (V)
Output Voltage (V)
1.350
3.15
VIN = 3.3V
3.10
VIN = 3.6V
VIN = 3.9V
VIN = 4.2V
3.05
VIN = 1.8V
1.345
VIN = 2.4V
1.340
VIN = 3V
VIN = 3.6V
1.335
VIN = 4.2V
1.330
VIN = 5V
VIN = 4.5V
1.325
VIN = 5V
COUT = 1μF
3.00
L = 2.2μH, C OUT = 10μF
1.320
0
10
20
30
40
50
0
200
400
Output Current (mA)
CH7 Output Voltage vs. Input Voltage
800
1000
CH7 LED Current vs. Dimming Level
19.8
35
19.6
30
19.4
VIN = 1.8V
25
VIN = 3V
19.2
I LED (mA)
Output Voltage (V)
600
Output Current (mA)
19.0
18.8
VIN = 5.5V
20
15
18.6
10
18.4
5
18.2
Load = 6WLEDs/30mA, L = 10μH, C OUT = 1μF
Load = 6WLEDs, C OUT = 1μF
0
18.0
1.8 2.1 2.4 2.7
3 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7
Input Voltage (V)
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18
0
4
8
12
16
20
24
28
32
Dimming Level
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
CH6 LDO Dropout Voltage vs. Load Current
CH8 LDO Dropout Voltage vs. Load Current
0.12
0.08
0.07
Dropout Voltage (V)
Dropout Voltage (V)
0.10
90°C
0.08
0.06
40°C
0.04
25°C
0.02
0.06
90°C
0.05
0.04
40°C
0.03
0.02
25°C
0.01
0.00
0.00
0
50
100
150
0
200
50
100
150
200
Load Current (mA)
Load Current (mA)
CH6 LDO PSRR
CH9 LDO Dropout Voltage vs. Load Current
0
1.2
-10
-20
-30
0.8
90°C
PSRR (dB)
Dropout Voltage (V)
1.0
0.6
0.4
40°C
-40
-50
-60
-70
-80
0.2
-90
25°C
PVDD6 = 3.6V, VOUT6 = 2.7V, IOUT = 10mA
-100
0.0
0
10
20
30
40
10
50
100
10000
100000
1000000
CH9 LDO PSRR
0
-10
-10
-20
-20
-30
-30
PSRR (dB)
PSRR (dB)
CH8 LDO PSRR
0
-40
-50
-60
-40
-50
-60
-70
-70
-80
-80
-90
1000
Frequency (Hz)
Load Current (mA)
PVDD8 = 3.6V, VOUT8 = 3.4V, IOUT = 10mA
-90
VDDM = 3.1V, IOUT = 1mA
-100
-100
10
100
1000
10000
100000
1000000
Frequency (Hz)
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April 2016
10
100
1000
10000
100000
1000000
Frequency (Hz)
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RT5035A/B
Application Information
CH1 : Step-Up DC/DC Converter
CH1 is a step-up converter for motor driver power in DSC system. The converter operates at Async PFM or fixed
frequency PWM current mode which can be set by I2C. The converter integrates internal MOSFETs, FB resistors,
compensation network and synchronous rectifier for up to 95% efficiency. The output voltage of CH1 is adjustable
by the I2C interface in the range of 3.6V to 5.3V. When CH1 operates at Async. PFM mode, LX1 switches as below
waveform :
VLX1
Output charge per cycle :
Qo = Ilpk x Ilpk x L/(Vo-Vi) /2 = L x Ilpk^2 /2/(Vo-Vi)
Qo/Cout determines the output voltage ripple.
Iout = Qo x (switching frequency)
ILpk
IL1
Toff ³ min off time
Next cycle activated
by EA
(if VOUT1 < 3.6V)
Ton = constant on time
Ton let IL1 increase to ILpk
EA monitor VOUT1 ³ 3.6V to activate the switching.
If VIN (BAT)-Vf > 3.6V à async boost not switch.
If VIN-Vf < 3.6V, LX1 switch as the above waveform.
Max Iout would be limited by peak current limit and
switching frequency.
(where Vf is forward voltage of external Schottky diode.)
CH1 OVP Operation
Usually, CH1 suffers BEMF of motor, and OVP would occur abnormally. To eliminate this, the operation of CH1 is as
follows. When OVP (5.8V) occurs, CH1 stops switching and CH1 discharges VOUT1 through internal MOS (only for
discharge, I~30mA) until OVP hysteresis (5.5V) low threshold. If there is longer BEMF, the charging and discharging
period will repeat. PMU itself doesn’t shut down immediately, but shuts down when continuous 100mS OVP occurs.
OVP high threshold = 5.8V
OVP hysteresis low threshold = 5.5V
I_discharge
30mA
Longer BEMF
5.8V
5.5V
5V
BEMF
0V
CH2 : Synchronous Step-Up / Down DC/DC Converter
CH2 is a synchronous step-up / down converter for system I/O power. The converter operates at fixed frequency
PWM Current Mode. The converter integrates internal MOSFETs, FB resistors, compensation network and
synchronous rectifier for up to 95% efficiency. The output voltage of CH2 can be adjusted by the I2C interface in the
range of 2.9V to 3.65V.
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is a registered trademark of Richtek Technology Corporation.
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VNEG Charge Pump
The Charge pump is to increase the Vgs driving of big
PMOS in Ch2/3/4/5/10. When BAT < 3.6V and one of
Ch2/3/4/5/10 turns on, VNEG Charge Pump would turn
on and start to pump. But when pumping, the BAT
threshold to turn off and stop charge pump becomes
3.9V. When pumping, the (BAT  VNEG) voltage would
be clamped at 4.5V. But because of charge pumping
architecture limitation, most negative level of the VNEG
is only (BAT). Hence, if BAT < 4.5 / 2 = 2.25V, VNEG
is limited to (BAT). When VNEG Charge pump is off,
VNEG is connected internally to GND.
CH3 : Synchronous Step-Down DC/DC Converter
CH3 is suitable for core power in DSC system. The
converter operates in fixed frequency PWM mode with
integrated MOSFETs, FB resistors and compensation
network. The CH3 step-down converter can be
extend battery operating voltage range. The output
voltage of CH5 is adjustable by the I2C interface in the
range of 1.2V to 2V or set by external feedback
resistors, as expressed in the following equation :
VOUT_CH5 =
(1 + R1 / R2) x VFB5
where VFB5 is 0.8V typically and suggested value for
R1 is 100k to 600k.
CH6 : Generic LDO
CH6 is a generic low voltage LDO for multiple purpose
power. The CH6 is a linear regulator, designed to be
stable over the entire operating load range with the use
of external ceramic capacitors. CH6 has an ON/OFF
control which can be set by I2C commands. The output
voltage of CH6 is adjustable by the I2C interface in the
range of 1.2V to 3V.
CH7 : WLED Driver
operated at 100% maximum duty cycle to extend
battery operating voltage range. The output voltage of
CH3 is adjustable by the I2C interface in the range of
1V to 1.3V. Besides, the CH3 also can be adjusted
output voltage if I2C is set to use the external resistor.
The VOUT can be calculated by the equation as below :
CH7 is a WLED driver operates at asynchronous
VOUT_CH3 = (1 + R1 / R2) x VFB3
The WLED current can be set by the following equation :
Where VFB3 is 0.8V typically and suggested value for
R1 is 100k to 600k.
ILED (mA) = [0.3V / REXT] x (DIM7 + 1) / 32
step-up mode with an internal MOSFET and internal
compensation. The LED current is defined by FB7
voltage and the external resistor between FB7 and
GND. The FB7 regulation voltage can be set in 32
steps from 9.2mV to 300mV, typically, via I2C interface.
CH4 : Synchronous Step-Down DC/DC Converter
Where REXT is the current sense resistor from FB7 to
GND and (DIM7 + 1) / 32 ratio refers to I2C control
register file. The 0.3V voltage is with ±5% accuracy.
CH4 is suitable for digital I/O power in DSC system.
The maximum ILED is defined by 0.3V / REXT.
The converter operates in fixed frequency PWM mode
with integrated internal MOSFETs, FB resistors and
compensation network. The CH4 step-down converter
can be operated at 100% maximum duty cycle to
extend battery operating voltage range. The output
voltage of CH4 is adjustable by the I2C interface in the
range of 1.35V to 2.14V.
CH5 : Synchronous Step-Down DC/DC Converter
CH8 : Generic LDO
CH8 is a generic low voltage LDO for multiple purpose
power. The CH8 is a linear regulator, designed to be
stable over the entire operating load range with the use
of external ceramic capacitors. CH8 has an ON/OFF
control which can be set by I2C commands. The output
voltage of CH8 is adjustable by the I2C interface in the
range of 1.5V to 5.2V.
CH5 is suitable for CMOS sensor power in DSC system.
The converter operates in fixed frequency PWM mode
with integrated internal MOSFETs, FB resistors and
compensation network. The CH5 step-down converter
can be operated at 100% maximum duty cycle to
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April 2016
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RT5035A/B
CH9 : Keep Alive LDO and RTC Related Function Block
The RT5035A/B provides a 3.1V output LDO for all IC control circuits and real time clock. The LDO features low
quiescent current (3A) and high output voltage accuracy. This LDO is always on, even when the system is shut
down. For better stability, it is recommended to connect a 1F to the VDDM pin. The RTCPWR switch avoids back
charging from the RTCPWR node into the input node VDDM.
To ASIC Power
Sequencer
VM
3.1V
-
CL = 40mA (min)
+
BAT
VM
2.6V/2.4V
VM
+
VDDM = 3.1V ±3%
RTCPWR
+ Backup
Battery
1μF
VM
BAT
UVLO
RTCPWR
VDDM
+
VREF
Low BAT
discharge
UVLO
falling
delay 4ms
2.4V/2.2V
/RESET
RTCPWR
RTCPWR
/EN
/R
Freq divider
RTCPWR
RTCPWR
RTCPWR
32768Hz
To ASIC Power
Sequencer
Count
YY/MM/DD, Week,
hh : mm : ss
With leap year /R
correction
1Hz
clock
Rbias
RTCGND
N = 0 to 63
-
RTC
UVLO
+
1.9V
R1
XIN
XOUT
Internal bus
C1
C2
VDDM
C32K
To ASIC Power
Sequencer
CH10 : Synchronous Step-Down DC/DC Converter
CH10 is suitable for memory power in DSC system. The converter operates in fixed frequency PWM mode or PFM
mode with integrated internal MOSFETs, FB resistors and compensation network. The CH10 step-down converter
can be operated at 100% maximum duty cycle to extend battery operating voltage range. The output voltage of
CH10 is adjustable by the I2C interface in the range of 1.2V to 1.52V or set by external feedback resistors, as
expressed in the following equation :
VOUT_CH10 = (1 + R1 / R2) x VFB10
Where VFB10 is 0.8V typically and suggested value for R1 is 100k to 600k.
RTC_C32K
The Frequency Divider from 32768Hz to 1Hz would generate the below 1Hz wave that with a little jitter but the 1Hz
average frequency can be finely tuned.
RTCPWR
RTCPWR
C32K
Freq divider
Rbias
1Hz
clock
N = 0 to 127
R1
32767 CLKo
C2
C1
...
32767 CLKo
N CLKo
1Hz clock
1
60
60sec
Fine tune 1Hz by digital divider can create
tuning range = (-60 to 67) / (32768Hz x 60s) = -30 to 33 ppm
each tune step size = 0.5 ppm.
But the 1Hz would include jitter and the C32K still is not tuned.
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32767 CLKo
2
1
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
RTC time read/write method :
When reading RTC time via I2C interface, suggest read 6 bytes (address A11 to A16) together and finish reading
within 0.5 second to avoid the second carry issue. A16.RTCT_SEC[0] can be used for checking whether second is
carried during reading time. When writing RTC time via I2C interface, suggest to write 6 bytes (address A11 to A16)
together. A11 is first and then A12, A13, A14, A15, A16. Suggest finishing writing within 0.5 second to avoid second
carry issue during writing.
Output Voltage Ramp Rate
For instance, CH3 VCORE output voltage ramp up rate = 1.5 x 0.8V / 4ms = 0.3V/ms. The ramp up/down rate is kept
the same for enabling soft-start or dynamic output voltage adjustment.
Each channel has different ramp rate as listed below.
1.1V
1.1V
0V
1.3V
Ramp rate =
1.5 x 0.8V/4ms
Ramp rate = 1.5 x
0.8V/4ms
0.7ms
3.7ms
Note :
About Dynamic Voltage Scaling, CH1, CH3, CH4, CH8, CH10 output voltage can be changed without inrush and
Vout ramping control when they have been turned on (said, dynamically change Vout). CH2, CH5, CH6 are not.
Synchronization and Spread Spectrum
If SYNC remains logic high or low, the spread spectrum clock will act the main clock for PWM. And, spread spectrum
function can be turned off by register A15.SS.
If the toggling clock of SYNC is detected, the PLL clock will act the main clock for PWM and the clock of PLL will
track its frequency. And the division ratio is decided by A15.SYN_DIV.
Furthermore, according to the logic high and low level threshold voltage, both 1.8V and 3V logic are compatible. If it
isn't used, the SYNC pin must be connected to GND.
VDDM
ASIC
SYNC
CLK
Detection
Spread Spectrum
Clock Generator
0
A15.SS
The output interface
of ASIC : Push-Pull
is preferred.
DIV
1
Clock for PWM
synchronization
PLL
A15.SYN_DIV
If the clock of SYNC is 12MHz, VDDM is not recommended as pull-up power voltage. Other power domains can be
used if they fit the logic high and logic low threshold voltage.
Power On/Off Sequence
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April 2016
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RT5035A/B
Part.A : Li (SHDN_PFM1 = 0)
BAT
Battery Installed
And BATUVLO goes LOW
0V
PWM operation
5.0V (for instance)
VOUT1
5V
0V
BAT
BAT
VM(internal)
3.1V
3.1 or BAT
3.1 or BAT
VDDM
0V
/RESET
VDDM>2.4V and RTCOSC stable
(Sync with C32K)
EN pin
REF_GOOD
VREF, OSC, OTP, VDDM_UVLO, SEQ detection are ready.
ENDLY3
CH3
SHDLY3
ENDLY2
CH2
CH4
CH10
ENDLY4
ENDLY10
A13.SHDN_EN10=0
SHDLY2=0
SHDLY4=0
SHDLY10=0
Part.B : 2AA (SHDN_PFM1 = 1)
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is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
BAT
0V
Battery Installed
And BATUVLO goes LOW
PWM operation
5.0V (for instance)
PFM operation
PFM operation
3.6V
VOUT1
3.6V
5V
0V
3.6V
3.6V
VM(internal)
3.1V
3.1 or BAT
VDDM
0V
/RESET
VDDM>2.4V and RTCOSC stable
(Sync with C32K)
EN pin
REF_GOOD
VREF, OSC, OTP, VDDM_UVLO, SEQ detection are ready.
ENDLY3
CH3
SHDLY3
ENDLY2
CH2
CH4
CH10
ENDLY4
ENDLY10
A13.SHDN_EN10=0
SHDLY2=0
SHDLY4=0
SHDLY10=0
CH1 :
For 2AA case, as long as the BAT voltage is higher than UVLO and EN pin = L, CH1 keeps working in PFM mode
3.6V (default SHDN_EN1 = 1). However, when A14.PWM1 = 1, EN pin = H and the VDDM voltage is higher than
UVLO, CH1 will switch from PFM mode to PWM mode.
As for Li battery case, to save electricity, when BAT voltage is higher than UVLO and EN pin = L, the CH1 would be
off and truly shutdown (default SHDN_EN1 = 0)
CH2/3/4 :
CH2, CH3 and CH4 are both enabled by EN pin and with turn on delay time defined in I2C register A9 to A10.
CH10 :
CH10 is also equipped PFM operation to reduce operating quiescent current for memory self-refresh application.
When EN = H, I2C registers can be set to ready to get into standby mode. (Set SHDN_EN1 = 1 and SHDN_EN10 =
1)
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
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April 2016
is a registered trademark of Richtek Technology Corporation.
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RT5035A/B
And then EN goes low, IC will get into standby mode with CH1 and CH10 operating in PFM mode.
If BAT > 2.8V is guaranteed, SHDN_EN1 could be 0 to save electricity in standby mode.
As for back to shutdown mode, EN goes high, and to set I2C registers back to shutdown mode (SHDN_EN10 = 0
and SHDN_EN1 = 0 for Li battery. SHDN_EN10 = 0 and SHDN_EN1 keeps 1 for 2AA) and then EN goes low finally.
Power Sequence with Delay Time
The start point referred by ENDLYx delay time begins when the EN pin goes high. For instance, A14.EN8 = 1, CH8
turns on immediately.
EN Pin
A7.EN8
CH8 VOUT
I2C Register Information
The RT5035A/B I2C interface power must be supplied by either VOUT2 or an equal potential node. If RESET = Low,
I2C read/write can not function. The RT5035A/B I2C slave address = 0011000 (7bits). I2C interface supports fast
mode (bit rate up to 400kb/s). The write or read bit stream (N ³1) is shown below :
SDA
tLOW
tF
tSU;DAT
tR
tF
tR
tSP
tHD;STA
tBUF
SCL
tHD;STA
tHD;DAT
S
tSU;STA
tHIGH
tSU;STO
P
Sr
S
Read N bytes from RT5035
Slave Address
Register Address
S
0
A
R/W
Slave Address
MSB
A Sr
1
Data 2
A
Data for Address = m
LSB
MSB
Data N
LSB
A
A
Register Address
S
0
R/W
A
MSB
Data 1
LSB
A
Assume Address = m
P
Data for Address = m+N-1
Data for Address = m+1
Write N bytes to RT5035
Slave Address
LSB
A
Assume Address = m
MSB
Data 1
MSB
Data 2
LSB
A
Data for Address = m
MSB
A
Data for Address = m+1
Data N
LSB
A P
Data for Address = m+N-1
Driven by Master,
Driven by Slave (RT5035),
P Stop,
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S Start,
Sr Repeat Start
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
I2C Register File
Address Register
Name Address
Bit7
Bit6
Meaning
A1
0X01
Bit5
Bit4
Bit3
Bit2
VOUT1
Bit1
Bit0
VOUT2
Default
1
1
1
1
1
0
0
0
Read/Write
Reset
Condition
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
B
B
B
B
B
B
B
B
Setting of CH1 Output Voltage (Range : 5.3V to 3.6V, Default = 3.6V)
VOUT1
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
0000
5.3V
0100
4.9V
1000
4.5V
1100
4V
0001
5.2V
0101
4.8V
1001
4.4V
1101
3.9V
0010
5.1V
0110
4.7V
1010
4.3V
1110
3.8V
0011
5V
0111
4.6V
1011
4.2V
1111
3.6V
Setting of CH2 Output Voltage (Range : 3.65V to 2.9V, Default = 3.25V)
VOUT2
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
0000
3.65V
0100
3.45V
1000
3.25V
1100
3.05V
0001
3.6V
0101
3.4V
1001
3.2V
1101
3V
0010
3.55V
0110
3.35V
1010
3.15V
1110
2.95V
0011
3.5V
0111
3.3V
1011
3.1V
1111
2.9V
Bit2
Bit1
Bit0
Note : If CH1 operate in PFM mode (the bit A14.PWM1 = 0), VOUT1 = 3.6V only
Address Register
Name Address
A2
0X02
Bit7
Bit6
Bit5
Bit4
Bit3
Meaning
VOUT3
VOUT4
Default
Decided by SEQ
Decided by SEQ
Read/Write
Reset
Condition
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
B
B
B
B
B
B
B
B
Setting of CH3 Output Voltage (Range : 1.3V to 1V, Default is setting by SEQ)
VOUT3
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
0000
1.3V
0100
1.22V
1000
1.14V
1100
1.04V
0001
1.28V
0101
1.2V
1001
1.12V
1101
1.02V
0010
1.26V
0110
1.18V
1010
1.1V
1110
1V
0011
1.24V
0111
1.16V
1011
1.06V
1111
REF
Setting of CH4 Output Voltage (Range : 2.14V to 1.35V, Default is setting by
SEQ)
VOUT4
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
0000
2.14V
0100
2V
1000
1.84V
1100
1.5 V
0001
2.1V
0101
1.96V
1001
1.8V
1101
1.46V
0010
2.06V
0110
1.92V
1010
1.76V
1110
1.39V
0011
2.04V
0111
1.88V
1011
1.54V
1111
1.35V
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RT5035A/B
Address Register
Name Address
A3
0X03
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
VOUT5
Bit1
Bit0
Meaning
Reserved
VOUT6
Default
0
1
1
0
0
0
1
1
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Setting of CH5 Output Voltage (Range : 2.9V to 1.2V, Default = 1.2V)
VOUT5
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
000
2V
010
1.5V
100
1.26V
110
1.2V
001
1.8V
011
1.35V
101
1.23V
111
REF
Setting of CH6 Output Voltage (Range : 3.3V to 1.2V, Default = 2.7V)
VOUT6
Address Register
Name Address
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
0000
3V
0100
2.6V
1000
2.2V
1100
1.7V
0001
2.9V
0101
2.5V
1001
2V
1101
1.5V
0010
2.8V
0110
2.4V
1010
1.9V
1110
1.4V
0011
2.7V
0111
2.3V
1011
1.8V
1111
1.2V
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
A4
0X04
VOUT8
DIM7
Default
0
1
0
1
1
1
1
1
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Setting of CH8 Output Voltage (Range : 5.2V to 1.8V, Default = 5V)
VOUT8
Address Register
Name Address
Code
Voltage
Code
Voltage
Code
Voltage
000
5.2V
010
5V
100
3.4V
110
3V
001
5.1V
011
3.5V
101
3.3V
111
1.5V
Bit1
Bit0
Bit7
Meaning
0X05
Voltage
Defines LED current dimming ratio of CH7
The dimming ratio is (DIM7 + 1) / 32.
DIM7 define FB7 regulation voltage = 0.3V x (DIM7 + 1) / 32
DIM7
A5
Code
Bit6
Bit5
Bit4
Bit3
Bit2
Reserved Reserved Reserved Reserved Reserved
VOUT10
Default
0
0
0
0
0
by SEQ
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Setting of CH10 Output Voltage (Range : 1.82V to 1.33V, Default = SEQ Setting)
VOUT10
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
000
1.52V
010
1.37V
100
1.25V
110
1.2V
001
1.5V
011
1.35V
101
1.22V
111
REF
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is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
Address Register
Name Address
Bit7
Meaning
A6
0X06
Reserved Reserved
Bit5
Bit4
Bit3
Bit2
DIS10
DIS5
DIS4
DIS3
Bit1
Reversed Reserved
0
0
0
1
1
1
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Bit1
Bit0
DIS10
1 : CH10 would discharge VOUT10 node when it turns off.
0 : CH10 would not discharge VOUT10 node when it turns off.
DIS5
1 : CH5 would discharge VOUT5 node when it turns off.
0 : CH5 would not discharge VOUT5 node when it turns off.
DIS4
1 : CH4 would discharge VOUT4 node when it turns off.
0 : CH4 would not discharge VOUT4 node when it turns off.
DIS3
1 : CH3 would discharge VOUT3 node when it turns off.
0 : CH3 would not discharge VOUT3 node when it turns off.
Bit7
Meaning
0X07
Bit0
Default
Address Register
Name Address
A7
Bit6
Bit6
Bit5
Bit4
Bit3
Bit2
Reserved Reserved Reserved Reserved Reserved
OVP7
Default
0
0
0
0
0
1
1
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Setting CH7 OVP threshold at VOUT7 node in Step-Up mode (Range : 8V to 25V,
Default = 20V)
OVP7
Address Register
Name Address
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
000
8V
010
12V
100
16V
110
20V
001
10V
011
14V
101
18V
111
25V
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
A8
0X08
Reserved
Default
0
0
0
0
0
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Reserved
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April 2016
is a registered trademark of Richtek Technology Corporation.
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29
RT5035A/B
Address Register
Name Address
A9
0X09
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Meaning
ENDLY3
ENDLY2
Default
Decided by SEQ
Decided by SEQ
Bit0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Setting ENDLY3 for CH3 Power on delay time (2ms x ENDLY3).
ENDLY3
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
0000
0ms
0100
8ms
1000
16ms
1100
24ms
0001
2ms
0101
10ms
1001
18ms
1101
26ms
0010
4ms
0110
12ms
1010
20ms
1110
28ms
0011
6ms
0111
14ms
1011
22ms
1111
30ms
Setting ENDLY2 for CH2 Power on delay time (2ms x ENDLY2).
ENDLY2
Address Register
Name Address
A10
0X0A
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
0000
0ms
0100
8ms
1000
16ms
1100
24ms
0001
2ms
0101
10ms
1001
18ms
1101
26ms
0010
4ms
0110
12ms
1010
20ms
1110
28ms
0011
6ms
0111
14ms
1011
22ms
1111
30ms
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
ENDLY10
ENDLY4
Default
Decided by SEQ
Decided by SEQ
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Setting ENDLY10 for CH10 Power on delay time (2ms x ENDLY10).
ENDLY10
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
0000
0ms
0100
8ms
1000
16ms
1100
24ms
0001
2ms
0101
10ms
1001
18ms
1101
26ms
0010
4ms
0110
12ms
1010
20ms
1110
28ms
0011
6ms
0111
14ms
1011
22ms
1111
30ms
Setting ENDLY4 for CH4 Power on delay time (2ms x ENDLY4).
ENDLY4
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
0000
0ms
0100
8ms
1000
16ms
1100
24ms
0001
2ms
0101
10ms
1001
18ms
1101
26ms
0010
4ms
0110
12ms
1010
20ms
1110
28ms
0011
6ms
0111
14ms
1011
22ms
1111
30ms
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is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
Address Register
Name Address
A11
0X0B
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Meaning
SHDLY3
SHDLY2
Default
Decided by SEQ
Decided by SEQ
Bit0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Setting SHDLY3 for CH3 Power off delay time (2ms x SHDLY3).
SHDLY3
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
0000
0ms
0100
8ms
1000
16ms
1100
24ms
0001
2ms
0101
10ms
1001
18ms
1101
26ms
0010
4ms
0110
12ms
1010
20ms
1110
28ms
0011
6ms
0111
14ms
1011
22ms
1111
30ms
Setting SHDLY2 for CH2 Power off delay time (2ms x SHDLY2).
SHDLY2
Address Register
Name Address
A12
0X0C
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
0000
0ms
0100
8ms
1000
16ms
1100
24ms
0001
2ms
0101
10ms
1001
18ms
1101
26ms
0010
4ms
0110
12ms
1010
20ms
1110
28ms
0011
6ms
0111
14ms
1011
22ms
1111
30ms
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
SHDLY10
SHDLY4
Default
Decided by SEQ
Decided by SEQ
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Setting SHDLY10 for CH10 Power on delay time (2ms x SHDLY10).
SHDLY10
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
0000
0ms
0100
8ms
1000
16ms
1100
24ms
0001
2ms
0101
10ms
1001
18ms
1101
26ms
0010
4ms
0110
12ms
1010
20ms
1110
28ms
0011
6ms
0111
14ms
1011
22ms
1111
30ms
Setting SHDLY4 for CH4 Power on delay time (2ms x SHDLY4).
SHDLY4
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
0000
0ms
0100
8ms
1000
16ms
1100
24ms
0001
2ms
0101
10ms
1001
18ms
1101
26ms
0010
4ms
0110
12ms
1010
20ms
1110
28ms
0011
6ms
0111
14ms
1011
22ms
1111
30ms
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS5035A/B-01
April 2016
is a registered trademark of Richtek Technology Corporation.
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31
RT5035A/B
Address Register
Name Address
Bit7
Meaning
A13
0X0D
Bit5
Bit4
Bit3
Bit2
Reserved Reserved Reserved Reserved Reserved Reserved
Bit0
SHDN_
PFM1
SHDN_
PFM10
0
0
0
0
0
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
SHDN_PFM1
0 : CH1 is off when EN is low (Part. A default)
1 : CH1 operates at PFM when EN is low (Part. B default)
SHDN_PFM10
0 : CH10 is off when EN is low
1 : CH 10 operates at PFM when EN is low
0X0E
Bit1
Default
Address Register
Name Address
A14
Bit6
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
PWM1
ENSW4
EN4
EN5
EN6
EN7
EN8
PWM10
Default
1
0
1
0
0
0
0
1
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
A
A
A
A
A
A
A
A
PWM1
1 : Means CH1 in Peak-Current Control PWM synchronous rectified operation
mode.
0 : Means CH1 in PFM asynchronous rectified operation mode.
ENSW4
1 : Enable SW4.
0 : Disable SW4
EN4
1 : Enable CH4
0 : Disable CH4
EN5
1 : Enable CH5
0 : Disable CH5
EN6
1 : Enable CH6
0 : Disable CH6
EN7
1 : Enable CH7
0 : Disable CH7
EN8
1 : Enable CH8
0 : Disable CH8
PWM10
1 : Means CH10 in Peak-Current Control PWM synchronous rectified operation
mode.
0 : Means CH10 in PFM mode
Notes :
ENSW4, EN4/5/6/7/8 at A14 : enable (ENx = 1) or disable (ENx = 0) SW4/CH4/5/6/7/8
When EN pin goes high, CHx would turn on (after the delay time ENDLYx) if the bits ENx = 1.
The register byte A14 would be reset when the external EN input pin goes low.
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Meaning Reserved Reserved Reserved Reserved Reserved Reserved
A15
0X0F
SS
SYN_DIV
0
0
0
0
0
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Bit3
Bit2
Bit1
Bit0
0: FREQ of RT5035A/B=FREQ of SYNC
1: FREQ of RT5035A/B=FREQ of SYNC/6
0: Spread spectum OFF
1: Spread spectum ON
SS
Address Register
Name Address
Bit7
Meaning
0X10
Bit0
Default
SYN_DIV
A16
Bit1
Bit6
Bit5
Bit4
Reserved Reserved Reserved Reserved
DIS9
BAT_UVLO
Reserved
Default
0
0
0
0
0
1
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
0: No discharge VDDM when BATUVLO occurs.
1: Discharge VDDM when BATUVLO occurs.
DIS9
BAT UVLO Setting Voltage (Range : 2.4V to 2.7V, Default = 2.6V) (Part. A)
BAT_UVLO (Li)
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
00
2.4V
01
2.5V
10
2.6V
11
2.7V
BAT UVLO Setting Voltage (Range : 1.7V to 2V, Default = 1.7V) (Part. B)
BAT_UVLO (2AA)
Address Register
Name Address
A17
0X11
Code
Voltage
Code
Voltage
Code
Voltage
Code
Voltage
00
1.7V
01
1.8V
10
1.9V
11
2V
Bit2
Bit1
Bit0
Bit7
Bit6
Bit4
Bit3
Meaning
Reserved
Default
0
0
1
1
1
1
0
0
Read/Write
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
RTCAJ
RTCAJ
Finely tune the RTC time counting frequency by adjusting (RTCAJ − 60) / 2 ppm.
Hence, the tuning range is −30ppm to 33ppm.
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS5035A/B-01
Bit5
April 2016
is a registered trademark of Richtek Technology Corporation.
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RT5035A/B
Address Register
Name Address
A18
0X12
Bit7
Bit6
Meaning
BUSY
Reversed
Default
0
0
0
0
0
Read/Write
Reset
Condition
R
R
R/W
R/W
C
C
C
C
BUSY
Address Register
Name Address
0
0
R/W
R/W
R/W
R/W
C
C
C
C
Bit6
Bit5
Bit4
Bit2
Bit1
Bit0
Reversed Reversed
Bit3
RTCT_MIN
0
0
0
0
0
Read/Write
R
R
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
Bit2
Bit1
Bit0
Stores the MINUTE field of RTC time. That is 0 to 59.
Bit7
Bit6
Bit5
Meaning
MODE_12H
AM/PM
Reversed
Default
0
0
0
0
0
0
0
0
Read/Write
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
Bit4
Bit3
RTCT_HR
0 = 24H, 1 = 12H
0 = AM, 1 = PM
RTCT_HR[4:0]
Address Register
Name Address
Stores the HOUR field of RTC time. That is 0 to 23 (24hour format).
Bit7
Meaning
Bit6
Bit5
Bit4
Reversed Reversed
Bit3
Bit2
Bit1
Bit0
RTCT_YEAR
Default
0
0
0
0
1
1
0
1
Read/Write
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
RTCT_YEAR[6:0]
Stores the YEAR field of RTC time. That is 0 to 63. RTCT_YEAR = 0 means the
year 2000.
Hence, RT5035A/B can count till the year 2063.
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
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34
0
RTCT_SEC
0
AM/PM
0X15
Bit0
0
MODE_12H/24H
A21
Bit1
0
Address Register
Name Address
0X14
Bit2
Default
RTCT_MIN[5:0]
A20
Bit3
Stores the SECOND field of RTC time. That is 0 to 59.
Bit7
Meaning
0X13
Bit4
1: RTC is busy and the writing access is not allowed
RTCT_SEC[5:0]
A19
Bit5
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DS5035A/B-01
April 2016
RT5035A/B
Address Register
Name Address
Bit7
Bit6
Bit5
Meaning
Default
A22
0X16
Reversed Reversed Reversed Reversed
RTCT_MON
0
0
0
0
0
1
Reset
Condition
C
C
C
C
C
C
C
C
Stores the MONTH field of RTC time. That is 1 to 12. RTCT_MON = 1 means
January.
Bit7
Bit6
Bit5
Bit4
Bit3
RTCT_WEEK
Bit2
Bit1
Bit0
RTCT_DAY
Default
1
1
0
0
0
0
0
1
Read/Write
R
R
R
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
RTCT_WEK [2:0]
Stores the DAY-of-WEEK field of RTC time. That is 0 to 6.
RTCT_WEK = 0 means Sunday.
RTCT_WEK = 1 means Monday.
RT5035A/B cannot calculate automatically the field based on other fields. (YEAR,
MONTH, DATE).
RTCT_DAY[4:0]
Stores the DATE field of RTC time. That is 1 to 31, depending on the month.
RTCT_DAY [4:0] = 1 means 1st day of each month. RT5035A/B supports leap
year counting.
Bit7
Bit6
Bit5
Meaning
0X18
0X19
Bit2
Bit1
Bit0
0
0
0
0
0
0
0
0
Read/Write
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
USER[15:8]
Default
0
0
0
0
0
0
0
0
Read/Write
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
USER[23:16]
Default
0
0
0
0
0
0
0
0
Read/Write
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS5035A/B-01
Bit3
Default
Meaning
0X1A
Bit4
USER[7:0]
Meaning
A26
Bit0
0
Address Register
Name Address
A25
Bit1
RTC MONTH
Meaning
A24
Bit2
0
Address Register
Name Address
0X17
Bit3
Read/Write
RTCT_MON [3:0]
A23
Bit4
April 2016
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RT5035A/B
Address Register
Name Address
Bit7
Bit6
Bit5
Meaning
A27
0X1B
Bit4
Bit3
Bit2
Bit1
Bit0
USER[31:24]
Default
0
0
0
0
0
0
0
0
Read/Write
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
USER[31:0]
USER[31:0] at A24 to A27: Stores user's data. It is like a SARM, which accesses
via I2C.
Reset Condition
A
External EN pin goes low.
B
A0 to A13 and A15 : Reset when ( RESET = L) occurs.
C
A16 to A27: Reset when RTC Reset occurs.
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
Output Voltage List
I2C
Register Value
VOUT1
4bit
VOUT2
4bit
VOUT3
4bit
VOUT4
4bit
VOUT5
3bit
VOUT6
4bit
VOUT8
3bit
VOUT10
3bit
0
5.3
3.65
1.3
2.14
2
3
5.2
1.52
1
5.2
3.6
1.28
2.1
1.8
2.9
5.1
1.5
2
5.1
3.55
1.26
2.06
1.5
2.8
*5
1.37
3
5
3.5
1.24
2.04
1.35
* 2.7
3.5
1.35
4
4.9
3.45
1.22
2
1.26
2.6
3.4
1.25
5
4.8
3.4
1.2
1.96
1.23
2.5
3.3
1.22
6
4.7
3.35
1.18
1.92
*1.2
2.4
3
1.2
7
4.6
3.3
1.16
1.88
REF (0.8)
2.3
1.5
REF (0.8)
8
4.5
* 3.25
1.14
1.84
2.2
9
4.4
3.2
1.12
* 1.8
2
10
4.3
3.15
1.1
1.76
1.9
11
4.2
3.1
1.06
1.54
1.8
12
4
3.05
1.04
1.5
1.7
13
3.9
3
1.02
1.46
1.5
14
3.8
2.95
1
1.39
1.4
15
* 3.6
2.9
REF (0.8)
1.35
1.2
* : Default value
VOUT3/4/10 Default Voltage is selected by the SEQ pin and latched at the moment when RESET goes high.
SEQ ID
The SEQ pin pull down resistance RSEQ defines Power
on/off Sequence and Default Voltage.
SEQ ID
RSEQ Range
(k)
SEQ #0
Connect to Power
(>0.2V, <AVDD) before EN
goes high
SEQ #1
80> RSEQ >20
Typical
RSEQ(k)
Power on
Procedure
Reserved
40
Refer Table.
SEQ1
SEQ1
Register
Item
Code
Value
A2
VOUT3
1101
1.02V
A2
VOUT4
1001
1.8V
A5
VOUT10
111
REF
A9
ENDLY3
0111
14ms
A9
ENDLY2
1011
22ms
A10
ENDLY10
1001
18ms
A10
ENDLY4
1001
18ms
SEQ #2
20> RSEQ >5
10
Refer Table.
SEQ2
SHDLY3
1010
20ms
5> RSEQ >1.25
2.5
Refer Table.
SEQ3
A11
SEQ #3
A11
SHDLY2
0000
0ms
1.25> RSEQ or
0.625 or
Refer Table.
SEQ #4 connect to GND
short to GND
SEQ4
(<0.2V)
A12
SHDLY10
0000
0ms
A12
SHDLY4
0000
0ms
SEQ #5
RSEQ >80 or
floating (HZ)
120 or HZ
Refer Table.
SEQ5
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April 2016
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37
RT5035A/B
SEQ2
SEQ4
Register
Item
Code
Value
Register
Item
Code
Value
A2
VOUT3
1101
1.02V
A2
VOUT3
1000
1.14V
A2
VOUT4
1001
1.8V
A2
VOUT4
1001
1.8V
A5
VOUT10
101
1.22V
A5
VOUT10
011
1.35V
A9
ENDLY3
0111
14ms
A9
ENDLY3
0111
14ms
A9
ENDLY2
1001
18ms
A9
ENDLY2
1001
18ms
A10
ENDLY10
1001
18ms
A10
ENDLY10
1001
18ms
A10
ENDLY4
1001
18ms
A10
ENDLY4
1001
18ms
A11
SHDLY3
1010
20ms
A11
SHDLY3
1010
20ms
A11
SHDLY2
0000
0ms
A11
SHDLY2
0000
0ms
A12
SHDLY10
0000
0ms
A12
SHDLY10
0000
0ms
A12
SHDLY4
0000
0ms
A12
SHDLY4
0000
0ms
SEQ3
SEQ5
Register
Item
Code
Value
Register
Item
Code
Value
A2
VOUT3
1111
REF
A2
VOUT3
1101
1.02V
A2
VOUT4
1001
1.8V
A2
VOUT4
1001
1.8V
A5
VOUT10
111
REF
A5
VOUT10
011
1.35V
A9
ENDLY3
0111
14ms
A9
ENDLY3
0111
14ms
A9
ENDLY2
1001
18ms
A9
ENDLY2
1001
18ms
A10
ENDLY10
1001
18ms
A10
ENDLY10
1001
18ms
A10
ENDLY4
1001
18ms
A10
ENDLY4
1001
18ms
A11
SHDLY3
1010
20ms
A11
SHDLY3
1010
20ms
A11
SHDLY2
0000
0ms
A11
SHDLY2
0000
0ms
A12
SHDLY10
0000
0ms
A12
SHDLY10
0000
0ms
A12
SHDLY4
0000
0ms
A12
SHDLY4
0000
0ms
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
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38
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
Thermal Considerations
Layout Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
The PCB layout is an important step to maintain the
high performance of the RT5035A/B. Both the high
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature.
The maximum power dissipation can be calculated by
the following formula :
current and the fast switching nodes demand full
attention to the PCB layout to save the robustness of
the RT5035A/B through the PCB layout. Improper
layout might show the symptoms of poor line or load
regulation, ground and output voltage shifts, stability
issues, unsatisfying EMI behavior or worsened
efficiency. For the best performance of the RT5035A/B,
the following PCB layout guidelines must be strictly
followed.
PD(MAX) = (TJ(MAX)  TA) / JA
where TJ(MAX) is the maximum junction temperature,
TA is the ambient temperature, and JA is the junction to
ambient thermal resistance.
For recommended operating condition specifications,

possible to the input and output pins respectively for
good filtering.
the maximum junction temperature is 125C. The
junction to ambient thermal resistance, JA, is layout
dependent. For WQFN-40L 5x5 package, the thermal
resistance, JA, is 27.5C/W on a standard JEDEC
51-7 four-layer thermal test board. The maximum
power dissipation at TA = 25C can be calculated by
the following formula :

Keep the main power traces as wide and short as
possible.

The switching node area connected to LX and
inductor should be minimized for lower EMI.

Place the feedback components as close as possible
to the FB pin and keep these components away from
the noisy devices.

Connect the GND and Exposed Pad to a strong
ground plane for maximum thermal dissipation and
PD(MAX) = (125C  25C) / (27.5C/W) = 3.63W for
WQFN-40L 5x5 package
The maximum power dissipation depends on the
operating ambient temperature for fixed TJ(MAX) and
thermal resistance, JA. The derating curve in Figure 1
allows the designer to see the effect of rising ambient
noise protection.

Directly connect the output capacitors to the
feedback network of each channel to avoid bouncing
caused by parasitic resistance and inductance from
the PCB trace.

For the 32-kHz oscillator to the best performance,
observe the following guidelines :

Place the crystal and its components close to the
oscillator side and the oscillator pins.

Ensure that the ground plane under the oscillator and
its components are of good quality.

Avoid placing a separate ground under the oscillator
and connecting it to the general ground through a
single point.

Avoid long connections to the crystal and to the load
capacitor that create a large loop on the PCB.

Use a short connection between the two crystal load
capacitors and route the common connection to the
oscillator ground reference.
temperature on the maximum power dissipation.
Maximum Power Dissipation (W)1
4.0
Four-Layer PCB
3.5
3.0
Place the input and output capacitors as close as
2.5
2.0
1.5
1.0
0.5
0.0
0
25
50
75
100
Ambient Temperature (°C)
125
Figure 1. Derating Curve of Maximum Power
Dissipation
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS5035A/B-01
April 2016
is a registered trademark of Richtek Technology Corporation.
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39
RT5035A/B

Place a ceramic capacitor for noise filtering from
RTCPWR to RTCGND with short connections.

Place the C32K (logic output signal) output so that
the return ground current runs back to RTCGND. Do
not route the trace close to the oscillator input.
The ground surrounded C32K pin and
keep away from noisy devices.
LX should be connected to Inductor by wide and short
trace, keep sensitive compontents away from this trace.
BAT
GND
VOUT_CH3
GND
VOUT_CH1
Backup
Battery
COUT1
COUT1
RRTCPWR
CVDDM
CRTCPWR
CIN3
XIN
37
36
34
33
BAT
35
C32K
RTCPWR
38
Y1
PVDD3
VDDM
39
VOUT3/FB3
SYNC
40
XOUT
VOUT1
CIN1
RTCGND
CXIN CXOUT
L1
COUT3
32
31
L3
LX1 1
30 LX3
CIN8
REXT
D6
D5
D4
D3
CIN6/7
D2
D1
BAT
COUT7
/RESET 2
29 PVDD8
FB7 3
28 VOUT8
VOUT6 4
COUT8
VOUT_CH8
27 VOUT5/FB5
CIN5
PVDD6 5
L7
LX7 6
26 PVDD5
25 LX5
24 PVDD2
COUT5
LX10
23 LX2A
9
22 EN
19
20
RSEQ
SDA
CSWO
SEQ
18
VOUT2
17
RSCL
16
SCL
15
RSDA
CCP
14
VOUT4/SWI
13
VOUT10/FB10
12
CBAT
11
CN
CVNEG
L2
21 LX2B
SWO
VNEG 10
CP
L10
VOUT_CH5
L5
BAT
CIN2
PVDD4/10 8
BAT
COUT4
BAT
CIN4
GND
BAT
GND
LX4 7
VOUT_CH4
VOUT_CH10
COUT10
VOUT_CH1
COUT6
L4 D7
Input/Output
capacitors must be
placed as close as
possible to the
Input/Output pins.
GND
COUT2
COUT2
GND
SWO
GND
VOUT_CH2
Connect the
Exposed Pad to
a ground plane.
Figure 2. PCB Layout Guide
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is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
Max Load of Every Channel
Purpose
RT5035A/B
Current Limit
Max Load
Condition (VIN à VOUT)
VDDM and VMOTOR
CH1
3.5A
1200mA
3V à 5V
VI/O
CH2
3A
900mA
3V à 3.3V
VCORE
CH3
3A
2A
3V à 1.1V
VMEM
CH4
1.5A
700mA
3V à 1.8V
CMOS_D
CH5
1.5A
500mA
3V à 2.2V
CMOS_A
CH6
450mA
300mA
3V à 2.7V
Load SW
SW4
900mA
500mA
1.8V à 1.8V
WLED
CH7
0.8A
30mA
6 WLED
Generic LDO
CH8
300mA
200mA
VIN  VOUT > 150mV
Keep-Alive LDO
CH9
100mA
50mA
VIN VOUT > 300mV
VMEM
CH10
1.5A
700mA
3V à 1.35V
Protection Act
Protection
Type
Threshold
(Typical Value)
Delay
Time
Protection Method
Reset Method
VDDM
Over Voltage
Protection
VDDM > 6V
100ms
Turn off whole IC,
except CH9 and CH1
in PFM (only for 2AA)
Restart if VDDM < 5.8V
BAT
UVLO
No delay
Disable all channels
Restart if
VBAT > 2.6V (RT5035A),
VBAT > 1.7V (RT5035B)
VBAT < 2.4V (RT5035A)
VBAT < 1.5V (RT5035B)
Current Limit
(in PFM )
NMOS current > 0.8A
No delay
Turn off NMOS
Reset after min-off-time
finish
VOUT1 OVP
(in PWM)
VOUT1 > 5.8V
100ms
Turn off whole IC,
except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
OCP
(in PWM)
NMOS current > 3.5A
100ms
Turn off whole IC,
except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
VOUT1 UVP
(in PWM)
VOUT1< 2.25V
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
Over-Load
protection
(in PWM)
VOUT1 < target  0.6V
Turn off whole IC,
except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
CH1
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS5035A/B-01
April 2016
100ms
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
41
RT5035A/B
Protection
Type
Threshold
(Typical Value)
OCP
Inductor current > 3A
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
VOUT2 OVP
VOUT2 > 6V
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
VOUT2 UVP
VOUT2 < 1.6V
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
Over-Load
Protection
VOUT2 < target 0.4V
100ms
Turn off whole IC,
except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
OCP
PMOS current > 3A
100ms
Turn off whole IC,
except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
VOUT3 UVP
VOUT3 < 0.6V
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
Over-Load
Protection
VOUT3 < target – 0.15V
100ms
Turn off whole IC,
except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
OCP
PMOS current > 1.5A
100ms
Turn off whole IC,
except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
VOUT4 UVP
VOUT4 < 0.8V
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
Over-Load
Protection
VOUT4 < target 0.2V
100ms
Turn off whole IC,
except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
OCP
PMOS current > 1.5A
100ms
Turn off whole IC,
except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
VOUT5 UVP
VOUT5 < 0.8V
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
Over-Load
Protection
VOUT5 < target 0.2V
Turn off whole IC,
except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
UVP
A2.VOUT6 = 0 to 9,
VOUT6<1.6V
A2.VOUT6 = 10 to 15,
VOUT6 < 0.8V
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
CH2
CH3
CH4
CH5
CH6
Current Limit
42
Protection Method
100ms
PMOS current > 450mA No delay
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
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Delay
Time
Limit PMOS current
Reset Method
Reset by load
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
RT5035A/B
Protection
Type
Threshold
(Typical Value)
Delay
Time
Protection Method
Reset Method
OCP
NMOS current > 0.8A
100ms
Turn Off whole IC
VDDM power reset or
EN = low
OVP
LX7 > A4.OVP7
threshold
No delay
Turn Off CH7 only
VDDM power reset or
EN = low
UVP
VOUT8 < target x 0.5
CH7
CH8
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
Current Limit
PMOS current > 300mA No delay
Limit PMOS current
Reset by load
Current limit
PMOS current > 100mA No delay
Limit PMOS current
Reset by load
VDDM UVLO
VDDM < 2.2V
Turn off whole IC,
No delay except CH9 and CH1
in PFM
Restart whole IC if EN =
High and VDDM > 2.4V
RESET
VDDM < 2.2V
No delay
RESET goes low
Restart whole IC if EN =
High and VDDM > 2.4V
OCP
PMOS current > 1.5A
100ms
Turn off whole IC,
except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
VOUT10 UVP
VOUT10 < 0.8V
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
Over-Load
Protection
VOUT10 < target  0.2V
100ms
Turn off whole IC,
except CH9 and CH1
in PFM
VDDM power reset or
EN = low
RTCPWR
UVLO
RTCPWR < 1.9V
No delay
Clear RTC registers
RTCPWR > 2.2V
SW4
Load
Switch
UVP
SWO < SWI  0.9V
Or SWO < 0.9V
CH9
CH10
Current Limit
Thermal
Thermal
Shutdown
NMOS current > 900mA No delay
Temperature > 160C
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
DS5035A/B-01
April 2016
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
Limit N-MOSFET
current
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = L
Reset by load
Restart whole IC if
EN = High and
Temperature < 140C
is a registered trademark of Richtek Technology Corporation.
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43
RT5035A/B
Outline Dimension
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.150
0.250
0.006
0.010
D
4.950
5.050
0.195
0.199
D2
3.250
3.500
0.128
0.138
E
4.950
5.050
0.195
0.199
E2
3.250
3.500
0.128
0.138
e
L
0.400
0.350
0.016
0.450
0.014
0.018
W-Type 40L QFN 5x5 Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume
responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and
reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
Copyright © 2016 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS5035A/B-01
April 2016
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