24AA044 DATA SHEET (04/22/2014) DOWNLOAD

24AA044
4K I2C™ Serial EEPROM
Device Selection Table
Description:
Part
Number
VCC Range
Max Clock
Frequency
Temp.
Range
24AA044
1.7V-5.5V
1 MHz(1)
I, E
Note 1:
400 kHz for 1.8V ≤ VCC < 2.2V
100 kHz for VCC < 1.8V
Features:
• Single Supply with Operation from 1.7V to 5.5V
• Low-Power CMOS Technology:
- Read current 400 A, max
- Standby current 1 A, max at 85°C
• 2-Wire Serial Interface, I2C™ Compatible
• Cascadable up to Four Devices
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 1 MHz, 400 kHz, and 100 kHz Clock Compatibility
• Page Write Time 5 ms Maximum
• Self-timed Erase/Write Cycle
• 16-Byte Page Write Buffer
• Hardware Write-Protect
• ESD Protection >4,000V
• More than 1 Million Erase/Write Cycles
• Data Retention >200 Years
• Factory Programming Available
• Packages include 8-lead PDIP, SOIC, TSSOP,
UDFN and MSOP
• RoHS Compliant
• Temperature Ranges:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
The Microchip Technology Inc. 24AA044 is a 4 Kbit
Serial Electrically Erasable PROM with a voltage
range of 1.7V to 5.5V. The device is organized as two
blocks of 256 x 8-bit memory with a 2-wire serial
interface. Low-current design permits operation with
standby and active currents of only 1 A and 400 A,
respectively. The device has a page write capability for
up to 16 bytes of data. Functional address lines allow
the connection of up to four 24AA044 devices on the
same bus for up to 16K bits of contiguous EEPROM
memory. The device is available in the standard 8-pin
PDIP, 8-pin SOIC (3.90 mm), TSSOP, 2x3 UDFN and
MSOP packages.
Package Types
PDIP/SOIC/TSSOP/MSOP
NC
8
1
UDFN
VCC
A1
2
7
WP
A2
3
6
SCL
VSS
4
5
SDA
NC 1
8 VCC
7 WP
A1 2
6 SCL
A2 3
VSS 4
5 SDA
Block Diagram
A1A2
I/O
Control
Logic
WP
Memory
Control
Logic
HV Generator
XDEC
EEPROM
Array
SDA SCL
VCC
VSS
Write-Protect
Circuitry
YDEC
Sense Amp.
R/W Control
 2014 Microchip Technology Inc.
DS20005286A-page 1
24AA044
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings(†)
VCC .............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ................................................................................................................... -0.3V to 6.5V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied ................................................................................................-40°C to +125°C
ESD protection on all pins  4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. These are stress ratings only and functional operation of the device at these or any other conditions above
those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
TABLE 1-1:
DC SPECIFICATIONS
Industrial (I):
TA = -40°C to +85°C, VCC = +1.7V to +5.5V
Automotive (E): TA = -40°C to +125°C, VCC = +1.7V to +5.5V
DC CHARACTERISTICS
Param.
No.
Symbol
Characteristic
Min.
Max.
Units
Conditions
—
A1, A2, SCL, SDA and WP
pins
—
—
—
—
D1
VIH
High-level input voltage
0.7 VCC
VCC + 0.5
V
—
D2
VIL
Low-level input voltage
—
0.3 VCC
0.2 VCC
V
V
VCC ≥ 2.5V
VCC < 2.5V
D3
VHYS
Hysteresis of Schmitt
Trigger inputs
0.05 VCC
—
V
(Note)
D4
VOL
Low-level output voltage
—
0.40
V
IOL = 3.0 mA, VCC = 2.5V
D5
ILI
Input leakage current
—
±1
A
VIN = VSS or VCC
D6
ILO
Output leakage current
—
±1
A
VOUT = VSS or VCC
D7
CIN, COUT Pin capacitance
(all inputs/outputs)
—
10
pF
VCC = 5.5V (Note)
TA = 25°C, FCLK = 1 MHz
D8
ICC write
Operating current
—
3
mA
VCC = 5.5V
—
400
A
VCC = 5.5V, SCL = 1 MHz
Standby current
—
—
1
5
A
A
Industrial
Automotive
SDA, SCL = VCC
A1, A2, WP = VSS
D9
ICC read
D10
ICCS
Note:
This parameter is periodically sampled and not 100% tested.
DS20005286A-page 2
 2014 Microchip Technology Inc.
24AA044
TABLE 1-2:
AC CHARACTERISTICS
Industrial (I):
TA = -40°C to +85°C, VCC = +1.7V to +5.5V
Automotive (E): TA = -40°C to +125°C, VCC = +1.7V to +5.5V
AC CHARACTERISTICS
Param.
No.
Symbol
Characteristic
Min.
Max.
Units
Conditions
1
FCLK
Clock frequency
—
—
—
100
400
1000
kHz
1.7V  VCC < 1.8V
1.8V  VCC < 2.2V
2.2V  VCC < 5.5V
2
THIGH
Clock high time
4000
600
500
—
—
—
ns
1.7V  VCC < 1.8V
1.8V  VCC < 2.2V
2.2V  VCC < 5.5V
3
TLOW
Clock low time
4700
1300
500
—
—
—
ns
1.7V  VCC < 1.8V
1.8V  VCC < 2.2V
2.2V  VCC < 5.5V
4
TR
SDA and SCL rise time (Note 1)
—
—
—
1000
300
300
ns
1.7V  VCC < 1.8V
1.8V  VCC < 2.2V
2.2V  VCC < 5.5V
5
TF
SDA and SCL fall time (Note 1)
—
—
—
300
300
100
ns
1.7V  VCC < 1.8V
1.8V  VCC < 2.2V
2.2V  VCC < 5.5V
6
THD:STA
Start condition hold time
4000
600
250
—
—
—
ns
1.7V  VCC < 1.8V
1.8V  VCC < 2.2V
2.2V  VCC < 5.5V
7
TSU:STA
Start condition setup time
4700
600
250
—
—
—
ns
1.7V  VCC < 1.8V
1.8V  VCC < 2.2V
2.2V  VCC < 5.5V
8
THD:DAT
Data input hold time
0
—
ns
(Note 2)
9
TSU:DAT
Data input setup time
250
100
100
—
—
—
ns
1.7V  VCC < 1.8V
1.8V  VCC < 2.2V
2.2V  VCC < 5.5V
10
TSU:STO
Stop condition setup time
4000
600
250
—
—
—
ns
1.7V  VCC < 1.8V
1.8V  VCC < 2.2V
2.2V  VCC < 5.5V
11
TSU:WP
WP setup time
4000
600
600
—
—
—
ns
1.7V  VCC < 1.8V
1.8V  VCC < 2.2V
2.2V  VCC < 5.5V
12
THD:WP
WP hold time
4700
1300
1300
—
—
—
ns
1.7V  VCC < 1.8V
1.8V  VCC < 2.2V
2.2V  VCC < 5.5V
13
TAA
Output valid from clock (Note 2)
—
—
—
3500
900
400
ns
1.7V  VCC < 1.8V
1.8V  VCC < 2.2V
2.2V  VCC < 5.5V
14
TBUF
Bus free time: Time the bus must
be free before a new transmission
can start
4700
1300
500
—
—
ns
1.7V  VCC < 1.8V
1.8V  VCC < 2.2V
2.2V  VCC < 5.5V
15
TSP
Input filter spike suppression
(SDA and SCL pins)
—
50
ns
(Note 1)
—
16
TWC
Write cycle time (byte or page)
—
5
ms
17
—
Endurance
1M
—
cycles
Page mode, 25°C, VCC = 5.5V
(Note 3)
Note 1: Not 100% tested.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
200 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please
consult the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
 2014 Microchip Technology Inc.
DS20005286A-page 3
24AA044
FIGURE 1-1:
BUS TIMING DATA
5
SCL
7
SDA
In
3
4
D3
2
8
10
9
6
15
14
13
SDA
Out
WP
DS20005286A-page 4
(protected)
(unprotected)
11
12
 2014 Microchip Technology Inc.
24AA044
2.0
PIN DESCRIPTIONS
Pin Function Table
Name
PDIP
SOIC
TSSOP
UDFN
MSOP
NC
1
1
1
1
1
Not Connected
A1
2
2
2
2
2
Chip Address Input
2.1
A2
3
3
3
3
3
Chip Address Input
VSS
4
4
4
4
4
Ground
SDA
5
5
5
5
5
Serial Address/Data I/O
SCL
6
6
6
6
6
Serial Clock
WP
7
7
7
7
7
Write-Protect Input
VCC
8
8
8
8
8
+1.7 to 5.5V Power Supply
Serial Data (SDA)
SDA is a bidirectional pin used to transfer addresses
and data into and out of the device. It is an open-drain
terminal; therefore, the SDA bus requires a pull-up
resistor to VCC (typical 10 k for 100 kHz, 2 k for
400 kHz and 1 MHz).
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
2.2
Serial Clock (SCL)
The SCL input is used to synchronize the data transfer
from and to the device.
2.3
Description
Chip Address Inputs (A1, A2)
The levels on the A1 and A2 inputs are compared with
the corresponding bits in the slave address. The chip is
selected if the compare is true.
2.5
Noise Protection
The 24AA044 employs a VCC threshold detector circuit
which disables the internal erase/write logic if the VCC
is below 1.35V at nominal conditions.
The SCL and SDA inputs have Schmitt Trigger and
filter circuits which suppress noise spikes to assure
proper device operation, even on a noisy bus.
3.0
FUNCTIONAL DESCRIPTION
The 24AA044 supports a bidirectional, 2-wire bus
and data transmission protocol. A device that sends
data onto the bus is defined as transmitter, while a
device receiving data is defined as receiver. The bus
has to be controlled by a master device that generates the Serial Clock (SCL), controls the bus access
and generates the Start and Stop conditions, while
the 24AA044 works as slave. Both master and slave
can operate as transmitter or receiver, but the master
device determines which mode is activated.
Up to four 24AA044 devices may be connected to the
same bus by using different Chip Select bit combinations. These inputs must be connected to either VCC or
VSS.
2.4
Write-Protect (WP)
WP is the hardware write-protect pin. It must be tied to
VCC or VSS. If tied to Vcc, hardware write protection is
enabled. If WP is tied to Vss, the hardware write
protection is disabled.
 2014 Microchip Technology Inc.
DS20005286A-page 5
24AA044
4.0
BUS CHARACTERISTICS
The data on the line must be changed during the low
period of the clock signal. There is one bit of data per
clock pulse.
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy.
• During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Accordingly, the following bus conditions have been
defined (Figure 4-1).
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of the
data bytes transferred between the Start and Stop
conditions is determined by the master device and is,
theoretically, unlimited (though only the last sixteen will
be stored when performing a write operation). When an
overwrite does occur, it will replace data in a first-in
first-out fashion.
4.1
4.5
Bus Not Busy (A)
Each receiving device, when addressed, is required to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse, which is associated with this Acknowledge bit.
Both data and clock lines remain high.
4.2
Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
4.3
Note:
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
Data Valid (D)
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
FIGURE 4-1:
SCL
(A)
The 24AA044 does not generate any
Acknowledge bits if an internal programming cycle is in progress.
The device that acknowledges has to pull down the SDA
line during the acknowledge clock pulse in such a way
that the SDA line is stable-low during the high period of
the acknowledge-related clock pulse. Of course, setup
and hold times must be taken into account. A master
must signal an end of data to the slave by not generating
an Acknowledge bit on the last byte that has been
clocked out of the slave. In this case, the slave must
leave the data line high to enable the master to generate
the Stop condition (Figure 4-2).
Stop Data Transfer (C)
4.4
Acknowledge
DATA TRANSFER SEQUENCE ON THE SERIAL BUS CHARACTERISTICS
(B)
(C)
(D)
(C)
(A)
SDA
Start
Condition
FIGURE 4-2:
Address or
Acknowledge
Valid
Stop
Condition
Data
Allowed
to Change
ACKNOWLEDGE TIMING
Acknowledge
Bit
SCL
1
SDA
2
3
4
5
6
7
Data from transmitter
Transmitter must release the SDA line at this point allowing
the Receiver to pull the SDA line low to acknowledge the
previous eight bits of data.
DS20005286A-page 6
8
9
1
2
3
Data from transmitter
Receiver must release the SDA line at this
point so the Transmitter can continue
sending data.
 2014 Microchip Technology Inc.
24AA044
5.0
DEVICE ADDRESSING
A control byte is the first byte received following the
Start condition from the master device (Figure 5-1).
The control byte consists of a 4-bit control code. For the
24AA044, this is set as ‘1010’ binary for read and write
operations. The next two bits of the control byte are the
Chip Select bits (A2, A1). The Chip Select bits allow the
use of up to four 24AA044 devices on the same bus
and are used to select which device is accessed. The
Chip Select bits in the control byte must correspond to
the logic levels on the corresponding A2 and A1 pins
for the device to respond. These bits are in effect the
two Most Significant bits of the array address.
The next bit of the control byte is the block select bit
(B0). This bit acts as the A8 address bit for accessing
the entire array.
The last bit of the control byte defines the operation to
be performed. When set to a one, a read operation is
selected. When set to a zero, a write operation is
selected. Following the Start condition, the 24AA044
monitors the SDA bus checking the control byte being
transmitted. Upon receiving a ‘1010’ code and appropriate Chip Select bits, the slave device outputs an
Acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24AA044 will select a read or
write operation.
 2014 Microchip Technology Inc.
FIGURE 5-1:
CONTROL BYTE FORMAT
Read/Write Bit
Chip
Select
Bits
Control Code
S
1
0
1
0
A2
A1
Block
Select
Bit
B0 R/W ACK
Slave Address
Start Bit
5.1
Acknowledge Bit
Contiguous Addressing Across
Multiple Devices
The Chip Select bits A2 and A1 can be used to expand
the contiguous address space for up to 16K bits by adding up to four 24AA044 devices on the same bus. In this
case, software can use A1 of the control byte as
address bit A9, and A2 as address bit A10. It is not
possible to sequentially read across device
boundaries.
DS20005286A-page 7
24AA044
6.0
WRITE OPERATIONS
6.1
Byte Write
received data will be overwritten. As with the byte-write
operation, once the Stop condition is received, an
internal write cycle will begin (Figure 6-2). If an attempt
is made to write to the protected portion of the array
when the hardware write protection has been enabled,
the device will acknowledge the command, but no data
will be written.
Following the Start signal from the master, the device
code (4 bits), the Chip Select bits (2 bits), the block
select bit (1 bit), and the R/W bit (which is a logic-low)
is placed onto the bus by the master transmitter. The
device will acknowledge this control byte during the
ninth clock pulse. The next byte transmitted by the
master is the array address and will be written into the
Address Pointer of the 24AA044. After receiving
another Acknowledge signal from the 24AA044, the
master device will transmit the data byte to be written
into the addressed memory location. The 24AA044
acknowledges again and the master generates a Stop
condition. This initiates the internal write cycle and,
during this time, the 24AA044 will not generate
Acknowledge signals (Figure 6-1). If an attempt is
made to write to the protected portion of the array when
the hardware write protection has been enabled, the
device will acknowledge the command, but no data will
be written.
6.2
Note:
When doing a write of less than 16 bytes,
the data in the rest of the page is
refreshed along with the data bytes being
written. This will force the entire page to
endure a write cycle. For this reason,
endurance is specified per page.
Note:
Page write operations are limited to writing bytes within a single physical page,
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size
(or ‘page size’) and end at addresses that
are integer multiples of [page size – 1]. If
a Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page, as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
Page Write
The write control byte, array address and the first data
byte are transmitted to the 24AA044 in the same way
as in a byte write. However, instead of generating a
Stop condition, the master transmits up to 15 additional
data bytes to the 24AA044, which are temporarily
stored in the on-chip page buffer and will be written into
the memory once the master has transmitted a Stop
condition. Upon receipt of each byte, the four lowerorder Address Pointer bits are internally incremented
by one.
6.3
The higher-order five bits of the array address remain
constant. If the master should transmit more than 16
bytes prior to generating the Stop condition, the
address counter will roll over and the previously
The WP pin must be tied to VCC or VSS. If tied to VCC,
the entire array will be write-protected. If the WP pin is
tied to VSS, write operations to all address locations are
allowed.
FIGURE 6-1:
Write Protection
BYTE WRITE
BUS ACTIVITY
MASTER
S
T
A
R
T
SDA LINE
S
Control
Byte
Array
Address
P
A
C
K
BUS ACTIVITY
FIGURE 6-2:
BUS ACTIVITY
MASTER
SDA LINE
S
DS20005286A-page 8
A
C
K
A
C
K
PAGE WRITE
S
T
A
R
T
BUS ACTIVITY
S
T
O
P
Data
Control
Byte
Array
Address (n)
Data (n)
Data (n + 15)
Data (n +1)
S
T
O
P
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
 2014 Microchip Technology Inc.
24AA044
7.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally-timed write cycle, with ACK
polling being initiated immediately. This involves the
master sending a Start condition followed by the control
byte for a Write command (R/W = 0). If the device is still
busy with the write cycle, no ACK will be returned. If no
ACK is returned, the Start bit and control byte must be
re-sent. If the cycle is complete, the device will return
the ACK and the master can then proceed with the next
Read or Write command. See Figure 7-1 for a flow
diagram of this operation.
FIGURE 7-1:
ACKNOWLEDGE
POLLING FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)?
No
Yes
Next
Operation
 2014 Microchip Technology Inc.
DS20005286A-page 9
24AA044
8.0
READ OPERATIONS
8.3
Sequential Read
Read operations are initiated in the same way as write
operations, with the exception that the R/W bit of the
slave address is set to ‘1’. There are three basic types
of read operations: current address read, random read
and sequential read.
Sequential reads are initiated in the same way as a
random read except that after the 24AA044 transmits
the first data byte, the master issues an acknowledge
(as opposed to a Stop condition in a random read). This
directs the 24AA044 to transmit the next sequentiallyaddressed 8-bit value (Figure 8-3).
8.1
To provide sequential reads, the 24AA044 contains an
internal Address Pointer that is incremented by one
upon completion of each operation. This Address
Pointer allows the entire memory contents to be serially
read during one operation. The internal Address
Pointer will automatically roll over from address 1FFh
to address 000h.
Current Address Read
The 24AA044 contains an address counter that maintains the address of the last data byte accessed, internally incremented by one. Therefore, if the previous
read access was to address n, the next current address
read operation would access data from address n + 1.
Upon receipt of the slave address with the R/W bit set to
‘1’, the 24AA044 issues an acknowledge and transmits
the 8-bit data value. The master will not acknowledge
the transfer, but does generate a Stop condition and the
24AA044 discontinues transmission (Figure 8-1).
8.2
Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, the array address must first
be set. This is accomplished by sending the array
address to the 24AA044 as part of a write operation.
Once the array address is sent, the master generates a
Start condition following the acknowledge. This terminates the write operation, but not before the internal
Address Pointer is set. The master then issues the control byte again, but with the R/W bit set to a ‘1’. The
24AA044 will then issue an acknowledge and transmits
the 8-bit data value. The master will not acknowledge
the transfer but does generate a Stop condition and the
24AA044 discontinues transmission (Figure 8-2). After
this command, the internal address counter will point to
the address location following the one that was just
read.
DS20005286A-page 10
FIGURE 8-1:
S
T
BUS ACTIVITY A
MASTER
R
T
SDA LINE
S
BUS ACTIVITY
CURRENT ADDRESS
READ
Control
Byte
S
T
O
P
Data
P
A
C
K
N
O
A
C
K
 2014 Microchip Technology Inc.
24AA044
FIGURE 8-2:
RANDOM READ
BUS ACTIVITY
MASTER
S
T
A
R
T
Control
Byte
S
SDA LINE
BUS ACTIVITY
MASTER
Control
Byte
S
T
O
P
Data (n)
P
S
A
C
K
A
C
K
BUS ACTIVITY
FIGURE 8-3:
S
T
A
R
T
Array
Address (n)
N
O
A
C
K
A
C
K
SEQUENTIAL READ
Control
Byte
Data (n)
Data (n + 1)
Data (n + 2)
S
T
O
P
Data (n + x)
P
SDA LINE
BUS ACTIVITY
 2014 Microchip Technology Inc.
A
C
K
A
C
K
A
C
K
A
C
K
N
O
A
C
K
DS20005286A-page 11
24AA044
9.0
PACKAGING INFORMATION
9.1
Package Marking Information
8-Lead PDIP (300 mil)
XXXXXXXX
XXXXXNNN
YYWW
8-Lead SOIC (3.90 mm)
XXXXXXXX
XXXXYYWW
NNN
8-Lead TSSOP
Example:
24AA044
e3 1411
13F
Example:
AACL
YYWW
1411
NNN
13F
XXXXYY
WWNNN
8-Lead 2x3 UDFN
DS20005286A-page 12
24AA044
e3 13F
1411
XXXX
8-Lead MSOP
XXX
YWW
NN
Example:
Example:
4A4414
1113F
Example:
CAD
411
13
 2014 Microchip Technology Inc.
24AA044
Part Number
24AA024
Legend: XX...X
Y
YY
WW
NNN
e3
1st Line Marking Codes
PDIP
SOIC
TSSOP
MSOP
UDFN
24AA044
24AA044
AACL
4A44YY
CAD
Part number or part number code
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code (2 characters for small packages)
JEDEC® designator for Matte Tin (Sn)
Note:
For very small packages with no room for the Pb-free JEDEC designator
e3 , the marking will only appear on the outer carton or reel label.
Note:
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
*Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.
 2014 Microchip Technology Inc.
DS20005286A-page 13
24AA044
8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
N
B
E1
NOTE 1
1
2
TOP VIEW
E
C
A2
A
PLANE
L
c
A1
e
eB
8X b1
8X b
.010
C
SIDE VIEW
END VIEW
Microchip Technology Drawing No. C04-018D Sheet 1 of 2
DS20005286A-page 14
 2014 Microchip Technology Inc.
24AA044
8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
ALTERNATE LEAD DESIGN
(VENDOR DEPENDENT)
DATUM A
DATUM A
b
b
e
2
e
2
e
Units
Dimension Limits
Number of Pins
N
e
Pitch
Top to Seating Plane
A
Molded Package Thickness
A2
Base to Seating Plane
A1
Shoulder to Shoulder Width
E
Molded Package Width
E1
Overall Length
D
Tip to Seating Plane
L
c
Lead Thickness
Upper Lead Width
b1
b
Lower Lead Width
Overall Row Spacing
eB
§
e
MIN
.115
.015
.290
.240
.348
.115
.008
.040
.014
-
INCHES
NOM
8
.100 BSC
.130
.310
.250
.365
.130
.010
.060
.018
-
MAX
.210
.195
.325
.280
.400
.150
.015
.070
.022
.430
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed .010" per side.
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing No. C04-018D Sheet 2 of 2
 2014 Microchip Technology Inc.
DS20005286A-page 15
24AA044
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20005286A-page 16
 2014 Microchip Technology Inc.
24AA044
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
 2014 Microchip Technology Inc.
DS20005286A-page 17
24AA044
!"#$%
&
!
"#$%&"'""
($)
%
*++&&&!
!+$
DS20005286A-page 18
 2014 Microchip Technology Inc.
24AA044
'(()
'** !"'%
&
!
"#$%&"'""
($)
%
*++&&&!
!+$
D
N
E
E1
NOTE 1
1
2
b
e
c
A
φ
A2
A1
L
L1
@"
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A!"
E#!7
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AA88
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 2014 Microchip Technology Inc.
DS20005286A-page 19
24AA044
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20005286A-page 20
 2014 Microchip Technology Inc.
24AA044
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
 2014 Microchip Technology Inc.
DS20005286A-page 21
24AA044
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20005286A-page 22
 2014 Microchip Technology Inc.
24AA044
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
 2014 Microchip Technology Inc.
DS20005286A-page 23
24AA044
+
,
)-./0112 !"/+,%
&
!
"#$%&"'""
($)
%
*++&&&!
!+$
DS20005286A-page 24
 2014 Microchip Technology Inc.
24AA044
+
,
)-./0112 !"/+,%
&
!
"#$%&"'""
($)
%
*++&&&!
!+$
 2014 Microchip Technology Inc.
DS20005286A-page 25
24AA044
APPENDIX A:
REVISION HISTORY
Revision A (04/2014)
Initial release of the document.
DS20005286A-page 26
 2014 Microchip Technology Inc.
24AA044
THE MICROCHIP WEB SITE
CUSTOMER SUPPORT
Microchip provides online support via our WWW site at
www.microchip.com. This web site is used as a means
to make files and information easily available to
customers. Accessible by using your favorite Internet
browser, the web site contains the following
information:
Users of Microchip products can receive assistance
through several channels:
• Product Support – Data sheets and errata,
application notes and sample programs, design
resources, user’s guides and hardware support
documents, latest software releases and archived
software
• General Technical Support – Frequently Asked
Questions (FAQ), technical support requests,
online discussion groups, Microchip consultant
program member listing
• Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives
•
•
•
•
Distributor or Representative
Local Sales Office
Field Application Engineer (FAE)
Technical Support
Customers
should
contact
their
distributor,
representative or Field Application Engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
included in the back of this document.
Technical support is available through the web site
at: http://microchip.com/support
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com. Under “Support”, click on
“Customer Change Notification” and follow the
registration instructions.
 2014 Microchip Technology Inc.
DS20005286A-page 27
24AA044
NOTES:
DS20005286A-page 28
 2014 Microchip Technology Inc.
24AA044
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XX
Temperature
Range
Device:
Package
24AA044: 1.7V, 4 Kbit Addressable Serial EEPROM.
24AA044T:1.7V, 4 Kbit Addressable Serial EEPROM
(Tape and Reel).
Temperature Range:
I
E
=
=
Package:
P
SN
ST
MS
MUY(1)
-40°C to +85°C
-40°C to +125°C
=
=
=
=
=
Examples:
a)
b)
c)
d)
e)
24AA044-I/P: Industrial Temperature, 1.7V,
PDIP Package
24AA044-I/SN: Industrial Temperature,
1.7V, SOIC Package
24AA044T-I/ST: Industrial Temperature,
1.7V, TSSOP Package, Tape and Reel
24AA044T-E/MUY: Automotive Temperature, 1.7V, UDFN Package, Tape and Reel
24AA044T-E/MS: Automotive Temperature,
1.7V, MSOP Package, Tape and Reel
Plastic DIP, (300 mil Body), 8-lead
Plastic SOIC, (3.90 mm Body)
TSSOP, 8-lead
MSOP, 8-lead
Plastic Dual Flat (UDFN), No lead package,
2x3 mm body, 8-lead
Note 1: “Y” indicates a Nickel Palladium Gold (NiPdAu) finish.
 2014 Microchip Technology Inc.
DS20005286A-page 29
24AA044
NOTES:
DS20005286A-page 30
 2014 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2014, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-63276-162-0
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
 2014 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS20005286A-page 31
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2943-5100
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Austin, TX
Tel: 512-257-3370
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Cleveland
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Novi, MI
Tel: 248-848-4000
Houston, TX
Tel: 281-894-5983
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
New York, NY
Tel: 631-435-6000
San Jose, CA
Tel: 408-735-9110
Canada - Toronto
Tel: 905-673-0699
Fax: 905-673-6509
DS20005286A-page 32
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
China - Hangzhou
Tel: 86-571-8792-8115
Fax: 86-571-8792-8116
China - Hong Kong SAR
Tel: 852-2943-5100
Fax: 852-2401-3431
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
China - Shenzhen
Tel: 86-755-8864-2200
Fax: 86-755-8203-1760
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
India - Pune
Tel: 91-20-3019-1500
Japan - Osaka
Tel: 81-6-6152-7160
Fax: 81-6-6152-9310
Japan - Tokyo
Tel: 81-3-6880- 3770
Fax: 81-3-6880-3771
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Germany - Dusseldorf
Tel: 49-2129-3766400
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Germany - Pforzheim
Tel: 49-7231-424750
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Italy - Venice
Tel: 39-049-7625286
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
Poland - Warsaw
Tel: 48-22-3325737
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
Sweden - Stockholm
Tel: 46-8-5090-4654
UK - Wokingham
Tel: 44-118-921-5800
Fax: 44-118-921-5820
Taiwan - Kaohsiung
Tel: 886-7-213-7830
Taiwan - Taipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
03/25/14
 2014 Microchip Technology Inc.