® RT8128A/C High Efficiency Synchronous Buck PWM Controller General Description Features The RT8128A/C PWM controller provides high efficiency, excellent transient response, and high DC output accuracy needed for CPU core, I/O, and chipset RAM supplies in notebook computers. Richtek Mach ResponseTM technology is specifically designed for providing 100ns “instant-on” response to load transients while maintaining a relatively constant switching frequency. The RT8128A/C achieves high efficiency at a reduced cost by eliminating the current sense resistor found in traditional current mode PWMs. Efficiency is further enhanced by its ability to drive very large synchronous rectifier MOSFETs. The Buck conversion allows this device to directly step down high voltage batteries at the highest possible efficiency. The RT8128A/C is designed for CPU core, chipset, DRAM, or other low voltage supplies as low as 0.6V. Richtek Mach ResponseTM Technology VCC Input Range : 4.5V to 13.2V VOUT Operating Range : 0.6V to 5V Power Stage Input Range : 2.5V to 24V Shutdown Current <10μ μA Operating Frequency : Fixed 300kHz Diode Emulation Mode (RT8128A) VIN Detection Pinless LGATE Over-Current Setting (LGOCS) Power Good Indication Embedded Bootstrap Switch Current Limit with Low-Side Current Sense Scheme 1% High Accuracy Internal VREF = 0.6V Enable Function OVP/UVP/OTP/Pre-OVP/OCP RoHS Compliant and Halogen Free Applications Chipset/RAM Supply as Low as 0.6V Generic DC/DC Power Regulator Simplified Application Circuit VIN RT8128A/C VCC UGATE BOOT VCC 5V PHASE PGOOD LGATE/ OCSET Enable PGOOD EN VOUT FB GND Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS8128A/C-03 March 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT8128A/C Ordering Information Marking Information RT8128A/C RT8128xGSP : Product Number Package Type SP : SOP-8 (Exposed Pad-Option 1) RT8128x GSPYMDNN x : A or C YMDNN : Date Code Lead Plating System G : Green (Halogen Free and Pb Free) A : Diode Emulation Mode C : FCCM Pin Configurations (TOP VIEW) Note : Richtek products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. 8 BOOT Suitable for use in SnPb or Pb-free soldering processes. UGATE 2 PGOOD 3 LGATE/OCSET 4 GND PHASE 7 EN 6 FB 5 VCC 9 SOP-8 (Exposed Pad) Functional Pin Description Pin No. Pin Name Pin Function 1 BOOT Bootstrap Supply for High-Side Gate Driver. Connect a capacitor between the BOOT and PHASE pins. 2 UGATE Gate Drive Output for the High-Side External MOSFET. 3 PGOOD Open-Drain Power Good Indicator. High impedance indicates power is good. 4 LGATE/OCSET Gate Drive Output for the Low-Side External MOSFET. This pin is also used to set the OCP threshold. Please refer the application information. 5 VCC Control Voltage Input. It supports the power for the PWM controller, the low-side driver and the bootstrap circuit for high-side driver. Bypass to GND with a 4.7F ceramic capacitor. 6 FB Feedback Voltage Input. Connect FB and GND to a resistive voltage divider to set the output voltage level. The internal reference voltage is 0.6V typically. 7 EN Active-High Enable Control Input. Pull low to GND to disable the PWM controller. 8 PHASE Return Path of High-Side Gate Driver. Connect this pin to external MOSFETs and inductor. It behaves as the current sense comparator input for low-side MOSFET RDS(ON) sensing and reference voltage for on-time generation. 9 (Exposed pad) GND Ground. Connect this pin directly to the low-side MOSFET source and ground plane with the lowest impedance. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS8128A/C-03 March 2016 RT8128A/C Functional Block Diagram BOOT On-time One-Shot PHASE R - COMP VREF S + UGATE Q PHASE + 125% VREF FB VCC POR SS EN UV Latch S1 Q Min TOFF VCC - 67.5% VREF OV Latch S1 Q LGATE/OCSET GND + REF Thermal Shutdown DEM RT8128A 50µA VREF PGOOD + - + gm - Sample and Hold Operation The controller with the Mach ResponseTM technology is suitable for low external component count configuration with appropriate amount of Equivalent Series Resistance (ESR) capacitor(s) at the output. The output ripple valley voltage is monitored at a feedback point voltage. Refer to the function block diagrams of the RT8128A/C, the synchronous high-side MOSFET is turned on at the beginning of each cycle. After the internal one-shot timer expires, the MOSFET is turned off. The pulse width of this one-shot is determined by the converter's input and output voltages to keep the frequency fairly constant over the entire input voltage range. Another one-shot sets a minimum off-time (400ns typ.). Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS8128A/C-03 March 2016 The on-time one-shot comparator has two inputs. One input looks at the output voltage, while the other input samples the input voltage and converts it to a current. This input voltage proportional current is used to charge an internal on-time capacitor. The on-time is the time required for the voltage on this capacitor to charge from zero volt to VOUT, thereby making the on-time of the highside switch directly proportional to the output voltage and inversely proportional to the input voltage. The implementation results in a nearly constant switching frequency without the need of a clock generator. is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT8128A/C Absolute Maximum Ratings (Note 1) VCC to GND --------------------------------------------------------------------------------------------------------------FB, EN to GND -----------------------------------------------------------------------------------------------------------BOOT to GND DC ---------------------------------------------------------------------------------------------------------------------------<100ns ---------------------------------------------------------------------------------------------------------------------BOOT to PHASE DC ---------------------------------------------------------------------------------------------------------------------------<100ns ---------------------------------------------------------------------------------------------------------------------PHASE to GND DC ---------------------------------------------------------------------------------------------------------------------------<100ns ---------------------------------------------------------------------------------------------------------------------UGATE to GND DC ---------------------------------------------------------------------------------------------------------------------------<100ns ---------------------------------------------------------------------------------------------------------------------UGATE to PHASE DC ---------------------------------------------------------------------------------------------------------------------------<100ns ---------------------------------------------------------------------------------------------------------------------LGATE to GND DC ---------------------------------------------------------------------------------------------------------------------------<100ns ---------------------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------------------Package Thermal Resistance (Note2) SOP-8 (Exposed Pad), θJA -------------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJC -------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------------Junction Temperature ---------------------------------------------------------------------------------------------------Storage Temperature Range ------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Model) --------------------------------------------------------------------------------------------- Recommended Operating Conditions www.richtek.com 4 −0.3V to 40V −0.3V to 45V −0.3V to 15V −0.3V to 20V −5V to 25V −10V to 30V −0.3V to 40V −10V to 45V −0.3V to 15V −5V to 20V −0.3V to 15V −5V to 20V 3.26W 30.6°C/W 3.4°C/W 260°C 150°C −65°C to 150°C 2kV (Note 4) Input Voltage, VIN -------------------------------------------------------------------------------------------------------Supply Voltage, VCC ---------------------------------------------------------------------------------------------------Junction Temperature Range ------------------------------------------------------------------------------------------Ambient Temperature Range ------------------------------------------------------------------------------------------- Copyright © 2016 Richtek Technology Corporation. All rights reserved. −0.3V to 15V −0.3V to 6.5V 2.5V to 24V 4.5V to 13.2V −40°C to 125°C −40°C to 85°C is a registered trademark of Richtek Technology Corporation. DS8128A/C-03 March 2016 RT8128A/C Electrical Characteristics (TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Rising Edge, Hysteresis = 120mV, PWM disabled below this level 3.8 4 4.2 V PWM Controller VCC POR Threshold VCC Quiescent Supply Current IQ FB forced above the Regulation Point, VEN = 5V -- 0.5 1.25 mA VCC Shutdown Current ISHDN VCC Current, VEN = 0V -- -- 10 A 588 594 600 mV 0.6 -- 5 V 270 300 330 kHz 200 -- -- ns IOCSET 45 50 55 A Zero Crossing Threshold 6 -- 8 mV -- 3 -- ms Current Limit Threshold Offset 20 -- 20 mV Current Limit Threshold Setting Range 50 -- 400 mV Feedback Threshold (Note 5) VFB Output Voltage Range VOUT Switching Frequency fOSC VCC = 4.5V to 13.2V (Note 6) Minimum Off-Time Current Sensing Soft-Start Time TSS Protection Function UV Threshold UVP Detect, FB Falling Edge 60 -- 75 % OVP Threshold OVP Detect, FB Rising Edge 120 125 130 % -- 140 -- C -- 1.5 3 -- 2.25 4 -- 1.5 3 -- 1 2 Thermal Shutdown Driver On-Resistance UGATE Driver Source RUGATEsr UGATE Driver Sink RUGATEsk LGATE Driver Source RLGATEsr LGATE Driver Sink RLGATEsk VBOOT VPHASE = 12V, Source Current = 100mA VUGATE VPHASE = 0.1V, ISNK = 50mA VCC = 12V, Source Current = 100mA VLGATE, ISNK = 50mA Dead Time LGATE Rising (VPHASE = 1.5V) -- 30 -- ns Dead Time Internal Boost Charging Switch On-Resistance EN Threshold UGATE Rising -- 30 -- ns VCC to BOOT, 10mA -- -- 80 EN Threshold Logic-High VIH -- -- 2.4 Logic-Low VIL 0.4 -- -- -- -- 10 EN Current High State, forced to 5V Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS8128A/C-03 March 2016 V A is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT8128A/C Parameter Symbol Test Conditions Min Typ Max Unit PGOOD (Upper Side Threshold Decided by OV threshold) PGOOD Blanking Time PGOOD Rising Edge from VIN Detect -- -- 10 ms Output Low Voltage ISINK = 4mA -- -- 0.3 V Leakage Current High State, Forced to 5V -- -- 1 A Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. The reference voltage shift −6mV from 0.6V for offset canceling under feedback valley control. Note 6. No production tested. Test condition VIN = 12V, VOUT = 1.5V, IOUT = 10A using application circuit. Typical Application Circuit VIN RT8128A/C 5 VCC VCC 4.7µF 5V PGOOD Enable 100k 3 7 PGOOD EN PHASE 8 LGATE/ 4 OCSET 6 FB GND 9 (Exposed pad) Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 22µF x 2 UGATE 2 BOOT 1 VOUT 0.1µF 1µH 820µF x2 10µF x2 2.7k 2.1k 1.4k is a registered trademark of Richtek Technology Corporation. DS8128A/C-03 March 2016 RT8128A/C Typical Operating Characteristics Output Voltage vs. Load Current 1.54 90 1.53 80 1.52 Output Voltage (V) Efficiency (%) Efficiency vs. Load Current 100 70 60 RT8128A RT8128C 50 40 30 1.51 1.50 1.49 RT8128C RT8128A 1.48 1.47 20 1.46 10 VIN = VCC = 12V VIN = VCC = 12V, VOUT = 1.5V 0 0.01 1.45 0.1 1 10 100 0 2 4 6 Load Current (A) 10 12 14 16 18 20 Load Current (A) TON vs. Temperature Frequency vs. Load Current 500 450 400 480 350 460 RT8128C RT8128A 300 TON (ns) Frequency (kHz)1 8 250 200 150 440 420 400 100 380 50 VIN = VCC = 12V, VOUT = 1.5V, No Load VIN = VCC = 12V, VOUT = 1.5V 360 0 0 2 4 6 8 10 12 14 16 18 -50 20 -25 0 25 50 75 Load Current (A) Temperature (°C) Output Voltage vs. Temperature Power On from EN 100 125 1.54 RT8128A Output Voltage (V) 1.53 EN (5V/Div) 1.52 1.51 VOUT (1V/Div) 1.50 1.49 PGOOD (10V/Div) 1.48 1.47 1.46 VIN = VCC = 12V, No Load UGATE (20V/Div) VIN = VCC = 12V, IOUT = 50mA 1.45 -50 -25 0 25 50 75 100 125 Time (2ms/Div) Temperature (°C) Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS8128A/C-03 March 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT8128A/C Power On from EN Power Off from EN RT8128C RT8128A EN (5V/Div) EN (5V/Div) VOUT (1V/Div) VOUT (1V/Div) PGOOD (10V/Div) PGOOD (10V/Div) UGATE (20V/Div) VIN = VCC = 12V, IOUT = 50mA UGATE (20V/Div) VIN = VCC = 12V, IOUT = 50mA Time (2ms/Div) Time (5ms/Div) Power Off from EN Load Transient Response RT8128A RT8128C VOUT (100mV/Div) EN (5V/Div) IOUT (10A/Div) VOUT (1V/Div) PGOOD (10V/Div) UGATE (20V/Div) VIN = VCC = 12V, VOUT = 1.5V VIN = VCC = 12V, IOUT = 50mA Time (2ms/Div) Time (200μs/Div) Load Transient Response OVP RT8128C VOUT (100mV/Div) IOUT (10A/Div) VFB (1V/Div) VOUT (2V/Div) PGOOD (5V/Div) VIN = VCC = 12V, VOUT = 1.5V Time (200μs/Div) Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 LGATE (10V/Div) VIN = VCC = 12V, VOUT = 1.5V Time (100μs/Div) is a registered trademark of Richtek Technology Corporation. DS8128A/C-03 March 2016 RT8128A/C UVP OCP VOUT (2V/Div) VOUT (1V/Div) IL (20A/Div) UGATE (20V/Div) UGATE (20V/Div) LGATE (10V/Div) VIN = VCC = 12V, VOUT = 1.5V Time (20μs/Div) LGATE (10V/Div) VIN = VCC = 12V, VOUT = 1.5V Time (20μs/Div) Short Circuit before Power On VOUT (1V/Div) IL (20A/Div) UGATE (20V/Div) LGATE (10V/Div) VIN = VCC = 12V, VOUT = 1.5V Time (1ms/Div) Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS8128A/C-03 March 2016 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT8128A/C Applications Information The RT8128A/C PWM controller provides high efficiency, excellent transient response, and high DC output accuracy needed for CPU core, I/O, and chipset RAM supplies in notebook computers. Richtek Mach Response TM technology is specifically designed for providing 100ns “instant-on” response to load steps while maintaining a relatively constant operating frequency and inductor operating point over a wide range of input voltages. The topology solves the poor load transient response timing problems of fixed frequency current mode PWMs and avoids the problems caused by widely varying switching frequencies in conventional constant on-time and constant off-time PWM schemes. The PSR PWM modulator is specifically designed to have better noise immunity for such a single output application. Supply Voltage and Power-On Reset (POR) The input voltage range for VCC is from 4.5V to 13.2V with respect to GND. An internal linear regulator regulates the supply voltage for internal control logic circuit. A minimum 0.1μF ceramic capacitor is recommended to bypass the supply voltage. Place the bypassing capacitor near the IC. VCC also supplies the integrated MOSFET drivers. A bootstrap diode is embedded to facilitate PCB design and reduce the total BOM cost. No external Schottky diode is required in real applications. The Power-On Reset (POR) circuit monitors the supply voltage at the VCC pin. If VCC exceeds the POR rising threshold voltage (4V typ.), the controller resets and prepares the PWM for operation. If VCC falls below the POR falling threshold during normal operation, all MOSFETs stop switching. The POR rising and falling threshold has a hysteresis (0.12V typ.) to prevent unintentional noise based reset. VIN Detection Once VCC exceeds its Power-On Reset (POR) rising threshold voltage, UGATE will output continuous pulses, and LGATE will be forced low for converter input voltage VIN detection. If the voltage pulses at the PHASE pin are greater than 2V when UGATE is turned off more than 3 cycles, VIN is recognized as ready. Then, the controller will initiate soft-start operation. Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 Internal Soft-Start The RT8128A/C provides an internal soft-start function. The soft-start function is used to prevent large inrush current and output voltage overshoot while the converter is being powered-up. The soft-start function automatically begins once the chip is enabled. An internal current source charges the internal soft-start capacitor such that the internal soft-start voltage ramps up uniformly. The FB voltage will track the internal soft-start voltage during the soft-start interval. Therefore, the PWM pulse width increases gradually to limit the input current. After the internal soft-start voltage exceeds the reference voltage, the FB voltage no longer tracks the soft-start voltage but rather follows the reference voltage. Therefore, the duty cycle of the UGATE signal as well as the input current at power up are limited. Over-Current Protection The RT8128A/C provides lossless over-current protection by detecting the voltage drop across the low-side MOSFET when it is turned on. The over-current threshold is set by an external resistor, ROCSET, at LGATE. During the initial stage when LGATE is turned on, the RT8128A/ C samples and holds the phase voltage. The sample and hold voltage represents the valley inductor current and is compared to the OCP threshold. If the sensed phase voltage is lower than the OCP threshold, OCP will be triggered. When OCP is triggered, LGATE will turn on to prevent inductor current increasing until the OCP condition is released. LGATE Over-Current Setting (LGOCS) Over-current threshold is externally programmed by adding a resistor (ROCSET) between LGATE and GND. Once VCC exceeds the POR threshold, an internal current source IOCSET flows through ROCSET. For maintaining the OCP threshold accuracy while temperature Variation, the current source (IOCSET) has an approximately 6500ppm/ °C temperature slope to compensate the dependency of RDS(ON) of MOSFET. The voltage across ROCSET is stored as the over current protection threshold VOCSET. After that, the current source is switched off. R OCSET can be determined using the following equation : is a registered trademark of Richtek Technology Corporation. DS8128A/C-03 March 2016 RT8128A/C IVALLEY RLGDS(ON) IOCSET where IVALLEY represents the desired inductor OCP trip current (valley inductor current). If ROCSET is not present, there is no current path for IOCSET to build the OCP threshold. In this situation, the OCP threshold is internally preset to 50mV (typ.). VOUT ROCSET = RFB1 FB RFB2 Figure 1. Output Voltage Setting V Pre-OVP Function The RT8128A/C provides pre-OVP function to prevent output over voltage before chip enable. When EN signal is low, the pre-OVP circuit senses the PHASE voltage. Once the PHASE voltage exceeds 0.2V, LGATE will deliver 10% duty pulse to discharge the output voltage for protecting the load. Pre-OVP protection is not latch mode. Once the PHASE voltage is less than 0.2V, LGATE will terminate the discharge pulse immediately. Over-Voltage Protection (OVP) The output voltage is scaled by the divider resistors and fed back to the FB pin. The voltage on the FB pin will be compared to the internal reference voltage VREF for voltage related protection functions, including over-voltage protection and under-voltage protection. If the FB voltage is higher than the OVP threshold during operation, OVP will be triggered. When OVP is triggered, UGATE will go low and LGATE will go high to discharge the output capacitor. Once OVP is triggered, controller will be latched unless VCC POR is detected again. Under-Voltage Protection (UVP) The voltage on the FB pin is monitored for under-voltage protection. Controller begins detecting UVP after soft-start finish. If the FB voltage is lower than the UVP threshold during normal operation, UVP will be triggered. When the UVP is triggered, both UGATE and LGATE will go low and latched. Output Voltage Setting The RT8128A/C allows the output voltage of the DC/DC converter to be adjusted from 0.6V to 5V via an external resistive divider. It will try to maintain the feedback pin at internal reference voltage (0.6V). Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS8128A/C-03 March 2016 VOUT VOUT VFB t tON Figure 2. Output Voltage Waveform According to the resistor divider network above, the output voltage is set as : R V VOUT = VFB 1 FB1 OUT 2 RFB2 Note that the reference voltage at DEM is exceeds than CCM 1%. MOSFET Drivers The RT8128A/C integrates high current gate drivers for the two N-MOSFETs to obtain high efficiency power conversion in synchronous Buck topology. A dead time is used to prevent crossover conduction for the high-side and low-side MOSFETs. Because both gate signals are off during dead time, the inductor current freewheels through the body diode of the low-side MOSFET. The freewheeling current and the forward voltage of the body diode contribute to power loss. The RT8128A/C employs constant dead time control scheme to ensure safe operation without sacrificing efficiency. Furthermore, elaborate logic circuit is implemented to prevent cross conduction. For high output current applications, two or more power MOSFETs are usually paralleled to reduce RDS(ON). The gate driver needs to provide more current to switch on/off these paralleled MOSFETs. Gate driver with lower source/ sink current capability results in longer rising/falling time in gate signals, and therefore higher switching loss. is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT8128A/C The RT8128A/C embeds high current gate drivers to obtain high efficiency power conversion. The embedded drivers contribute to the majority of the power dissipation of the controller. Therefore, SOP-8 (Exposed Pad) package is chosen for its power dissipation rating. If no gate resistor is used, the power dissipation of the controller can be approximately calculated using the following equation : greater than the maximum input voltage to be considered a safe design. The input capacitor is used to supply the input RMS current, which can be approximately calculated using the following equation : PDRIVER = fSW (QG VBOOT The next step is to select a proper capacitor for the RMS current rating. Using more than one capacitor with low Equivalent Series Resistance (ESR) in parallel to form a capacitor bank is a good design. Placing a ceramic capacitor close to the Drain of the high-side MOSFET can also be helpful in reducing the input voltage ripple at heavy load. QG_LOW SIDE VDRIVER_LOW SIDE ) where VBOOT represents the voltage across the bootstrap capacitor and fSW is the switching frequency. It is important to ensure the package can dissipate the switching loss and have enough room for safe operation. Inductor Selection The inductor plays an important role in step-down converters because it stores the energy from the input power rail and then releases the energy to the load. From the viewpoint of efficiency, the DC Resistance (DCR) of the inductor should be as small as possible to minimize the conduction loss. In addition, the inductor covers a significant proportion of the board space, so its size is also important. Low profile inductors can save board space especially when the height has a limitation. However, low DCR and low profile inductors are usually not cost effective. Additionally, larger inductance results in lower ripple current, which translates into the lower power loss. The inductor current rising time increases with inductance value. This means the transient response will be slower. Therefore, the inductor design is a trade-off among performance, size and cost. In general, inductance is chosen such that the ripple current ranges between 20% to 40% of the full load current. The inductance can be calculated using the following equation : VIN VOUT V OUT L(MIN) = fSW k IOUT_Full Load VIN where k is the ratio between inductor ripple current and rated output current. Input Capacitor Selection Voltage rating and current rating are the key parameters when selecting an input capacitor. Conservatively speaking, an input capacitor should have a voltage rating 1.5 times Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 I RMS = IOUT VOUT VIN V 1 OUT V IN Output Capacitor Selection The output filter capacitor must have low enough ESR to meet output ripple and load-transient requirements, yet have high enough ESR to satisfy stability requirements. Also, the capacitance must be high enough to absorb the inductor energy going from a full-load to no-load condition without tripping the OVP circuit. For CPU core voltage converters and other applications where the output is subject to violent load transients, the output capacitor's size depends on how much ESR is needed to prevent the output from dipping too low under a load transient. Ignoring the sag due to finite capacitance : VPP ESR ILOAD(MAX) In non-CPU applications, the output capacitor's size depends on how much ESR is needed to maintain an acceptable level of output voltage ripple : VPP ESR LIR x ILOAD(MAX) where VP−P is the peak-to-peak output voltage ripple. Organic semiconductor capacitor(s) or specialty polymer capacitor(s) are recommended. For low input-to-output voltage differentials (VIN / VOUT < 2), additional output capacitance is required to maintain stability and good efficiency in ultrasonic mode. The amount of overshoot due to stored inductor energy can be calculated as : is a registered trademark of Richtek Technology Corporation. DS8128A/C-03 March 2016 RT8128A/C VSOAR (IPEAK )2 x L 2 x COUT x VOUT where IPEAK is the peak inductor current. Output Capacitor Stability Stability is determined by the value of the ESR zero relative to the switching frequency. The point of instability is given by the following equation : f 1 fESR SW 2 x x ESR x COUT 4 Do not put high value ceramic capacitors directly across the outputs without taking precautions to ensure stability. Large ceramic capacitors can have a high ESR zero frequency and cause erratic, unstable operation. However, it is easy to add enough series resistance by placing the capacitors a couple of inches downstream from the inductor and connecting VOUT or the FB voltage-divider close to the inductor. Unstable operation manifests itself in two related and distinctly different ways : double-pulsing and feedback loop instability. Double-pulsing occurs due to noise on the output or because the ESR is so low that there is not enough voltage ramp in the output voltage signal. This “fools” the error comparator into triggering a new cycle immediately after the 400ns minimum off-time period has expired. Double pulsing is more annoying than harmful, resulting in nothing worse than increased output ripple. However, it may indicate the possible presence of loop instability, which is caused by insufficient ESR. Loop instability can result in oscillations at the output in the form of line or load perturbations, which can trip the over-voltage protection latch or cause the output voltage to fall below the tolerance limit. The easiest method for checking stability is to apply a very fast zero-to-max load transient and carefully observe the output-voltage-ripple envelope for overshoot and ringing. It helps to simultaneously monitor the inductor current with an AC current probe. Do not allow more than one cycle of ringing after the initial step-response under- or over-shoot. Copyright © 2016 Richtek Technology Corporation. All rights reserved. DS8128A/C-03 March 2016 MOSFET Selection The majority of power loss in the step-down power conversion is due to the loss in the power MOSFETs. For low voltage high current applications, the duty cycle of the high-side MOSFET is small. Therefore, the switching loss of the high-side MOSFET is of concern. Power MOSFETs with lower total gate charge are preferred in such kind of application. However, the small duty cycle means the low-side MOSFET is on for most of the switching cycle. Therefore, the conduction loss tends to dominate the total power loss of the converter. To improve the overall efficiency, MOSFETs with low RDS(ON) are preferred in the circuit design. In some cases, more than one MOSFET are connected in parallel to further decrease the on-state resistance. However, this depends on the low-side MOSFET driver capability and the budget. Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For SOP-8 (Exposed Pad) package, the thermal resistance, θJA, is 30.6°C/W on the standard JEDEC 51-7 four-layers thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : PD(MAX) = (125°C − 25°C) / (30.6°C/W) = 3.26W for SOP-8 (Exposed Pad) package is a registered trademark of Richtek Technology Corporation. www.richtek.com 13 RT8128A/C Maximum Power Dissipation (W)1 The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 3 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. Keep the high current loops as short as possible. During high speed switching, the current transition between MOSFETs usually causes di/dt voltage spike due to the parasitic components on PCB trace. Therefore, making the trace length between power MOSFETs and inductors wide and short can reduce the voltage spike and EMI. Make MOSFET gate driver path as short as possible. Since the gate driver uses narrow-width high current pulses to switch on/off power MOSFET, the driver path must be short to reduce the trace inductance. This is especially important for low-side MOSFET, because this can reduce the possibility of shoot-through. Providing enough copper area around power MOSFETs to help heat dissipation. Using thick copper also reduces the trace resistance and inductance to have better performance. The output capacitors should be placed close to the load. This can minimize the trace parasitic components and improve transient response. All small signal components should be located close to the controller. The small signal components include the feedback voltage divider resistors, function setting components and high frequency bypass capacitors. The feedback voltage divider resistor must be placed close to FB pin, because the FB pin is inherently noisesensitive. Voltage feedback path must be away from switching nodes. The noisy switching node is, for example, the interconnection among high-side MOSFET, low-side MOSFET and inductor. Feedback path must be away from this kind of noisy node to avoid noise pick-up. A multi layer PCB design is recommended. Make use of one single layer as the ground and have separate layers for power rail or signal is suitable for PCB design. 3.6 Four-Layer PCB 3.0 2.4 1.8 1.2 0.6 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 3. Derating Curve of Maximum Power Dissipation Layout Considerations PCB layout is critical to high current high-frequency switching converter designs. A good layout can help the controller to function properly and achieve expected performance. On the other hand, PCB without a careful layout can radiate excessive noise, having more power loss and even malfunction in the controller. In order to avoid the above condition, the general guidelines can be followed in PCB layout. Power stage components should be placed first. Place the input bulk capacitors close to the high-side power MOSFETs, and then locate the output inductor and finally the output capacitors. Placing the ceramic capacitor close to the Drain of the high-side MOSFET. This can reduce the input voltage drop when high-side MOSFET is turned on. If more than one MOSFET is paralleled, each should have its own individual ceramic capacitor. Copyright © 2016 Richtek Technology Corporation. All rights reserved. www.richtek.com 14 is a registered trademark of Richtek Technology Corporation. DS8128A/C-03 March 2016 RT8128A/C Outline Dimension H A M EXPOSED THERMAL PAD (Bottom of Package) Y J X B F C I D Dimensions In Millimeters Symbol Dimensions In Inches Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.791 6.200 0.228 0.244 M 0.406 1.270 0.016 0.050 X 2.000 2.300 0.079 0.091 Y 2.000 2.300 0.079 0.091 X 2.100 2.500 0.083 0.098 Y 3.000 3.500 0.118 0.138 Option 1 Option 2 8-Lead SOP (Exposed Pad) Plastic Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. DS8128A/C-03 March 2016 www.richtek.com 15