DS9203A 12

RT9203/A
Dual Regulators - Synchronous Buck PWM DC-DC and
Linear Controller
General Description
Features
The RT9203/A is a dual-output power controllers designed
for high performance graphics cards and personal
computers. The IC integrates a synchronous buck
controller, a linear controller and protection functions into
a small 8-pin package.
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The RT9203/A uses an internal compensated voltage
mode PWM control for simplying design. An internal 0.8V
reference allows the output voltage to be precisely
regulated to meet low output voltage requirement. A fixed
300kHz oscillation frequency reduces the component size
for saving board area.
The RT9203/A also features over voltage protection
(OVP) and under voltage lock-out (UVLO).
Ordering Information
RT9203/A
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Operates at 5V
0.8V Internal Reference
Drives Two N-MOSFET
Voltage Mode PWM Control
Fast Transient Response
Fixed 300kHz Oscillator Frequency
Dynamic 0 to 100% Duty Cycle
Internal PWM Loop Compensation
Internal Soft-Start
Adaptive Non-Overlapping Gate Driver
Over-Voltage Protection Uses Lower MOSFET
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RoHS Compliant and 100% Lead (Pb)-Free
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Applications
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Package Type
S : SOP-8
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
UVP : Hiccup Mode
UVP : Latch Mode
Note :
Richtek products are :
`
RoHS compliant and compatible with the current require-
`
Suitable for use in SnPb or Pb-free soldering processes.
ments of IPC/JEDEC J-STD-020.
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PC Motherboard
Cable Modems, Set-Top-Box, and DSL Modems
DSP and Core Communications Processor Supplies
Memory Power Supplies
Personal Computer Peripherals
Industrial Power Supplies
5V Input DC-DC Regulators
Low Voltage Distributed Power Supplies
Graphic Cards
Pin Configurations
(TOP VIEW)
BOOT
8
FB
UGATE
2
7
FBL
GND
3
6
DRV
LGATE
4
5
VCC
SOP-8
DS9203/A-12 April 2011
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1
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2
470uF
GND
3
FB
LGATE
UGATE
BOOT
RT9203/A
FBL
PHASE
VCC
1uF
8
4
2
1
200
10nF
Phase
1uF
1uH
Be Careful during
Layout
VOUT1 = 0.8V*(1+R3/R4)
D2 5
4 G2
200
D1 7
D2 6
2 G1
3 S2
Phase
PHKD6N02LT
0.1uF
8
1
D1
S1
1N5819
5V
5uH
680uF
1uF
680uF LESR
1.6V
VOUT1
Pull FB trace out after
COUT
680uF LESR
+
1uF
120
<1K
0.8V 7
6
5
5V
+
10nF
390
100uF
+
3.4V
VOUT2 = 0.8V*(1+R1/R2)
VOUT2
2SD1802
5V
RT9203/A
Typical Application Circuit
+
+
Figure 1. RT9203/A powered from 5V
DS9203/A-12 April 2011
DS9203/A-12 April 2011
330uF
120
<1K
0.8V 7
3
GND
FB
LGATE
RT9203/A
FBL
UGATE
1
BOOT
10
8
4
2
200
0.1uF
S1
4 G2
2 G1
3 S2
1
Phas
e
10nF
200
8
Phas
e
470uF
VOUT1 = 0.8V*(1+R3/R4)
D2 5
D1 7
D2 6
D1
Be Careful during
Layout
470uF
5uH
1uF
1uH
1uF
5V
1.6V
VOUT1
Pull FB trace out after
COUT
510uF
4V OSCON
14mOhm
+
10nF
255
VCC
5
PHASE
0
12V
+
1uF
6
1uF
Suggest use Transistor
100uF
+
+
2.5V
VOUT2 = 0.8V*(1+R1/R2)
VOUT2
2SD5706
3.3V
5V
RT9203/A
+
+
Figure 2. RT9203/A powered from 12V
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3
RT9203/A
+
MU
COUT
1000uF
D
G
S
GND
CVCC
1uF
CBOOT
C2
470uF
ML
BOOT
VCC
C1
1uF
+
L
5uH
D
0.1uF
RT9203/A
G
S
GND Return
Layout Placement
Layout Notes
1. Put C1 & C2 to be near the MU drain and ML source nodes.
2. Put RT9203/A to be near the COUT
3. Put CBOOT as close as to BOOT pin
4. Put CVCC as close as to VCC pin
Function Block Diagram
6.0V
Regulation
VCC
Power on
Reset
VCC
+
+
DRV
BOOT
LDO
-
FBL
Soft Start
0.8
Reference
-
UVP
+
1V -
OVP
UGATE
+
0.5V +UVP
0.8V
FB
Error
+
-
SS
Error
Amplifier
Control
Logic
+
+PWM
-
VCC
LGATE
GND
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4
300kHz
Oscillator
DS9203/A-12 April 2011
RT9203/A
Functional Pin Description
BOOT (Pin 1)
FB (Pin 8)
This pin provides ground referenced bias voltage to the
upper MOSFET driver. A bootstrap circuit is used to create
a voltage that is suitable for driving a logic-level N-MOSFET
when operating at a single 5V power supply. This pin also
could be powered from ATX 12V, in this situation, an internal
6.0V regulator will supply to VCC pin for generating bias
required inside the IC.
This pin is connected to the PWM converter's output-divider
for regulating and monitoring the output voltage of buck
converter. This pin also connects to the protection monitor
and the inverting input of internal PWM error amplifier inside
the IC.
UGATE (Pin 2)
Connect the UGATE pin to the gate of upper MOSFET.
This pin provides the gate drive for the upper MOSFET.
GND (Pin 3)
Signal and power ground for the IC. All voltage levels are
measured with respect to this pin.
LGATE (Pin 4)
Connect the LGATE pin to the gate of lower MOSFET.
This pin provides the gate drive for the lower MOSFET.
VCC (Pin 5)
This is the main bias supply for the RT9203/A. This pin
also provides the gate bias charge for the gate of lower
MOSFET. The voltage at this pin is monitored for ensuring
a proper power-on reset (POR). This pin is also the out
of an internal 6.0V regulator that powered from the BOOT
pin when the BOOT pin is directly powered from ATX
12V.
DRV (Pin 6)
This pin is the output of a linear controller. It should be
connected to the base of an external bypass NPN
transistor or the gate of a N-MOSFET to form a linear low
dropout regulator.
FBL (Pin 7)
This pin is connected to the output resistor-divider of an
external power transistor or a N-MOSFET based low
dropout regulator for regulating and monitoring the output
voltage. This pin is also connected to the protection
monitor and the invertering input of error amplifier of
internal linear regulator inside the IC.
DS9203/A-12 April 2011
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5
RT9203/A
Absolute Maximum Ratings
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Supply Voltage VCC -------------------------------------------------------------------------------------------------- 7V
BOOT & UGATE to GND --------------------------------------------------------------------------------------------- 19V
Input, Output or I/O Voltage ----------------------------------------------------------------------------------------- GND-0.3V to 7V
Power Dissipation, PD @ TA = 25°C
SOP-8 -------------------------------------------------------------------------------------------------------------------- 0.625W
Package Thermal Resistance
SOP-8, θJA -------------------------------------------------------------------------------------------------------------- 160° C/W
Ambient Temperature Range ---------------------------------------------------------------------------------------- 0°C to +70°C
Junction Temperature Range ---------------------------------------------------------------------------------------- −40°C to +125°C
Storage Temperature Range ---------------------------------------------------------------------------------------- −65°C to +150°C
Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------- 260°C
CAUTION:
Stresses beyond the ratings specified in “ Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress only rating and operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied.
Electrical Characteristics
(VCC = 5V, TA = 25°C, Unless otherwise specified.)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
--
3
--
mA
5.0
6.0
7.0
V
3.8
4.1
4.4
V
--
0.5
--
V
0.784
0.8
0.816
V
250
300
350
kHz
--
1.75
--
VP-P
32
35
38
dB
VCC Supply Current
Nominal Supply Current
ICC
UGATE, LGATE open
VCC Regulated Voltage
Power-On Reset
V CC
VBOOT = 12V
Rising VCC Threshold
VCC Threshold Hysteresis
Reference
Reference Voltage
V FB
Both PWM and linear regulator
Oscillator
Free Running Frequency
Ramp Amplitude
ΔVOSC
PWM Error Amplifier
DC gain
PWM Controller Gate Driver
Upper Drive Source
RUGATE
BOOT = 12V
BOOT − VUGATE = 1V
--
7.5
11
Ω
Upper Drive Sink
RUGATE
VUGATE = 1V
--
5
8
Ω
Lower Drive Source
RLGATE
VCC − VLGATE = 1V
--
3.5
6
Ω
Lower Drive Sink
Linear Regulator
RLGATE
VLGATE = 1V
--
2
5
Ω
100
--
--
mA
DRV Driver Source
VDRV = 2V
To be continued
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DS9203/A-12 April 2011
RT9203/A
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
0.9
1
--
V
--
0.5
0.65
V
--
2.5
--
ms
Protection
FB Over-Voltage Trip
FB Rising
FB & FBL Under-Voltage Trip
FB & FBL Falling
Soft-Start Interval
DS9203/A-12 April 2011
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RT9203/A
Typical Operating Characteristics
Dead Time
Dead Time
VCC = 5V
VCC = 5V
UGATE
UGATE
LGATE
LGATE
Time (50ns/Div)
Time (50ns/Div)
Power On
Power On
VCC = 5V
VOUT1 = 2.5V
VOUT2 = 1.8V
VCC
VCC = 5V
VOUT1 = 2.5V
VOUT2 = 1.8V
VCC
VOUT1
VOUT1
VOUT2
VOUT2
Time (2.5ms/Div)
Time (50ms/Div)
Load Transient
Load Transient
UGATE
UGATE
VCC = 5V
VOUT = 2.2V
COUT = 3000uF
VOUT
VCC = 5V
VOUT = 2.2V
COUT = 3000uF
Time (5us/Div)
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8
VOUT
Time (5us/Div)
DS9203/A-12 April 2011
RT9203/A
Short Hiccup (Latch Mode)
Short Hiccup
VCC = 5V
VOUT = 2.2V
VCC = 5V
VOUT = 2.2V
VOUT
VOUT
UGATE
UGATE
RT9203
RT9203A
Time (2ms/Div)
Time (2ms/Div)
Reference vs. Temperature
Bootstrap Wave Form
0.803
VCC = 5V, VOUT = 2.2V
0.802
0.801
Reference (V)
UGATE
LGATE
PHASE
0.800
0.799
0.798
0.797
0.796
-50
Time (1us/Div)
0
50
100
150
Temperature (°C)
POR (Rising/Falling) vs. Temperature
4.3
50
4.2
45
4.1
POR (V)
I OCSET (uA)1
IOCSET vs. Temperature
55
40
35
4.0
3.9
30
3.8
25
3.7
20
Rising
Falling
3.6
-40
-10
20
50
80
Temperature (°C)
DS9203/A-12 April 2011
110
140
-50
0
50
100
150
Temperature (°C)
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RT9203/A
Oscillator Frequency vs. Temperature
315
Frequency (kHz) A
310
305
300
295
290
285
280
275
270
-50
0
50
100
150
Temperature (°C)
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DS9203/A-12 April 2011
RT9203/A
Application Information
R
BOOT
6.0V
Regulation
VCC
C
1uF
10
12V
5V
+
The RT9203/A operates at either single 5V power supply
with a bootstrap UGATE driver or a 5V/12V dual-power
supply form the ATX SMPS. The dual- power supply is
recommended for high current applications, the RT9203/
A can deliver higher gate driving current while operating
with ATX SMPS based on a dual-power supply.
UGATE
VCC
The Bootstrap Operation
LGATE
In a single power supply system, the UGATE driver of
RT9203/A is powered by an external bootstrap circuit, as
shown in the Figure 3. The boot capacitor, C BOOT,
generates a floating reference at the PHASE pin. Typically
a 0.1μF CBOOT is enough for most of MOSFETs used
with the RT9203/A. The voltage drop between BOOT and
PHASE is refreshed to a voltage of VCC - diode drop
(VD) while the lower MOSFET turning on.
R1
VCC
UGATE
D1
5V
0.1uF
+
C2
1uF
BOOT
C2
1uF
RT9203/A
Figure 4. Dual Power Supply Operation
Power On Reset
The Power-On Reset (POR) monitors the supply voltage
(normal +5V) at the VCC pin and the input voltage at the
OCSET pin. The VCC POR level is set to 4.1V with 0.5V
hysteresis and the normal level at OCSET pin is set to
1.5V (see over-current protection). The POR function
initiates soft-start operation after all supply voltages
exceed their POR thresholds.
PHASE
Soft Start
VCC
LGATE
RT9203/A
Figure 3. Single 5V power Supply Operation
Dual Power Operation
The RT9203/A was designed to supply a regulated 6.0V
at VCC pin automatically when BOOT pin is powered by
a 12V. In a system with ATX 5V/12V power supply, the
RT9203/A is ideal for higher current applications due to
the higher gate driving capability, VUGATE = 12V and VLGATE
= 6.0V. A RC (10Ω/1μF) filter is also recommended at
BOOT pin to prevent the ringing induced from fast poweron, as shown in Figure 4.
DS9203/A-12 April 2011
A built-in soft-start is used to prevent surge current from
power supply input during powering on. The soft-start
voltage is controlled by an internal digital counter. It slows
down and clamps the ramping of reference voltage at the
input of error amplifier and the pulse-width of the output
driver. The typical soft-start duration is 2.5ms.
Under Voltage and Over Voltage Protection
The voltage presents at FB pin is monitored and protected
against OC (over current), UV (under voltage), and OV
(over voltage). The UV threshold is 0.5V and OV threshold
is 1.0V. Both UV and OV detection are with 30ms delay
after triggered. When OC or UV trigged, a hiccup re-start
sequence will be initialized, as shown in Figure 5. For
RT9203, Only 3 times of trigger are allowed before
latching off. But for RT9203A, UVP will be kept in hiccup
mode. Hiccup is disabled during soft-start interval.
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11
RT9203/A
COUNT = 2
L
Q
COUNT = 3
4V
SS
Internal
COUNT = 1
VI
2V
D
R
C
VO
0V
INDUCTOR CURRENT
OVERLOAD
C.C.M
APPLIED
TS
0A
TON
T0 T1
VI - VO
T3
T2
TIME
TOFF
VL
Figure 5
- VO
Inductor Selection
uQ
iL
The RT9203/A was designed for VIN = 5V, step-down
application mainly. Figure 6 shows the typical topology
and waveforms of step-down converter.
IL = I O
mIL
The ripple current of inductor can be calculated as follows:
ILRIPPLE =
(5V - VOUT)
iQ
× TON
L
IQ
Because operation frequency is fixed at 300kHz,
TON = 3.33 ×
VOUT
iD
5V
ID
The VOUT ripple is
VOUT
RIPPLE = ILRIPPLE × ESR
Figure 6
ESR is the equivalent series resistor of output capacitor
Table 1 shows the ripple voltage of VOUT at VIN = 5V
Table 1
VOUT
Inductor
3.3V
2.5V
1.5V
2μH
5μH
2μH
5μH
2μH
5μH
1000μF (ESR=53mΩ)
100mV
40mV
110mV
44mV
93mV
37mV
1500μF (ESR=33mΩ)
62mV
25mV
68mV
28mV
58mV
23mV
3000μF (ESR=21mΩ)
40mV
16mV
43mV
18mV
37mV
15mV
*Refer to Sanyo low ESR series (CE, DX, PX......)
The suggested L and C are as follows:
2μH with ≥ 1500μF COUT
5μH with ≥ 1000μF COUT
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DS9203/A-12 April 2011
RT9203/A
Input / Output Capacitor
High frequency/long life decoupling capacitors should be
placed as close to the power pins of the load as physically
possible. Be careful not to add inductance to the PCB
trace, as it could eliminate the performance from utilizing
these low inductance components. Consult with the
manufacturer of the load on specific decoupling
requirements.
Max. 6V
VOUT2 < 3.3V
6V
The output amplitude of ramp oscillator is 1.6V, the loop
gain and loop pole/zero are calculated as follows:
+
VCC = 5V
×
1.75
LC filter pole PO =
0.8
VOUT
1
2π LC
Error Amp pole PA = 300kHz
ESR zero ZO =
1
2π ESR × C
The RT9203/A Bode plot is as shown in Figure 9. It is
stable in most of application conditions.
VOUT = 3.3V
COUT = 1500μF(33mΩ)
L = 2μH
40
30
R4<1K
5
DC loop gain GA = 35dB ×
R3
R4
R4<1K
The RT9203/A is a voltage mode buck controller designed
for 5V step-down applications. The gain of error amplifier
is fixed at 35dB for simplifying design.
VOUT2 < 2.5V
VCC
R4
VCC
PWM Loop Stability
Suggest Low
VT MOSFET
FBL
FBL
Figure 8
The linear controller of RT9203/A was designed to drive an
external bipolar NPN transistor or a MOSFET. For a
MOSFET, normally DRV need to provide minimum
VOUT2+VT+gate-drive voltage to keep VOUT2 as the set
voltage. When driving MOSFET operating at a 5V power
supply, the gate-drive will be limited at 5V. At this situation,
as shown in Figure 7, a MOSFET with low VT threshold
(VT = 1V) and set Vout2 below 2.5V are suggested. In
VBOOT = 12V operation condition, as Figure 8. shown, VCC
is regulated higher than 6V, which providing higher gatedrive capability for driving the MOSFET, VOUT2 can be set
as VOUT2 ≤ 3.3V.
BOOT
R3
BOOT
RT9203/A
Linear Regulator Driver
DRV
+
DRV
VBOOT = 12V
The output capacitors are necessary for filtering output
and stabilizing the close loop (see the PWM loop stability).
For powering advanced high-speed processors, it is
required to meet fast load transient requirement. Also high
ESR usually induces ripple that may trigger UV or OV
protections. So High frequency capacitors with low ESR/
ESL capacitors are recommended here.
Max. 5V
Suggest Low
VT MOSFET
VOUT = 1.5V
PO = 2.9kHz
VOUT = 2.5V
ZO = 3.2kHz
VOUT = 3.3V
20
Loop
Gain
RT9203/A
10
Figure 7
100
1k
10k
100k
1M
Figure 9
DS9203/A-12 April 2011
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13
RT9203/A
Reference Voltage
VIN
L
VOUT
+
Because RT9203/A uses a low 35dB gain error amplifier,
as shown in Figure 10. The voltage regulation is
dependent on VIN and VOUT settings. The FB reference
voltage of 0.8V were trimmed at VIN = 5V and VOUT =
2.5V. In a fixed VIN = 5V application, the FB reference
voltage vs. VOUT voltage can be calculated as Figure 11.
COUT
C1
R1
RT9203/A
FB
VOUT = VFB × (1+
R1
)
R2
<1K
R2
R1
Figure 12
FB
+
R1
-
1K
56K
EA
+
REP
0.8V
+
PWM Layout Considerations
-
MOSFETs switch very fast in efficiency. The speed with
which the current transitions from one device to another
causes voltage spikes across the interconnecting
impedances and parasitic circuit elements. The voltage
spikes can degrade efficiency and radiate noise, that
results in over-voltage stress on devices. Careful the
layout for component placement and printed circuit design
can minimize the voltage spikes induced in the converter.
Consider, as an example, the turn-off transition of the
upper MOSFET prior to turn-off, the upper MOSFET was
carrying the full load current. During turn-off, current stops
flowing in the upper MOSFET and is picked up by the
lower MOSFET or Schottky diode. Any inductance in the
switched current path generates a large voltage spike
during the switching interval. Care with component
selections, layout of the critical components, and use
shorter and wider PCB traces that help in minimizing the
magnitude of voltage spikes.
PWM
RAMP
1.75V
Figure 10
0.82
FB (V)
0.81
0.80
0.79
0.78
10
20
30
40
50
60
Duty (%)
70
80
90
Figure 11
Feedback Divider
The reference of RT9203/A is 0.8V. The output voltage can
be set using a resistor-divider as shown in Figure 12. Put
the R1 and R2 as close as possible to FB pin. R2 value
should be less than 1 kΩ to avoid noise coupling issue.
The C1 capacitor is a speed-up capacitor for reducing output
ripple to meet with the requirement of fast transient load.
Typically a 1nF ~ 0.1μF is enough for C1.
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14
There are two sets of critical components in a DC-DC
converter using the RT9203/A. The switching power
components are most critical because they switch large
amounts of energy, and as such, they tend to generate
equally large amounts of noise. The critical small signal
components are those connected to sensitive nodes or
those supplying critical bypass current.
The power components and the PWM controller should
be placed firstly. Place the input capacitors, especially the
high-frequency ceramic decoupling capacitors, close to
the power switches. Place the output inductor and output
capacitors between the MOSFETs and the load. Also
locate the PWM controller near by MOSFETs.
DS9203/A-12 April 2011
RT9203/A
A multi-layer printed circuit board is recommended. Figure
13 shows the connections of the critical components in
the converter. Note that the capacitors CIN and COUT
represent numerous physical capacitors. Use a dedicated
grounding plane and use vias to ground all critical
components to this layer. Apply another solid layer as a
power plane and cut this plane into smaller islands of
common voltage levels. The power plane should support
the input power and output power nodes. Use copper filled
polygons on the top and bottom circuit layers for the
PHASE node, but it is not necessary to oversize this
particular island. Since the PHASE node is subjected to
very high dV/dt voltages, the stray capacitance formed
between these islands and the surrounding circuitry will
tend to couple switching noise. Use the remaining printed
circuit layers for small signal routing. The PCB traces
between the PWM controller and the gate of MOSFET
and also the traces connecting source of MOSFETs
should be sized to carry 2A peak currents.
IQ1
IL
VOUT
5V
IQ2
+
+
+
Q1
LOAD
Q2
GND
GND
LGATE VCC
RT9203/A
FB
UGATE
Figure 13
DS9203/A-12 April 2011
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15
RT9203/A
Outline Dimension
H
A
M
J
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.050
0.254
0.002
0.010
J
5.791
6.200
0.228
0.244
M
0.400
1.270
0.016
0.050
8-Lead SOP Plastic Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: [email protected]
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design,
specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed
by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
www.richtek.com
16
DS9203/A-12 April 2011
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