PDF Data Sheet Rev. L

High Precision, Wideband
RMS-to-DC Converter
AD637
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
BUFF IN
+
BUFF OUT
–
25kΩ
VIN
SQUARER/
DIVIDER
ABSOLUTE
VALUE
RMS OUT
–
+
DEN
INPUT
25kΩ
–
CAV
+
OUTPUT
OFFSET
dB OUTPUT
BIAS
COMMON
CS
00788-001
High accuracy
0.02% maximum nonlinearity, 0 V to 2 V rms input
0.1% additional error to crest factor of 3
Wide bandwidth
8 MHz at 2 V rms input
600 kHz at 100 mV rms
Computes
True rms
Square
Mean square
Absolute value
dB output (60 dB range)
Chip select/power-down feature allows
Analog three-state operation
Quiescent current reduction from 2.2 mA to 350 µA
Figure 1.
GENERAL DESCRIPTION
The AD637 is a complete, high accuracy, rms-to-dc converter
that computes the true rms value of any complex waveform. It
offers performance that is unprecedented in integrated circuit
rms-to-dc converters and comparable to discrete and modular
techniques in accuracy, bandwidth, and dynamic range. The
AD637 computes the true root mean square, mean square, or
absolute value of any complex ac (or ac plus dc) input waveform
and gives an equivalent dc output voltage. The true rms value of
a waveform is more useful than an average rectified signal
because it relates directly to the power of the signal. The rms
value of a statistical signal relates to the standard deviation of
the signal.
Superior crest factor compensation permits measurements
of signals with crest factors of up to 10 with less than 1%
additional error. The wide bandwidth of the AD637 permits the
measurement of signals up to 600 kHz with inputs of 200 mV rms
and up to 8 MHz when the input levels are above 1 V rms.
Direct dB value of the rms output with a range of 60 dB is
available on a separate pin. An externally programmed
reference current allows the user to select the 0 dB reference
voltage to correspond to any level between 0.1 V and 2.0 V rms.
A chip select connection on the AD637 permits the user to
decrease the supply current from 2.2 mA to 350 µA during
periods when the rms function is not in use. This feature
Rev. L
facilitates the addition of precision rms measurement to remote
or handheld applications where minimum power consumption
is critical. In addition, when the AD637 is powered down, the
output goes to a high impedance state. This allows several
AD637s to be tied together to form a wideband true rms
multiplexer.
The input circuitry of the AD637 is protected from overload
voltages in excess of the supply levels. The inputs are not
damaged by input signals if the supply voltages are lost.
The AD637 is laser wafer trimmed to achieve rated performance
without external trimming. The only external component
required is a capacitor that sets the averaging period. The value
of this capacitor also determines low frequency accuracy, ripple
level, and settling time.
The on-chip buffer amplifier is used either as an input buffer or
in an active filter configuration. The filter can be used to reduce
the amount of ac ripple, thereby increasing accuracy.
The AD637 is available in accuracy Grade J and Grade K for
commercial temperature range (0°C to 70°C) applications, accuracy
Grade A and Grade B for industrial range (−40°C to +85°C) applications, and accuracy Grade S rated over the −55°C to +125°C
temperature range. All versions are available in hermetically sealed,
14-lead SBDIP, 14-lead CERDIP, and 16-lead SOIC_W packages.
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AD637
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Offset Trim .............................................................................. 14
Functional Block Diagram .............................................................. 1
Scale Factor Trim ................................................................... 14
General Description ......................................................................... 1
Choosing the Averaging Time Constant ................................. 14
Revision History ............................................................................... 3
Frequency Response .................................................................. 16
Specifications..................................................................................... 4
AC Measurement Accuracy and Crest Factor ........................ 17
Absolute Maximum Ratings .......................................................... 10
Connection for dB Output ........................................................ 17
ESD Caution ................................................................................ 10
dB Calibration ............................................................................. 18
Pin Configurations and Function Descriptions ......................... 11
Low Frequency Measurements ................................................. 19
Theory of Operation ...................................................................... 12
Vector Summation ..................................................................... 19
Applications Information .............................................................. 13
Evaluation Board ............................................................................ 21
Standard Connection ................................................................. 13
Outline Dimensions ....................................................................... 24
Chip Select ................................................................................... 13
Ordering Guide .......................................................................... 25
Optional Trims for High Accuracy .......................................... 13
Rev. L | Page 2 of 25
Data Sheet
AD637
REVISION HISTORY
4/15—Rev. K to Rev. L
10/06—Rev. H to Rev. I
Changes to Features Section, Figure 1, and General Description
Section ................................................................................................ 1
Changes to Table 1 ............................................................................ 4
Added Table 2; Renumbered Sequentially ..................................... 6
Added Table 3 .................................................................................... 8
Changed Pin NC to Pin NIC (Throughout) ................................11
Changes to Theory of Operation Section and Figure 4 .............12
Changes to Figure 5.........................................................................13
Changes to Optional Trims for High Accuracy Section and
Figure 8; Added Offset Trim Section and Scale Factor Trim
Section...............................................................................................14
Changes to Choosing the Averaging Time Constant and
Figure 11 ...........................................................................................15
Changes to Figure 20 ......................................................................19
Changes to Figure 21 ......................................................................20
Changes to Ordering Guide ...........................................................26
Changes to Table 1 ............................................................................ 3
Changes to Figure 4 .......................................................................... 7
Changes to Figure 7 .......................................................................... 9
Changes to Figure 16, Figure 18, and Figure 19 .......................... 12
Changes to Figure 20 ...................................................................... 13
12/05—Rev. G to Rev. H
Updated Format ................................................................. Universal
Changes to Figure 1 .......................................................................... 1
Changes to Figure 11 ...................................................................... 10
Updated Outline Dimensions........................................................ 16
Changes to Ordering Guide ........................................................... 17
4/05—Rev. F to Rev. G
Changes to Figure 15 ......................................................................11
Changes to Figure 16 ......................................................................12
Changes to Evaluation Board Section and Figure 23 .................16
Added Figure 24; Renumbered Sequentially ...............................17
Changes to Figure 25 Through Figure 29 ....................................17
Changes to Figure 30 ......................................................................18
Added Figure 31 ..............................................................................18
Deleted Table 6; Renumbered Sequentially .................................18
Changes to Ordering Guide ...........................................................20
Updated Format ................................................................. Universal
Changes to Figure 1 .......................................................................... 1
Changes to General Description ..................................................... 1
Deleted Product Highlights ............................................................. 1
Moved Figure 4 to Page .................................................................... 8
Changes to Figure 5 .......................................................................... 9
Changes to Figure 8 ........................................................................ 10
Changes to Figure 11, Figure 12, Figure 13, and Figure 14 ....... 11
Changes to Figure 19 ...................................................................... 14
Changes to Figure 20 ...................................................................... 14
Changes to Figure 21 ...................................................................... 16
Updated Outline Dimensions........................................................ 17
Changes to Ordering Guide ........................................................... 18
4/07—Rev. I to Rev. J
3/02—Rev. E to Rev. F
Added Evaluation Board Section ..................................................16
Updated Outline Dimensions ........................................................20
Edits to Ordering Guide ................................................................... 3
2/11—Rev. J to Rev. K
Rev. L | Page 3 of 25
AD637
Data Sheet
SPECIFICATIONS
At 25°C, test frequency = 1 kHz, VIN units are VRMS, VS = ±15 V dc, unless otherwise noted.
Table 1.
Parameter
TRANSFER FUNCTION
CONVERSION ACCURACY
Total Error, Internal Trim
TMIN to TMAX
vs. Supply
DC Reversal
Nonlinearity
Total Error
ERROR VS. CREST FACTOR (CF)
AVERAGING TIME CONSTANT
INPUT CHARACTERISTICS
Signal Range
Input Resistance
Input Offset Voltage
FREQUENCY RESPONSE
Bandwidth for 1% (0.09 dB) Additional Error
Test Conditions/Comments
Min
AD637J/AD637A
Typ
Max
VOUT = avg  (VIN )
See Figure 5
VIN = 300 mV
VIN = −300 mV
−2 V < VIN < +2 V
2 V full scale
7 V full scale
External trim
Additional, at 1 V rms
For CF = 1 to 2
For CF = 3
For CF = 10
30
100
±1 ± 0.5
±3.0 ± 0.6
150
300
0.25
0.04
0.05
±0.5 ± 0.1
Specified accuracy
±0.1
±1.0
25
VS = ±15 V
Continuous
Transient
VS = ±5 V
Continuous
Transient
0 to 7
8
mV rms ±% of reading
mV ± % of reading
μV/V
μV/V
% of reading
% of FSR
% of FSR
mV ± % of reading
CF, %
% of reading
% of reading
ms/μF CAV
±15
V rms
V p-p
±6
9.6
±0.5
V rms
V p-p
kΩ
mV
0 to 4
6.4
Unit
2
VIN = 20 mV
VIN = 200 mV
VIN = 2 V
11
66
200
kHz
kHz
kHz
VIN = 20 mV
VIN = 200 mV
VIN = 2 V
150
1
8
kHz
MHz
MHz
vs. temperature
±0.05
13.5
2.2
±3 dB
OUTPUT CHARACTERISTICS
Offset Voltage
Voltage Swing, 2 kΩ load
0 to 12.0
0 to 2
6
VS = ±3 V
Output Current
Short-Circuit Current
Resistance
Resistance
20
0.5
100
CS high
CS low
Rev. L | Page 4 of 25
±1
±0.089
mV
mV/°C
V
V
mA
mA
Ω
kΩ
Data Sheet
Parameter
dB OUTPUT
Error
Scale Factor
Scale Factor Tempco
IREF for 0 dB = 1 V rms
IREF Range
BUFFER AMPLIFIER
Input Output Voltage Range
Input Offset Voltage
Input Current
Input Resistance
Output Current
Short-Circuit Current
Small Signal Bandwidth
Slew Rate
DENOMINATOR INPUT
Input Range
Input Resistance
Offset Voltage
CHIP SELECT (CS)
RMS On Level
RMS Off Level
IOUT of Chip Select
AD637
Test Conditions/Comments
Min
VIN = 7 mV to 7 V rms, 0 dBV
5
1
2 kΩ load, to −VS
AD637J/AD637A
Typ
Max
±0.5
−3
+0.33
−0.033
20
80
100
−VS to (+VS − 2.5)
±0.8
±2
±2
±10
108
−0.13
+5
20
1
5
20
0 to 10
25
±0.2
30
±0.5
Open or 2.4 < VC < +VS
VC < 0.2
VC < 0.2
CS low
CS high
10
0
10 + ((25 kΩ) × CAV)
10 + ((25 kΩ) × CAV)
On Time Constant
Off Time Constant
POWER SUPPLY
Operating Voltage Range
Quiescent Current
Standby Current
±3.0
2.2
350
Rev. L | Page 5 of 25
±18
3
450
Unit
dBV
mV/dB
% of reading/°C
dB/°C
µA
µA
V
mV
nA
Ω
mA
mA
MHz
V/µs
V
kΩ
mV
V
V
µA
µA
µs
µs
V
mA
µA
AD637
Data Sheet
Table 2.
Parameter
TRANSFER FUNCTION
CONVERSION ACCURACY
Total Error, Internal Trim
TMIN to TMAX
vs. Supply
DC Reversal
Nonlinearity
Total Error
ERROR VS. CREST FACTOR (CF)
AVERAGING TIME CONSTANT
INPUT CHARACTERISTICS
Signal Range
Input Resistance
Input Offset Voltage
FREQUENCY RESPONSE
Bandwidth for 1% (0.09 dB) Additional Error
Test Conditions/Comments
Min
AD637K/AD637B
Typ
Max
VOUT = avg  (VIN )
See Figure 5
VIN = 300 mV
VIN = −300 mV
−2 V < VIN < +2 V
2 V full scale
7 V full scale
External trim
Additional, at 1 V rms
For CF = 1 to 2
For CF = 3
For CF = 10
30
100
±0.5 ± 0.2
±2.0 ± 0.3
150
300
0.1
0.02
0.05
±0.25 ± 0.05
Specified accuracy
±0.1
±1.0
25
VS = ±15 V
Continuous
Transient
VS = ±5 V
Continuous
Transient
0 to 7
8
mV rms ±% of reading
mV ± % of reading
μV/V
μV/V
% of reading
% of FSR
% of FSR
mV ± % of reading
CF, %
% of reading
% of reading
ms/μF CAV
±15
V rms
V p-p
±6
9.6
±0.2
V rms
V p-p
kΩ
mV
0 to 4
6.4
Unit
2
VIN = 20 mV
VIN = 200 mV
VIN = 2 V
11
66
200
kHz
kHz
kHz
VIN = 20 mV
VIN = 200 mV
VIN = 2 V
150
1
8
kHz
MHz
MHz
vs. temperature
±0.04
13.5
2.2
±3 dB
OUTPUT CHARACTERISTICS
Offset Voltage
Voltage Swing, 2 kΩ load
0 to 12.0
0 to 2
6
VS = ±3 V
Output Current
Short-Circuit Current
Resistance
Resistance
dB OUTPUT
Error
Scale Factor
Scale Factor Tempco
±0.5
±0.056
20
0.5
100
CS high
CS low
VIN = 7 mV to 7 V rms, 0 dBV
IREF for 0 dB = 1 V rms
IREF Range
5
1
Rev. L | Page 6 of 25
±0.3
−3
+0.33
−0.033
20
80
100
mV
mV/°C
V
V
mA
mA
Ω
kΩ
dBV
mV/dB
% of reading/°C
dB/°C
μA
μA
Data Sheet
Parameter
BUFFER AMPLIFIER
Input Output Voltage Range
Input Offset Voltage
Input Current
Input Resistance
Output Current
Short-Circuit Current
Small Signal Bandwidth
Slew Rate
DENOMINATOR INPUT
Input Range
Input Resistance
Offset Voltage
CHIP SELECT (CS)
RMS On Level
RMS Off Level
IOUT of Chip Select
AD637
Test Conditions/Comments
Min
−0.13
2 kΩ load, to −VS
20
AD637K/AD637B
Typ
Max
Unit
−VS to (+VS − 2.5)
±0.5
±1
±2
±5
108
+5
20
1
5
V
mV
nA
Ω
mA
mA
MHz
V/μs
0 to 10
25
±0.2
30
±0.5
Open or 2.4 < VC < +VS
VC < 0.2
CS low
CS high
10
0
10 + ((25 kΩ) × CAV)
10 + ((25 kΩ) × CAV)
On Time Constant
Off Time Constant
POWER SUPPLY
Operating Voltage Range
Quiescent Current
Standby Current
±3.0
2.2
350
Rev. L | Page 7 of 25
±18
3
450
V
kΩ
mV
V
V
μA
μA
μs
μs
V
mA
μA
AD637
Data Sheet
Table 3.
Parameter
TRANSFER FUNCTION
CONVERSION ACCURACY
Total Error, Internal Trim
TMIN to TMAX
vs. Supply
DC Reversal
Nonlinearity
Total Error
ERROR VS. CREST FACTOR (CF)
AVERAGING TIME CONSTANT
INPUT CHARACTERISTICS
Signal Range
Input Resistance
Input Offset Voltage
FREQUENCY RESPONSE
Bandwidth for 1% (0.09 dB) Additional Error
Test Conditions/Comments
AD637S
Typ
Min
Max
VOUT = avg  (VIN )
See Figure 5
VIN = 300 mV
VIN = −300 mV
−2 V < VIN < +2 V
2 V full scale
7 V full scale
External trim
Additional, at 1 V rms
For CF = 1 to 2
For CF = 3
For CF = 10
30
100
±1 ± 0.5
±6 ± 0.7
150
300
0.25
0.04
0.05
±0.5 ± 0.1
Specified accuracy
±0.1
±1.0
25
VS = ±15 V
Continuous
Transient
VS = ±5 V
Continuous
Transient
0 to 7
8
mV rms ±% of reading
mV ± % of reading
μV/V
μV/V
% of reading
% of FSR
% of FSR
mV ± % of reading
CF, %
% of reading
% of reading
ms/μF CAV
±15
V rms
V p-p
±6
9.6
±0.5
V rms
V p-p
kΩ
mV
0 to 4
6.4
Unit
2
VIN = 20 mV
VIN = 200 mV
VIN = 2 V
11
66
200
kHz
kHz
kHz
VIN = 20 mV
VIN = 200 mV
VIN = 2 V
150
1
8
kHz
MHz
MHz
vs. temperature
±0.04
13.5
2.2
±3 dB
OUTPUT CHARACTERISTICS
Offset Voltage
Voltage Swing, 2 kΩ load
0 to 12.0
0 to 2
6
VS = ±3 V
Output Current
Short-Circuit Current
Resistance
Resistance
dB OUTPUT
Error
Scale Factor
Scale Factor Tempco
±1
±0.07
20
0.5
100
CS high
CS low
VIN = 7 mV to 7 V rms, 0 dBV
IREF for 0 dB = 1 V rms
IREF Range
5
1
Rev. L | Page 8 of 25
±0.5
−3
+0.33
−0.033
20
80
100
mV
mV/°C
V
V
mA
mA
Ω
kΩ
dBV
mV/dB
% of reading/°C
dB/°C
μA
μA
Data Sheet
Parameter
BUFFER AMPLIFIER
Input Output Voltage Range
Input Offset Voltage
Input Current
Input Resistance
Output Current
Short-Circuit Current
Small Signal Bandwidth
Slew Rate
DENOMINATOR INPUT
Input Range
Input Resistance
Offset Voltage
CHIP SELECT (CS)
RMS On Level
RMS Off Level
IOUT of Chip Select
AD637
AD637S
Typ
Test Conditions/Comments
Min
Max
Unit
2 kΩ load, to −VS
−VS to (+VS − 2.5)
±0.8
±2
±2
±10
108
−0.13
+5
20
1
5
V
mV
nA
Ω
mA
mA
MHz
V/μs
20
0 to 10
25
±0.2
30
±0.5
Open or 2.4 < VC < +VS
CS low
CS high
10
0
10 + ((25 kΩ) × CAV)
10 + ((25 kΩ) × CAV)
On Time Constant
Off Time Constant
POWER SUPPLY
Operating Voltage Range
Quiescent Current
Standby Current
±3.0
2.2
350
Rev. L | Page 9 of 25
±18
3
450
V
kΩ
mV
V
V
μA
μA
μs
μs
V
mA
μA
AD637
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
ESD Rating
Supply Voltage
Internal Quiescent Power Dissipation
Output Short-Circuit Duration
Storage Temperature Range
Lead Temperature (Soldering 10 sec)
Rated Operating Temperature Range
AD637J, AD637K
AD637A, AD637B
AD637S, 5962-8963701CA
Rating
500 V
±18 V dc
108 mW
Indefinite
−65°C to +150°C
300°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
0°C to 70°C
−40°C to +85°C
−55°C to +125°C
Rev. L | Page 10 of 25
Data Sheet
AD637
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
14 BUFF OUT
NIC 2
13 VIN
BUFF IN 1
16
BUFF OUT
NIC 2
15
VIN
14
NIC
12 NIC
COMMON 3
TOP VIEW 11 +VS
(Not to Scale)
10 –VS
CS 5
OUTPUT OFFSET 4
COMMON 3
AD637
OUTPUT OFFSET 4
9
RMS OUT
dB OUTPUT 7
8
CAV
NIC = NO INTERNAL CONNECTION
CS 5
DEN INPUT 6
00788-002
DEN INPUT 6
AD637
13 +VS
TOP VIEW
(Not to Scale) 12 –VS
11 RMS OUT
dB OUTPUT 7
10
CAV
NIC 8
9
NIC
NIC = NO INTERNAL CONNECTION
Figure 2. 14-Lead SBDIP/CERDIP Pin Configuration
00788-003
BUFF IN 1
Figure 3. 16-Lead SOIC_W Pin Configuration
Table 5. 14-Lead SBDIP/CERDIP Pin Function Descriptions
Table 6. 16-Lead SOIC_W Pin Function Descriptions
Pin No.
1
2, 12
3
4
5
6
7
8
9
10
11
13
14
Pin No.
1
2, 8, 9, 14
3
4
5
6
7
10
11
12
13
15
16
Mnemonic
BUFF IN
NIC
COMMON
OUTPUT OFFSET
CS
DEN INPUT
dB OUTPUT
CAV
RMS OUT
−VS
+VS
VIN
BUFF OUT
Description
Buffer Input
No Internal Connection
Analog Common
Output Offset
Chip Select
Denominator Input
dB Output
Averaging Capacitor Connection
RMS Output
Negative Supply Rail
Positive Supply Rail
Signal Input
Buffer Output
Rev. L | Page 11 of 25
Mnemonic
BUFF IN
NIC
COMMON
OUTPUT OFFSET
CS
DEN INPUT
dB OUTPUT
CAV
RMS OUT
−VS
+VS
VIN
BUFF OUT
Description
Buffer Input
No Internal Connection
Analog Common
Output Offset
Chip Select
Denominator Input
dB Output
Averaging Capacitor Connection
RMS Output
Negative Supply Rail
Positive Supply Rail
Signal Input
Buffer Output
AD637
Data Sheet
THEORY OF OPERATION
FILTER/AMPLIFIER
BUFF OUT
BUFF IN
ONE QUADRANT
SQUARER/DIVIDER
14
1
8
CAV
11
+VS
24kΩ
BUFFER
AMPLIFIER
A5
A4
I4
I1
24kΩ
Q4
RMS
OUT
7
dB
OUTPUT
3
COMMON
Q1
ABSOLUTE VALUE VOLTAGE TO
CURRENT CONVERTER
6kΩ
9
BIAS
Q5
Q2
6kΩ
Q3
I3
A3
5
CS
6
DEN
INPUT
4
OUTPUT
OFFSET
10
– VS
24kΩ
A2
VIN 13
125Ω
12kΩ
AD637
00788-004
A1
Figure 4. Simplified Schematic
The AD637 embodies an implicit solution of the rms equation
that overcomes the inherent limitations of straightforward rms
computation. The actual computation performed by the AD637
follows the equation:
 V 2 
V rms  Avg  IN 
 V rms 
Figure 4 is a simplified schematic of the AD637, subdivided
into four major sections: absolute value circuit (active rectifier),
squarer/divider, filter circuit, and buffer amplifier. The input
voltage (VIN), which can be ac or dc, is converted to a unipolar
current (I1) by the A1 and A2 absolute value circuit. I1 drives
one input of the squarer/divider, which has the transfer function:
2
I4 
I1
I3
The output current of the squarer/divider, I4, drives A4, forming
a low-pass filter with the external averaging capacitor. If the RC
time constant of the filter is much greater than the longest period
of the input signal, then the A4 output is proportional to the
average of I4. The output of this filter amplifier is used by A3
to provide the denominator current I3, which equals Avg I4 and
is returned to the squarer/divider to complete the implicit rms
computation
I 2
I 4  Avg  1
 I4

  I 1 rms

and
VOUT = VIN rms
To compute the absolute value of the input signal, the averaging
capacitor is omitted. However, a small capacitance value at the
averaging capacitor pin is recommended to maintain stability;
5 pF is sufficient for this purpose. The circuit operates identically
to that of the rms configuration, except that I3 is now equal to
I4, giving
2
I4 
I1
I4
I4 = |I1|
The denominator current can also be supplied externally by
providing a reference voltage (VREF) to Pin 6. The circuit operates
identically to the rms case, except that I3 is now proportional to
VREF. Therefore,
2
I 4  Avg
I1
I3
and
VOUT 
VIN 2
VDEN
This is the mean square of the input signal.
Rev. L | Page 12 of 25
Data Sheet
AD637
APPLICATIONS INFORMATION
20
3 COMMON
OUTPUT
4 OFFSET
4.7kΩ
+VS
5 CS
–VS
7
dB
OUTPUT
+
10
RMS
OUT 9
–
+
11
+VS
–VS
VOUT =
VIN2
+ CAV
25kΩ
±15
±5
±10
SUPPLY VOLTAGE – DUAL SUPPLY (V)
±18
The AD637 includes a chip select feature that allows the user
to decrease the quiescent current of the device from 2.2 mA to
350 µA. This is done by driving CS, Pin 5, to below 0.2 V dc.
Under these conditions, the output goes into a high impedance
state. In addition to reducing the power consumption, the
outputs of multiple devices can be connected in parallel to
form a wide bandwidth rms multiplexer. Tie Pin 5 high to
disable the chip select.
(OPTIONAL)
BIAS
±3
CHIP SELECT
VIN
NIC 12
–
0
Figure 6. Maximum VOUT vs. Supply Voltage
VIN 13
SQUARER/
DIVIDER
DEN
6 INPUT 25kΩ
0
CAV 8
NIC = NO INTERNAL CONNECTION
Figure 5. Standard RMS Connection
The performance of the AD637 is tolerant of minor variations
in the power supply voltages; however, if the supplies used
exhibit a considerable amount of high frequency ripple, it is
advisable to bypass both supplies to ground through a 0.1 µF
ceramic disc capacitor placed as close to the device as possible.
OPTIONAL TRIMS FOR HIGH ACCURACY
The AD637 includes provisions for trimming out output offset
and scale factor errors resulting in significant reduction in the
maximum total error, as shown in Figure 7. The residual error is
due to a fixed input offset in the absolute value circuit and the
residual nonlinearity of the device.
The output signal range of the AD637 is a function of the
supply voltages, as shown in Figure 6. Use the output voltage
buffered or nonbuffered, depending on the characteristics of the
load. Connect the buffer input (Pin 1) to common if buffering is
not required. The output of the AD637 is capable of driving
5 mA into a 2 kΩ load without degrading the accuracy of the
device.
5.0
AD637K MAX
2.5
ERROR (mV)
ABSOLUTE
VALUE
+VS
5
BUFF OUT 14
NC
–
2 NIC
10
INTERNAL TRIM
AD637K
EXTERNAL TRIM
0
–2.5
AD637K: 0.5mV ± 0.2%
0.25mV ± 0.05%
EXTERNAL
–5.0
0
0.5
1.0
INPUT LEVEL (V)
1.5
Figure 7. Maximum Total Error vs.
Input Level AD637K Internal and External Trims
Rev. L | Page 13 of 25
2.0
00788-007
AD637
+
00788-005
1 BUFF IN
15
00788-006
The AD637 is simple to connect for a majority of rms
measurements. In the standard rms connection shown in Figure 5,
only a single external capacitor is required to set the averaging
time constant. In this configuration, the AD637 computes the
true rms of any input signal. An averaging error, the magnitude
of which is dependent on the value of the averaging capacitor,
is present at low frequencies. For example, if the filter capacitor,
CAV, is 4 µF, the error is 0.1% at 10 Hz and increases to 1% at
3 Hz. To measure ac signals, the AD637 can be ac-coupled by
adding a nonpolar capacitor in series with the input, as shown
in Figure 5.
MAX VOUT (Volts 2kΩ Load)
STANDARD CONNECTION
AD637
Data Sheet
Offset Trim
Ground the input signal (VIN) and adjust R1 until the output
voltage at Pin 9 measures 0 V. Alternatively, apply the least
expected value of VIN.at the input VIN and adjust R1 until the dc
output voltage at Pin 9 measures the same value as the rms input.
The value of CAV and the 25 kΩ feedback resistor establish the
averaging time constant, and solely determines the magnitude
of the rms-to-dc conversion error. Furthermore, any postconversion filtering does not improve the dc component
composite result.
Equation 1 defines the approximate peak value of the ac ripple
component of the composite output.
50
in % of reading where (τ > 1 / f )
6.3 τf
Scale Factor Trim
Insert Resistor R4 in series with the input to decrease the range
of the scale factor. Connect a precision source to Pin 13 and
adjust the output for the desired full-scale input to VIN, using
either a calibrated dc or 1 kHz ac voltage, and adjust Resistor R3
to give the correct output at Pin 9 (that is, 1 V rms at the input
results in a dc output voltage of 1.000 V dc). A 2 V p-p sine
wave input yields 0.707 V dc at the output. Remaining errors
are due to the nonlinearity.
(1)
EO
IDEAL
EO
DC ERROR = AVERAGE OF OUTPUT – IDEAL
AVERAGE ERROR
DOUBLE-FREQUENCY
RIPPLE
00788-009
Referring to Figure 8 for optional external gain and offset trim
schematic. The following sections describe trimming for greater
accuracy in detail.
TIME
Figure 9. Enlarged Composite Conversion Result for a Sinusoidal Input
1 BUFF IN
AD637
+
–
2 NIC
3 COMMON
R2
1MΩ
R1
50kΩ
–VS
+VS
OUTPUT
4 OFFSET
Increasing the value of the averaging capacitor or adding a postrms filter network reduces the ripple error.
VIN
NIC 12
BIAS
SQUARER/
DIVIDER
4.7kΩ 5 CS
+VS
11
–VS 10
DEN
6 INPUT 25kΩ
7
R4
VIN 13 147Ω
–
–
+
dB
OUTPUT
+VS
1
in % of reading
0.16 + 6.4 τ 2 f 2
–VS
RMS
OUT 9
+
25kΩ
The dc error appears as a frequency dependent offset at the
output of the AD637 and follows the relationship
RMSOUT
+
CAV
100
CAV 8
R3
1kΩ
NIC = NO INTERNAL CONNECTION
00788-008
SCALE FACTOR TRIM
Figure 8. Optional External Gain and Offset Trims
CHOOSING THE AVERAGING TIME CONSTANT
The AD637 computes the true rms value of both dc and ac
input signals. For dc inputs, the output tracks the absolute
value of the input exactly. However, when the voltage is ac,
the converted dc output voltage asymptotically approaches the
theoretical rms value of the input. The deviation from the ideal
rms value is due to the implicit denominator inherent to averaging over an infinite time span. Because the error diminishes as
the averaging period increases, it quickly becomes negligible.
The remaining error components are the ac ripple and dc offset
voltage, if any. The ac and averaging error components are both
functions of the input-frequency (f) and the averaging time
constant τ (τ: 25 ms/µF of averaging capacitance). Figure 9 shows
the output errors, which are enlarged for clarity. The frequency
of the ac component (ripple) is twice the frequency of the input,
the dc error is the RSS sum of the average rectified error and
any fixed value dc offset.
10
PEAK RIPPLE
1.0
DC ERROR
0.1
10
100
1k
SINE WAVE INPUT FREQUENCY (Hz)
10k
00788-010
+VS
ABSOLUTE
VALUE
DC ERROR OR RIPPLE (% of Reading)
OUTPUT
OFFSET
TRIM
BUFF
OUT 14
NC
Figure 10. Comparison of Percent DC Error to the Percent Peak Ripple over
Frequency Using the AD637 in the Standard RMS Connection with a 1 × µF CAV
The ac ripple component of averaging error is greatly reduced
by increasing the value of the averaging capacitor. However, the
value of the averaging capacitor increases exponentially while
the settling time increases directly proportion to the value of
the averaging capacitor (TS = 115 ms/µF of averaging capacitance).
Rev. L | Page 14 of 25
Data Sheet
AD637
–VS
10k
REQUIRED CAV (µF)
FOR 1% SETTLING TIME IN SECONDS
MULTIPLY READING BY 0.115
0.01
100k
00788-012
100
1k
INPUT FREQUENCY (Hz)
1
5%
Figure 12 shows values of CAV and the corresponding averaging
error as a function of sine wave frequency for the standard rms
connection. The 1% settling time is shown on the right side of
Figure 12.
1
1%
Figure 11. 2-Pole Sallen-Key Filter
10
0.1
0.1
0.01
1
10k
0.01
100k
Figure 13. Values of CAV, C2, and 1% Settling Time for Stated % of Reading for
1-Pole Post Filter; Averaging Error (% DC Error + % Ripple (Peak) Accuracy
±20% Due to Component Tolerance)
100
100
10
10
R
O
R
R
ER
O
%
R
01
ER OR
0.
R
R
ER RO
ER
1
1
1%
0.
5%
The symmetry of the input signal also has an effect on the
magnitude of the averaging error. Table 7 gives the practical
component values for various types of 60 Hz input signals.
These capacitor values can be directly scaled for frequencies
other than 60 Hz—that is, for 30 Hz, these values are doubled,
and for 120 Hz they are halved.
1k
100
INPUT FREQUENCY (Hz)
1%
Figure 13 shows the relationship between the averaging error,
signal frequency settling time, and averaging capacitor value.
Figure 13 is drawn for filter capacitor values of 3.3× the
averaging capacitor value. This ratio sets the magnitude of
the ac and dc errors equal at 50 Hz. As an example, by using a
1 µF averaging capacitor and a 3.3 µF filter capacitor, the ripple
for a 60 Hz input signal is reduced from 5.3% of the reading
using the averaging capacitor alone to 0.15% using the 1-pole
filter. This gives a factor of 30 reduction in ripple, and yet the
settling time only increases by a factor of 3. The values of
Filter Capacitor CAV and Filter Capacitor C2 can be calculated
for the desired value of averaging error and settling time by
using Figure 13.
10
FOR 1% SETTLING TIME IN SECONDS
MULTIPLY READING BY 0.400
NIC = NO INTERNAL CONNECTION
10
R
O
R
R
ER
O
R
%
01
R
ER
0.
O
R
R
1%
0.
ER RO
ER
FOR A 1 POLE
FILTER SHORT RX
AND REMOVE C3
100
00788-013
24kΩ
100
REQUIRED CAV (AND C2)
C2 = 3.3 × CAV
CAV 8
C2
10
Figure 12. Values for CAV and 1% Settling Time for Stated % of Reading; Averaging
Error (% DC Error + % Ripple (Peak)); Accuracy Includes ±20% Component
Tolerance
+ CAV
25kΩ
RX
24kΩ
+
1
0.1
0.01
1
10
100
1k
INPUT FREQUENCY (Hz)
0.1
10k
0.01
100k
FOR 1% SETTLING TIME IN SECONDS
MULTIPLY READING BY 0.365
+
0.01
+VS
REQUIRED CAV (AND C2 + C3)
C2 = C3 = 2.2 × CAV
7
dB
OUTPUT
–
0.1
C3
RMS
OUT 9
–
+
0.1
+
00788-011
DEN
6 INPUT 25kΩ
10
1.0
00788-014
–VS
R
4.7kΩ 5 CS
11
R
+VS
O
R
ER
BIAS
%
01
0.
+VS
VIN
NIC 12
SQUARER/
DIVIDER
R
OUTPUT
4 OFFSET
O
R
ER
3 COMMON
O
R
ER
VIN 13
ABSOLUTE
VALUE
1.0
R
–
2 NIC
1%
0.
BUFF
OUT 14
10
O
R
ER
AD637
+
10
%
10
1 BUFF IN
100
100
1%
A preferable ripple reduction method is to use a post conversion
one or two-pole low-pass filter, as shown in Figure 11. Usually
a single-pole filter gives the best overall compromise between
ripple and settling time. Use the two-pole Sallen-Key for more
ripple attenuation.
Figure 14. Values of CAV, C2, and C3 and 1% Settling Time for Stated % of
Reading for 2-Pole Sallen-Key Filter; Averaging Error (% DC Error + %Ripple
(Peak) Accuracy ±20% Due to Component Tolerance)
Use Figure 14 to determine the required value of CAV, C2, and
C3 for the desired level of ripple and settling time.
Rev. L | Page 15 of 25
AD637
Data Sheet
Table 7. Practical Values of CAV and C2 for Various Input Waveforms
Absolute Value
Circuit Waveform
and Period
Input Waveform
and Period
1/2T
T
A
Minimum R × CAV
Time Constant
1/2T
Recommended Standard Values for CAV and C2
for 1% Averaging Error @ 60 Hz with T = 16.6 ms
CAV (μF)
C2 (μF)
0.47
1.5
1% Settling
Time
181 ms
T
0.82
2.7
325 ms
10 (T − T2)
6.8
22
2.67 sec
10 (T − 2T2)
5.6
18
2.17 sec
0V
Symmetrical Sine Wave
T
T
B
0V
Sine Wave with dc Offset
T
C
T
T2
T2
0V
Pulse Train Waveform
T
T
D
T2
0V
T2
FREQUENCY RESPONSE
10
Rev. L | Page 16 of 25
1V RMS INPUT
1
1%
0.01
10%
±3dB
100mV RMS INPUT
10mV RMS INPUT
1k
10k
100k
INPUT FREQUENCY (Hz)
1M
Figure 15. Frequency Response
10M
00788-015
0.1
To take full advantage of the wide bandwidth of the AD637,
use care in the selection of the input buffer amplifier. To ensure
that the input signal is accurately presented to the converter,
the input buffer must have a −3 dB bandwidth that is wider
than that of the AD637. Note the importance of slew rate in
this application. For example, the minimum slew rate required
for a 1 V rms, 5 MHz, sine wave input signal is 44 V/μs. The user
is cautioned that this is the minimum rising or falling slew rate
and that care must be exercised in the selection of the buffer
amplifier, because some amplifiers exhibit a two-to-one
difference between rising and falling slew rates. The AD845
is recommended as a precision input buffer.
7V RMS INPUT
2V RMS INPUT
VOUT (V)
The frequency response of the AD637 at various signal levels is
shown in Figure 15. The dashed lines show the upper frequency
limits for 1%, 10%, and ±3 dB of additional error. For example,
note that for 1% additional error with a 2 V rms input, the
highest frequency allowable is 200 kHz. A 200 mV signal can
be measured with 1% error at signal frequencies up to 100 kHz.
Data Sheet
AD637
1.5
AC MEASUREMENT ACCURACY AND CREST
FACTOR
INCREASE IN ERROR (%)
1.0
Crest factor is often overlooked in determining the accuracy of
an ac measurement. Crest factor is defined as the ratio of the peak
signal amplitude to the rms value of the signal (CF = VP/V rms).
Most common waveforms, such as sine and triangle waves, have
relatively low crest factors (≤2). Waveforms that resemble low
duty cycle pulse trains, such as those occurring in switching
power supplies and SCR circuits, have high crest factors. For
example, a rectangular pulse train with a 1% duty cycle has
0.5
0
–0.5
POSITIVE INPUT PULSE
CAV = 22µF
–1.0
–1.5
Vp
100µs
e0
eIN(RMS) = 1 V RMS
1
MAGNITUDE OF ERROR (% of RMS Level)
INCREASE IN ERROR (%)
CAV = 22µF
1
CF = 10
0.1
5
6
7
CREST FACTOR
8
9
10
11
1.8
1.6
1.4
1.2
00788-017
1000
CF = 10
1.0
0.8
CF = 7
0.6
0.4
0.2
0
CF = 3
100
10
PULSE WIDTH (µs)
4
2.0
10
1
3
Figure 18. Additional Error vs. Crest Factor
Figure 16. Duty Cycle Timing
0.01
2
CF = 3
0
0.5
1.0
VIN (V RMS)
1.5
2.0
00788-019
0
100µs
η = DUTY CYCLE =
T
CF = 1/ η
00788-016
T
00788-018
a crest factor of 10 (CF = 1  ).
Figure 19. Error vs. RMS Input Level for Three Common Crest Factors
CONNECTION FOR dB OUTPUT
Figure 17. AD637 Error vs. Pulse Width Rectangular Pulse
Figure 18 is a curve of additional reading error for the AD637
for a 1 V rms input signal with crest factors from 1 to 11.
A rectangular pulse train (pulse width 100 μs) is used for this
test because it is the worst-case waveform for rms measurement
(all the energy is contained in the peaks). The duty cycle and
peak amplitude were varied to produce crest factors from l to
10 while maintaining a constant 1 V rms input amplitude.
Another feature of the AD637 is the logarithmic, or decibel,
output. The internal circuit that computes dB works well over
a 60 dB range. Figure 20 shows the dB measurement connection.
The user selects the 0 dB level by setting R1 for the proper 0 dB
reference current, which is set to cancel the log output current
from the squarer/divider circuit at the desired 0 dB point. The
external op amp is used to provide a more convenient scale and to
allow compensation of the 0.33%/°C temperature drift of the
dB circuit. The temperature resistor, R3, as shown in Figure 20,
is available from Precision Resistor Co., Inc., in Largo, Fla.
(Model PT146).
Rev. L | Page 17 of 25
AD637
Data Sheet
dB CALIBRATION
Refer to Figure 20:
•
•
•
•
Set VIN = 1.00 V dc or 1.00 V rms
Adjust R1 for 0 dB output = 0.00 V
Set VIN = 0.1 V dc or 0.10 V rms
Adjust R2 for dB output = −2.00 V
Any other dB reference can be used by setting VIN and R1
accordingly.
R2
33.2kΩ
SIGNAL
INPUT
5kΩ
BUFFER
AD637
1 BUFF IN
2 NIC
ABSOLUTE
VALUE
3 COMMON
OUTPUT
4 OFFSET
+VS
dB SCALE
FACTOR
ADJUST
4.7kΩ
+VS
SQUARER/DIVIDER
2
+VS
–VS
7
AD707JN
3
NIC 12
BIAS
SECTION
60.4Ω
VIN 13
5 CS
DEN
6 INPUT
R3
1kΩ*
BUFF
OUT 14
4
6
COMPENSATED
dB OUTPUT
+100mV/dB
–VS
11
+VS
10
–VS
RMS
OUT 9
25kΩ
25kΩ
FILTER
7 dB OUTPUT
+
1µF
CAV 8
10kΩ
+VS
R1
500kΩ
+2.5V
AD508J
0dB ADJUST
00788-020
*1kΩ + 3500ppm
SEE TEXT
NIC = NO INTERNAL CONNECTION
Figure 20. dB Connection
Rev. L | Page 18 of 25
Data Sheet
AD637
V+
1µF
3.3MΩ 3.3MΩ
BUFFER
2 NIC
+VS
OUTPUT
OFFSET 50kΩ
ADJUST
1MΩ
4
VIN 13
BIAS
SECTION
SQUARER/
DIVIDER
+VS
5 CS
11
–VS 10
4.7kΩ
DEN
6 INPUT 25kΩ
4
6
FILTERED
V RMS OUTPUT
V–
SIGNAL
INPUT
6.8MΩ
1000pF
+VS
–VS
RMS
OUT 9
+
7
AD548JN
2
NIC 12
3 COMMON
+VS
–VS
ABSOLUTE
VALUE
OUTPUT
OFFSET
1µF
BUFF
OUT 14
AD637
1 BUFF IN
7
3
25kΩ
dB OUTPUT
VIN2
V RMS
100µF
CAV 8
499kΩ 1%
R
00788-021
CAV1
3.3µF
NOTES
1. VALUES CHOSEN TO GIVE 0.1% AVERAGING ERROR AT 1Hz.
2. NIC = NO INTERNAL CONNECTION.
Figure 21. AD637 as a Low Frequency RMS Converter
LOW FREQUENCY MEASUREMENTS
VECTOR SUMMATION
If the frequencies of the signals to be measured are below 10 Hz,
the value of the averaging capacitor required to deliver even 1%
averaging error in the standard rms connection becomes
extremely large. Figure 21 shows an alternative method of
obtaining low frequency rms measurements. Determine the
averaging time constant by the product of R and CAV1, in this
circuit, 0.5 sec/µF of CAV. This circuit permits a 20:1 reduction
in the value of the averaging capacitor, permitting the use of
high quality tantalum capacitors. It is suggested that the 2-pole,
Sallen-Key filter shown in Figure 21 be used to obtain a low
ripple level and minimize the value of the averaging capacitor.
Use two AD637s for vector summation as shown in Figure 22.
Here, the averaging capacitors are omitted (nominal 100 pF
capacitors are used to ensure stability of the filter amplifier), and
the outputs are summed as shown. The output of the circuit is
If the frequency of interest is below 1 Hz, or if the value of
the averaging capacitor is still too large, increase the 20:1 ratio.
This is accomplished by increasing the value of R. If this is
done, it is suggested that a low input current, low offset voltage
amplifier, such as the AD548, be used instead of the internal
buffer amplifier. This is necessary to minimize the offset error
introduced by the combination of amplifier input currents and
the larger resistance.
VOUT = VX 2 + VY 2
This concept can be expanded to include additional terms by
feeding the signal from Pin 9 of each additional AD637 through
a 10 kΩ resistor to the summing junction of the AD711 and
tying all of the denominator inputs (Pin 6) together.
If CAV is added to IC1 in this configuration, then the output is
VX 2 + VY 2
If the averaging capacitor is included on both IC1 and IC2, the
output is
VX 2 + VY 2
This circuit has a dynamic range of 10 V to 10 mV and is
limited only by the 0.5 mV offset voltage of the AD637.
The useful bandwidth is 100 kHz.
Rev. L | Page 19 of 25
AD637
Data Sheet
EXPANDABLE
BUFFER
1
IC1
BUFF IN
AD637
BUFF
OUT
VXIN 13
ABSOLUTE
VALUE
2 NIC
3 COMMON
NIC 12
BIAS
SECTION
OUTPUT
4 OFFSET
+VS
DEN
6 INPUT
11
SQUARER/DIVIDER
+VS
25kΩ
5 CS
4.7kΩ
–VS
+VS
10
–VS
RMS
OUT 9
25kΩ
100pF
FILTER
7
14
dB OUTPUT
8
BUFFER
2 NIC
IC2
AD637
BUFF
OUT
ABSOLUTE
VALUE
3 COMMON
+VS
DEN
6 INPUT
SQUARER/DIVIDER
25kΩ
5 CS
4.7kΩ
14
VYIN
AD711K
13
10kΩ
NIC 12
BIAS
SECTION
OUTPUT
4 OFFSET
+VS
–VS
CAV
10kΩ
10kΩ
1 BUFF IN
5pF
11
10
+VS
20kΩ
–VS
RMS
OUT 9
25kΩ
100pF
FILTER
dB OUTPUT
VOUT =
NIC = NO INTERNAL CONNECTION
Figure 22. Vector Sum Configuration
Rev. L | Page 20 of 25
VX2 + VY2
00788-022
7
8
Data Sheet
AD637
EVALUATION BOARD
amp, and is configured on the AD637-EVALZ as a low-pass
Sallen-Key filter whose fC < 0.5 Hz. Users can connect to
the buffer by moving the FILTER switch to the on position.
DC_OUT is still the output of the AD637, and the test loop,
BUF_OUT, is the output of the buffer. The R2 trimmer adjusts
the output offset voltage.
Referring to the schematic in Figure 30, the input connector
RMS_IN is capacitively coupled to Pin 15 (VIN of SOIC package)
of the AD637. The DC_OUT connector is connected to Pin 11,
RMS OUT, with provisions for connections to the output buffer
between Pin 1 and Pin 16. The buffer is an uncommitted op
The LPF frequency is changed by changing the component
values of CF1, CF2, R4, and R5. See Figure 24 and Figure 30
to locate these components. Note that a wide range of capacitor
and resistor values can be used with the AD637 buffer amplifier.
00788-123
Figure 23 shows a digital image of the AD637-EVALZ, an
evaluation board specially designed for the AD637. It is
available at www.analog.com and is fully tested and ready
for bench testing after connecting power and signal I/O. The
circuit is configured for dual power supplies, and standard
BNC connectors serve as the signal input and output ports.
Figure 23. AD637-EVALZ
Rev. L | Page 21 of 25
Data Sheet
00788-124
00788-127
AD637
Figure 27. Evaluation Board—Secondary Side Copper
00788-128
00788-125
Figure 24. AD637-EVALZ Assembly
Figure 28. Evaluation Board—Internal Power Plane
00788-126
00788-129
Figure 25. Component Side Silkscreen
Figure 29. Evaluation Board—Internal Ground Plane
Figure 26. Evaluation Board—Component Side Copper
Rev. L | Page 22 of 25
AD637
Data Sheet
–VS
GND1 GND2 GND3 GND4
C1
10µF
25V
+VS
+
+
–VS
+VS
FILTER
BUF_IN
4
1
2
OUT
5
3
6
1
C2
10µF
25V
IN
BUFF OUT
BUFF IN
16
BUF_OUT
2
3
+VS
R1
1MΩ
R2
50kΩ
+VS
4
R3
4.7kΩ 5
–VS
6
7
NIC
Z1
AD637
COMMON
NIC
OUTPUT
OFFSET
+VS
CS
–VS
RMS OUT
DEN INPUT
dB OUTPUT
CAV
NIC
NIC
DB_OUT
8
VIN
R4
24.3kΩ
14
CIN
22µF
16V
RMS_IN
13
C3
0.1µF
12
C4
0.1µF
11
+
10
+VS
–VS
DC_OUT
DC_OUT
CAV
22µF
16V
9
+
R5
24.3kΩ
CF1
47µF
25V
CF2
47µF
25V
00788-130
+
15
+
RMS_IN
NIC = NO INTERNAL CONNECTION
Figure 30. Evaluation Board Schematic
AC OR DC INPUT SIGNAL SOURCE
FROM PRECISION CALIBRATOR
OR FUNCTION GENERATOR
PRECISION DMM TO
MONITOR VOUT
Figure 31. AD637-EVALZ Typical Bench Configuration
Rev. L | Page 23 of 25
00788-131
POWER
SUPPLY
AD637
Data Sheet
OUTLINE DIMENSIONS
0.005 (0.13) MIN
0.080 (2.03) MAX
8
14
1
PIN 1
0.310 (7.87)
0.220 (5.59)
7
0.100 (2.54)
BSC
0.765 (19.43) MAX
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.060 (1.52)
0.015 (0.38)
0.320 (8.13)
0.290 (7.37)
0.150
(3.81)
MIN
SEATING
PLANE
0.070 (1.78)
0.030 (0.76)
0.015 (0.38)
0.008 (0.20)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 32. 14-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
(D-14)
Dimensions shown in inches and (millimeters)
0.005 (0.13) MIN
14
1
PIN 1
0.098 (2.49) MAX
8
0.310 (7.87)
0.220 (5.59)
7
0.100 (2.54) BSC
0.785 (19.94) MAX
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.320 (8.13)
0.290 (7.37)
0.060 (1.52)
0.015 (0.38)
0.150
(3.81)
MIN
SEATING
0.070 (1.78) PLANE
0.030 (0.76)
15°
0°
0.015 (0.38)
0.008 (0.20)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 33. 14-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-14)
Dimensions shown in inches and (millimeters)
Rev. L | Page 24 of 25
Data Sheet
AD637
10.50 (0.4134)
10.10 (0.3976)
9
16
7.60 (0.2992)
7.40 (0.2913)
8
1.27 (0.0500)
BSC
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
0.51 (0.0201)
0.31 (0.0122)
10.65 (0.4193)
10.00 (0.3937)
0.75 (0.0295)
45°
0.25 (0.0098)
2.65 (0.1043)
2.35 (0.0925)
SEATING
PLANE
8°
0°
0.33 (0.0130)
0.20 (0.0079)
COMPLIANT TO JEDEC STANDARDS MS-013-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
1.27 (0.0500)
0.40 (0.0157)
03-27-2007-B
1
Figure 34. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body (RW-16)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1
5962-8963701CA
AD637AQ
AD637ARZ
AD637BRZ
AD637JD
AD637JDZ
AD637JQ
AD637JRZ
AD637JRZ-RL
AD637JRZ-R7
AD637KDZ
AD637KQ
AD637KRZ
AD637SD
AD637SD/883B
AD637SQ/883B
AD637-EVALZ
1
2
Notes
2
Temperature Range
−55°C to +125°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
Package Description
14-Lead CERDIP
14-Lead CERDIP
16-Lead SOIC_W
16-Lead SOIC_W
14-Lead SBDIP
14-Lead SBDIP
14-Lead CERDIP
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
14-Lead SBDIP
14-Lead CERDIP
16-Lead SOIC_W
14-Lead SBDIP
14-Lead SBDIP
14-Lead CERDIP
Evaluation Board
Z = RoHS Compliant Part.
A standard microcircuit drawing is available.
©2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00788-0-4/15(L)
Rev. L | Page 25 of 25
Package Option
Q-14
Q-14
RW-16
RW-16
D-14
D-14
Q-14
RW-16
RW-16
RW-16
D-14
Q-14
RW-16
D-14
D-14
Q-14