a FEATURES High Accuracy 0.02% Max Nonlinearity, 0 V to 2 V RMS Input 0.10% Additional Error to Crest Factor of 3 Wide Bandwidth 8 MHz at 2 V RMS Input 600 kHz at 100 mV RMS Computes: True RMS Square Mean Square Absolute Value dB Output (60 dB Range) Chip Select/Power-Down Feature Allows: Analog “Three-State” Operation Quiescent Current Reduction from 2.2 mA to 350 A Side Brazed DIP, Low Cost Cerdip and SOIC PRODUCT DESCRIPTION The AD637 is a complete high accuracy monolithic rms-to-dc converter that computes the true rms value of any complex waveform. It offers performance that is unprecedented in integrated circuit rms-to-dc converters and comparable to discrete and modular techniques in accuracy, bandwidth, and dynamic range. A crest factor compensation scheme in the AD637 permits measurements of signals with crest factors of up to 10 with less than 1% additional error. The circuit’s wide bandwidth permits the measurement of signals up to 600 kHz with inputs of 200 mV rms and up to 8 MHz when the input levels are above 1 V rms. As with previous monolithic rms converters from Analog Devices, the AD637 has an auxiliary dB output available to the user. The logarithm of the rms output signal is brought out to a separate pin, allowing direct dB measurement with a useful range of 60 dB. An externally programmed reference current allows the user to select the 0 dB reference voltage to correspond to any level between 0.1 V and 2.0 V rms. A chip select connection on the AD637 permits the user to decrease the supply current from 2.2 mA to 350 µA during periods when the rms function is not in use. This feature facilitates the addition of precision rms measurement to remote or hand-held applications where minimum power consumption is critical. In addition when the AD637 is powered down the output goes to a high impedance state. This allows several AD637s to be tied together to form a wideband true rms multiplexer. The input circuitry of the AD637 is protected from overload voltages that are in excess of the supply levels. The inputs will not be damaged by input signals if the supply voltages are lost. High Precision, Wideband RMS-to-DC Converter AD637 FUNCTIONAL BLOCK DIAGRAMS Ceramic DIP (D) and Cerdip (Q) Packages BUFFER SOIC (R) Package BUFFER AD637 1 14 ABSOLUTE VALUE 2 3 BIAS SECTION 4 SQUARER/DIVIDER 13 2 12 3 16 ABSOLUTE VALUE 4 10 13 12 5 25k 25k 9 6 7 SQUARER/DIVIDER 25k 25k 5 15 14 BIAS SECTION 11 AD637 1 FILTER 8 11 6 7 8 FILTER 10 9 The AD637 is available in two accuracy grades (J and K) for commercial (0°C to 70°C) temperature range applications; two accuracy grades (A and B) for industrial (–40°C to +85°C) applications; and one (S) rated over the –55°C to +125°C temperature range. All versions are available in hermetically sealed, 14-lead side brazed ceramic DIPs as well as low cost cerdip packages. A 16-lead SOIC package is also available. PRODUCT HIGHLIGHTS 1. The AD637 computes the true root-mean-square, meansquare, or absolute value of any complex ac (or ac plus dc) input waveform and gives an equivalent dc output voltage. The true rms value of a waveform is more useful than an average rectified signal since it relates directly to the power of the signal. The rms value of a statistical signal is also related to the standard deviation of the signal. 2. The AD637 is laser wafer trimmed to achieve rated performance without external trimming. The only external component required is a capacitor that sets the averaging time period. The value of this capacitor also determines low-frequency accuracy, ripple level, and settling time. 3. The chip select feature of the AD637 permits the user to power down the device during periods of nonuse, thereby decreasing battery drain in remote or hand-held applications. 4. The on-chip buffer amplifier can be used either as an input buffer or in an active filter configuration. The filter can be used to reduce the amount of ac ripple, thereby increasing the accuracy of the measurement. REV. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 AD637–SPECIFICATIONS (@ 25C, and 15 V dc unless otherwise noted.) Model AD637J/A Typ Min VOUT = avg × (VIN ) TRANSFER FUNCTION CONVERSION ACCURACY Total Error, Internal Trim1 (Fig. 2) TMIN to TMAX vs. Supply, + VIN = +300 mV vs. Supply, – VIN = –300 mV DC Reversal Error at 2 V Nonlinearity 2 V Full Scale2 Nonlinearity 7 V Full Scale Total Error, External Trim 30 100 DENOMINATOR INPUT Input Range Input Resistance Offset Voltage 1 0.5 3.0 0.6 150 300 0.25 0.04 0.05 Max VOUT = avg × (VIN ) 2 0.5 0.2 2.0 0.3 150 300 0.1 0.02 0.05 ± 0.25 ± 0.05 Specified Accuracy ± 0.1 ± 1.0 25 25 25 0 to 7 ± 15 0 to 4 0 to 4 ±6 6.4 8 ± 15 9.6 ± 0.5 6.4 8 ± 15 9.6 ± 0.2 6.4 8 % of Reading % of Reading ± 15 V rms V p-p ±6 V rms V p-p ± 15 9.6 ± 0.5 V p-p kΩ mV 0 to 4 ±6 mV ± % of Reading mV ± % of Reading µV/V µV/V % of Reading % of FSR % of FSR mV ± % of Reading ms/µF CAV 0 to 7 ± 15 Unit 2 1 0.5 6 0.7 150 300 0.25 0.04 0.05 ± 0.5 ± 0.1 Specified Accuracy ± 0.1 ± 1.0 0 to 7 11 66 200 11 66 200 11 66 200 kHz kHz kHz 150 1 8 150 1 8 150 1 8 kHz MHz MHz ± 0.05 1 0.089 ± 0.04 0.5 0.056 ± 0.04 1 0.07 mV mV/°C 0 to 12.0 13.5 0 to 12.0 13.5 0 to 12.0 13.5 V 0 to 2 6 2.2 0 to 2 6 2.2 0 to 2 6 2.2 dB OUTPUT Error, VIN 7 mV to 7 V rms, 0 dB = 1 V rms Scale Factor Scale Factor Temperature Coefficient BUFFER AMPLIFIER Input Output Voltage Range Input Offset Voltage Input Current Input Resistance Output Current Short Circuit Current Small Signal Bandwidth Slew Rate5 VOUT = avg × (VIN ) 2 AD637S Typ Min Specified Accuracy ± 0.1 ± 1.0 FREQUENCY RESPONSE4 Bandwidth for 1% Additional Error (0.09 dB) VIN = 20 mV VIN = 200 mV VIN = 2 V ± 3 dB Bandwidth VIN = 20 mV VIN = 200 mV VIN = 2 V IREF for 0 dB = 1 V rms IREF Range Max 30 100 AVERAGING TIME CONSTANT OUTPUT CHARACTERISTICS Offset Voltage vs. Temperature Voltage Swing, ± 15 V Supply, 2 kΩ Load Voltage Swing, ± 3 V Supply, 2 kΩ Load Output Current Short Circuit Current Resistance, Chip Select “High” Resistance, Chip Select “Low” AD637K/B Typ Min 30 100 ± 0.5 ± 0.1 ERROR VS. CREST FACTOR3 Crest Factor 1 to 2 Crest Factor = 3 Crest Factor = 10 INPUT CHARACTERISTICS Signal Range, ± 15 V Supply Continuous RMS Level Peak Transient Input Signal Range, ± 5 V Supply Continuous rms Level Peak Transient Input Maximum Continuous Nondestructive Input Level (All Supply Voltages) Input Resistance Input Offset Voltage Max 5 1 20 0.5 100 20 0.5 100 20 0.5 100 V mA mA Ω kΩ ± 0.5 ± 0.3 ± 0.5 dB –3 +0.33 –0.033 20 –3 +0.33 –0.033 20 –3 +0.33 –0.033 20 mV/dB % of Reading/°C dB/°C µA µA –VS to (+VS – 2.5 V) ± 0.8 ±2 108 (+5 mA, –130 µA) 20 1 5 20 0 to 10 25 ± 0.2 80 100 2 10 30 ± 0.5 5 1 –VS to (+VS – 2.5 V) ± 0.5 ±2 108 (+5 mA, –130 µA) 20 1 5 0 to 10 25 ± 0.2 20 –2– 80 100 1 5 30 ± 0.5 5 1 80 100 –VS to (+VS – 2.5 V) ± 0.8 2 ±2 10 8 10 (+5 mA, –130 µA) 20 1 5 20 0 to 10 25 ± 0.2 30 ± 0.5 V mV nA Ω mA MHz V/µs V kΩ mV REV. F AD637 Model CHIP SELECT PROVISION (CS) RMS “ON” Level RMS “OFF” Level IOUT of Chip Select CS “Low” CS “High” On Time Constant Off Time Constant POWER SUPPLY Operating Voltage Range Quiescent Current Standby Current TRANSISTOR COUNT Min AD637J/A Typ Max AD637K/B Min Typ AD637S Max Min Typ Max Open or 2.4 V < VC < +VS VC < 0.2 V VC < 0.2 V Open or 2.4 V < VC < +VS VC < 0.2 V Open or 2.4 V < VC < +VS 10 Zero 10 µs + ((25 kΩ) ⫻ CAV) 10 µs + ((25 kΩ) ⫻ CAV) 10 Zero 10 µs + ((25 kΩ) ⫻ CAV) 10 µs + ((25 kΩ) ⫻ CAV) 10 Zero 10 µs + ((25 kΩ) ⫻ CAV) 10 µs + ((25 kΩ) ⫻ CAV) ± 3.0 2.2 350 18 3 450 3.0 2.2 350 107 107 18 3 450 3.0 2.2 350 Unit µA 18 3 450 V mA µA 107 NOTES 1 Accuracy specified 0–7 V rms dc with AD637 connected as shown in Figure 2. 2 Nonlinearity is defined as the maximum deviation from the straight line connecting the readings at 10 mV and 2 V. 3 Error vs. crest factor is specified as additional error for 1 V rms. 4 Input voltages are expressed in volts rms. % are in % of reading. 5 With external 2 kΩ pull-down resistor tied to –VS. Specifications shown in bold are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units. Specifications subject to change without notice. REV. F –3– AD637 ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 V Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V dc Internal Quiescent Power Dissipation . . . . . . . . . . . . 108 mW Output Short Circuit Duration . . . . . . . . . . . . . . . . . Indefinite Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C Lead Temperature Range (Soldering 10 secs) . . . . . . . . 300°C Rated Operating Temperature Range AD637J, K . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C AD637A, B . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C AD637S, 5962-8963701CA . . . . . . . . . . . –55°C to +125°C Model Temperature Range Package Description Package Option AD637AR AD637BR AD637AQ AD637BQ AD637JD AD637JD/+ AD637KD AD637KD/+ AD637JQ AD637KQ AD637JR AD637JR-REEL AD637JR-REEL7 AD637KR AD637SD AD637SD/883B AD637SQ/883B AD637SCHIPS 5962-8963701CA* – 40°C to +85°C –40°C to +85°C – 40°C to +85°C – 40°C to +85°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C –55°C to +125°C SOIC SOIC Cerdip Cerdip Side Brazed Ceramic DIP Side Brazed Ceramic DIP Side Brazed Ceramic DIP Side Brazed Ceramic DIP Cerdip Cerdip SOIC SOIC SOIC SOIC Side Brazed Ceramic DIP Side Brazed Ceramic DIP Cerdip Die Cerdip R-16 R-16 Q-14 Q-14 D-14 D-14 D-14 D-14 Q-14 Q-14 R-16 R-16 R-16 R-16 D-14 D-14 Q-14 Q-14 *A standard microcircuit drawing is available. FILTER/AMPLIFIER BUFF OUT ONE QUADRANT SQUARER/DIVIDER BUFF IN CAV 24k +VS BUFFER AMPLIFIER A5 RMS OUT A4 I4 dB OUT I1 24k COM Q4 Q1 ABSOLUTE VALUE VOLTAGE – CURRENT CONVERTER 6k Q5 Q2 6k Q3 BIAS I3 A3 24k A2 12k 125 VIN CS DEN INPUT OUTPUT OFFSET AD637 A1 –VS Figure 1. Simplified Schematic CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD637 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. –4– WARNING! ESD SENSITIVE DEVICE REV. F AD637 PIN CONFIGURATIONS 14-Lead DIP 16-Lead SOIC 14 BUFF IN 1 BUFF OUT NC 2 13 VIN COMMON 3 12 NC AD637 DEN INPUT dB OUTPUT 7 9 8 15 VIN COMMON 3 14 NC OUTPUT OFFSET 4 4 6 16 2 NC TOP VIEW 11 +VS (Not to Scale) 10 –V CS 5 S OUTPUT OFFSET BUFF IN 1 CS RMS OUT NC = NO CONNECT AD637 13 +VS TOP VIEW (Not to Scale) 12 –VS DEN INPUT 6 11 7 10 CAV NC 8 9 NC dB OUTPUT CAV 5 BUFF OUT RMS OUT NC = NO CONNECT PIN FUNCTION DESCRIPTIONS 14-Lead DIP 16-Lead SOIC Pin No. Mnemonic Description Pin No. Mnemonic Description 1 2, 12 3 4 5 6 7 8 BUFF IN NC COMMON OUTPUT OFFSET CS DEN INPUT dB OUTPUT CAV 1 2, 8, 9, 14 3 4 5 6 7 10 BUFF IN NC COMMON OUTPUT OFFSET CS DEN INPUT dB OUTPUT CAV 9 10 RMS OUT –VS 11 12 RMS OUT –VS 11 13 14 +VS VIN BUFF OUT Buffer Input No Connection Analog Common Output Offset Chip Select Denominator Input dB Output Averaging Capacitor Connection rms Output Negative Supply Rail Positive Supply Rail Signal Input Buffer Output 13 15 16 +VS VIN BUFF OUT Buffer Input No Connection Analog Common Output Offset Chip Select Denominator Input dB Output Averaging Capacitor Connection rms Output Negative Supply Rail Positive Supply Rail Signal Input Buffer Output REV. F –5– AD637 FUNCTIONAL DESCRIPTION STANDARD CONNECTION The AD637 embodies an implicit solution of the rms equation that overcomes the inherent limitations of straightforward rms computation. The actual computation performed by the AD637 follows the equation The AD637 is simple to connect for a majority of rms measurements. In the standard rms connection shown in Figure 2, only a single external capacitor is required to set the averaging time constant. In this configuration, the AD637 will compute the true rms of any input signal. An averaging error, the magnitude of which will be dependent on the value of the averaging capacitor, will be present at low frequencies. For example, if the filter capacitor, CAV, is 4 µF, this error will be 0.1% at 10 Hz and increases to 1% at 3 Hz. If it is desired to measure only ac signals, the AD637 can be ac coupled through the addition of a nonpolar capacitor in series with the input as shown in Figure 2. V 2 V rms = Avg IN V rms Figure 1 is a simplified schematic of the AD637, subdivided into four major sections: absolute value circuit (active rectifier), square/divider, filter circuit, and buffer amplifier. The input voltage VIN, which can be ac or dc, is converted to a unipolar current I1 by the active rectifier A1, A2. I1 drives one input of the squarer/divider, which has the transfer function BUFFER AD637 1 2 I I4 = 1 I3 14 NC ABSOLUTE VALUE 2 The output current of the squarer/divider I4 drives A4, which forms a low-pass filter with the external averaging capacitor. If the RC time constant of the filter is much greater than the longest period of the input signal, then A4’s output will be proportional to the average of I4. The output of this filter amplifier is used by A3 to provide the denominator current I3, which equals Avg. I4 and is returned to the squarer/divider to complete the implicit rms computation 3 12 BIAS SECTION 4 SQUARER/DIVIDER OPTIONAL AC COUPLING CAPACITOR VIN 13 NC 11 +VS 10 –VS 25k 5 25k 6 VO = 9 VIN2 CAV FILTER 7 I I 4 = Avg 1 = I1 rms I4 8 2 NC = NO CONNECT Figure 2. Standard RMS Connection and The performance of the AD637 is tolerant of minor variations in the power supply voltages; however, if the supplies being used exhibit a considerable amount of high frequency ripple it is advisable to bypass both supplies to ground through a 0.1 µF ceramic disc capacitor placed as close to the device as possible. VOUT = VIN rms If the averaging capacitor is omitted, the AD637 will compute the absolute value of the input signal. A nominal 5 pF capacitor should be used to ensure stability. The circuit operates identically to that of the rms configuration except that I3 is now equal to I4, giving The output signal range of the AD637 is a function of the supply voltages, as shown in Figure 3. The output signal can be used buffered or nonbuffered depending on the characteristics of the load. If no buffer is needed, tie the buffer input (Pin 1) to common. The output of the AD637 is capable of driving 5 mA into a 2 kΩ load without degrading the accuracy of the device. I2 I4 = 1 I4 I 4 = I1 The denominator current can also be supplied externally by providing a reference voltage, VREF, to Pin 6. The circuit operates identically to the rms case except that I3 is now proportional to VREF. Thus: I12 I3 MAX VOUT – Volts 2k Load I 4 = Avg 20 and 2 VO = VIN VDEN 15 10 5 This is the mean square of the input signal. 0 0 3 5 10 15 SUPPLY VOLTAGE – DUAL SUPPLY – V 18 Figure 3. AD637 Max VOUT vs. Supply Voltage –6– REV. F AD637 CHIP SELECT BUFFER The AD637 includes a chip select feature that allows the user to decrease the quiescent current of the device from 2.2 mA to 350 µA. This is done by driving the CS, Pin 5, to below 0.2 V dc. Under these conditions, the output will go into a high impedance state. In addition to lowering power consumption, this feature permits bussing the outputs of a number of AD637s to form a wide bandwidth rms multiplexer. If the chip select is not being used, Pin 5 should be tied high. R4 147 OUTPUT R1 OFFSET 50k ADJUST R2 1M 13 VIN 12 BIAS SECTION –VS 4 SQUARER/DIVIDER 11 +VS 10 –VS 25k 5 25k 9 6 FILTER 7 + 8 CAV V rms OUT R3 1k SCALE FACTOR ADJUST, 2% l. Ground the input signal, VIN, and adjust R1 to give 0 V output from Pin 9. Alternatively R1 can be adjusted to give the correct output with the lowest expected value of VIN. Figure 5. Optional External Gain and Offset Trims CHOOSING THE AVERAGING TIME CONSTANT The AD637 will compute the true rms value of both dc and ac input signals. At dc the output will track the absolute value of the input exactly; with ac signals the AD637’s output will approach the true rms value of the input. The deviation from the ideal rms value is due to an averaging error. The averaging error is comprised of an ac and dc component. Both components are functions of input signal frequency f and the averaging time constant τ (τ: 25 ms/µF of averaging capacitance). As shown in Figure 6, the averaging error is defined as the peak value of the ac component, ripple, plus the value of the dc error. 2. Connect the desired full-scale input to VIN, using either a dc or a calibrated ac signal, and trim R3 to give the correct output at Pin 9, i.e., 1 V dc should give l.000 V dc output. Of course, a 2 V peak-to-peak sine wave should give 0.707 V dc output. Remaining errors are due to the nonlinearity. 5.0 AD637K MAX ERROR – mV ABSOLUTE VALUE 3 +VS The AD637 includes provisions to allow the user to trim out both output offset and scale factor errors. These trims will result in significant reduction in the maximum total error as shown in Figure 4. This remaining error is due to a nontrimmable input offset in the absolute value circuit and the irreducible nonlinearity of the device. The trimming procedure on the AD637 is as follows: INTERNAL TRIM The peak value of the ac ripple component of the averaging error is defined approximately by the relationship: 50 in % of reading where (t > 1/f) 6.3 τf AD637K EXTERNAL TRIM 0 14 2 OPTIONAL TRIMS FOR HIGH ACCURACY 2.5 AD637 1 EO IDEAL EO 2.5 AD637K: 0.5mV 0.2% 0.25mV 0.05% EXTERNAL 5.0 0 0.5 1.0 INPUT LEVEL – V DC ERROR = AVERAGE OF OUTPUT – IDEAL 1.5 2.0 AVERAGE ERROR DOUBLE-FREQUENCY RIPPLE Figure 4. Max Total Error vs. Input Level AD637K Internal and External Trims TIME Figure 6. Typical Output Waveform for a Sinusoidal Input This ripple can add a significant amount of uncertainty to the accuracy of the measurement being made. The uncertainty can be significantly reduced through the use of a post filtering network or by increasing the value of the averaging capacitor. The dc error appears as a frequency dependent offset at the output of the AD637 and follows the equation: 1 in % of reading 0.16 + 6.4τ 2 f 2 Since the averaging time constant, set by CAV, directly sets the time that the rms converter “holds” the input signal during computation, the magnitude of the dc error is determined only by CAV and will not be affected by post filtering. REV. F –7– AD637 Figure 9b shows the relationship between averaging error, signal frequency settling time, and averaging capacitor value. This graph is drawn for filter capacitor values of 3.3 times the averaging capacitor value. This ratio sets the magnitude of the ac and dc errors equal at 50 Hz. As an example, by using a 1 µF averaging capacitor and a 3.3 µF filter capacitor, the ripple for a 60 Hz input signal will be reduced from 5.3% of reading using the averaging capacitor alone to 0.15% using the single pole filter. This gives a factor of thirty reduction in ripple and yet the settling time would only increase by a factor of three. The values of CAV and C2, the filter capacitor, can be calculated for the desired value of averaging error and settling time by using Figure 9b. 10 PEAK RIPPLE 1.0 DC ERROR The symmetry of the input signal also has an effect on the magnitude of the averaging error. Table I gives practical component values for various types of 60 Hz input signals. These capacitor values can be directly scaled for frequencies other than 60 Hz; i.e., for 30 Hz double these values, for 120 Hz they are halved. 10k Figure 7. Comparison of Percent DC Error to the Percent Peak Ripple over Frequency Using the AD637 in the Standard RMS Connection with a 1 × µ F CAV For applications that are extremely sensitive to ripple, the two pole configuration is suggested. This configuration will minimize capacitor values and settling time while maximizing performance. The ac ripple component of averaging error can be greatly reduced by increasing the value of the averaging capacitor. There are two major disadvantages to this: first, the value of the averaging capacitor will become extremely large, and second, the settling time of the AD637 increases in direct proportion to the value of the averaging capacitor (Ts = 115 ms/µF of averaging capacitance). A preferable method of reducing the ripple is through the use of the post filter network, shown in Figure 8. This network can be used in either a one or two pole configuration. For most applications the single pole filter will give the best overall compromise between ripple and settling time. % 01 0. 0.1 *%dc ERROR + %RIPPLE (Peak) 0.01 10 –VS 100 1k INPUT FREQUENCY – Hz 10k 0.01 100k Figure 9a. 25k 9 FILTER 8 + 100 CAV 24k NC = NO CONNECT R O R R ER O R % 01 R ER 0. O R R ER RO ER Figure 9a shows values of CAV and the corresponding averaging error as a function of sine-wave frequency for the standard rms connection. The 1% settling time is shown on the right side of the graph. 10 *%dc ERROR + % PEAK RIPPLE ACCURACY 20% DUE TO COMPONENT TOLERANCE 1.0 1.0 5% Figure 8. Two Pole Sallen-Key Filter 10 1% 0. FOR 1 POLE FILTER, SHORT Rx AND REMOVE C3 100 VALUES OF CAV, C2 AND 1% SETTLING TIME FOR STATED % OF READING AVERAGING ERROR* FOR 1 POLE POST FILTER 1% REQUIRED CAV (AND C2) C2 = 3.3 CAV 7 1.0 VALUES FOR CAV AND 1% SETTLING TIME 0.1 FOR STATED % OF READING AVERAGING ERROR* ACCURACY 2% DUE TO COMPONENT TOLERANCE 1 10 R O R ER +VS 11 R O R ER C3 1.0 25k Rx 24k + C2 SQUARER/DIVIDER 1% 0. 4 CHIP SELECT 5 dB + 12 NC BIAS SECTION DENOMINATOR 6 INPUT SIGNAL INPUT 13 R O R ER OUTPUT OFFSET 3 RMS OUTPUT 10 R O R ER ABSOLUTE VALUE BUFFER OUTPUT 10 1% 14 NC 2 ANALOG COM AD637 1 100 100 % 10 BUFFER BUFFER INPUT Figure 9c can be used to determine the required value of CAV, C2, and C3 for the desired level of ripple and settling time. FOR 1% SETTLING TIME IN SECONDS MULTIPLY READING BY 0.115 100 1k SINEWAVE INPUT FREQUENCY – Hz 0.1 0.1 0.01 1 10 100 1k INPUT FREQUENCY – Hz 10k FOR 1% SETTLING TIME IN SECONDS MULTIPLY READING BY 0.400 0.1 10 REQUIRED CAV – F DC ERROR OR RIPPLE % OF READING 100 0.01 100k Figure 9b. –8– REV. F AD637 100 VALUES OF CAV, C2 AND C3 AND 1% SETTLING TIME FOR STATED % OF READING AVERAGING ERROR* 2 POLL SALLEN-KEY FILTER 10 R O R R ER O % R 01 R ER 0. O R R ER RO ER 1.0 1% 0. 1.0 5% 0.1 0.01 1 10 0.1 100 1k INPUT FREQUENCY – Hz 1V RMS INPUT 1 1% 10% 3dB 100mV RMS INPUT 0.1 0.01 100mV RMS INPUT 1k 0.01 100k 10k 7V RMS INPUT 2V RMS INPUT VOUT – V *%dc ERROR + % PEAK RIPPLE ACCURACY 20% DUE TO COMPONENT TOLERANCE 10 FOR 1% SETTLING TIME IN SECONDS MULTIPLY READING BY 0.365 10 1% REQUIRED CAV (AND C2 + C3) C2 = C3 = 2.2 CAV 100 10k 100k 1M INPUT FREQUENCY – Hz 10M Figure 10. Frequency Response Figure 9c. AC MEASUREMENT ACCURACY AND CREST FACTOR Table I. Practical Values of CAV and C2 for Various Input Waveforms Input Waveform and Period Absolute Value Circuit Waveform and Period Crest factor is often overlooked in determining the accuracy of an ac measurement. Crest factor is defined as the ratio of the peak signal amplitude to the rms value of the signal (CF = Vp/V rms). Most common waveforms, such as sine and triangle waves, have relatively low crest factors (≤2). Waveforms that resemble low duty cycle pulse trains, such as those occurring in switching power supplies and SCR circuits, have high crest factors. For example, a rectangular pulse train with a 1% duty Recommended CAV and C2 Values for 1% Averaging Minimum R CAV Error@60Hz with T = 16.6ms 1% Recommended Recommended Settling Time Standard Time Constant Standard Value C Value C2 AV 1/2T T A 1/2T 0V 0.47F 1.5F 181ms cycle has a crest factor of 10 (CF = 1 η ). Symmetrical Sine Wave T T B T 0.82F 2.7F T 325ms 0V 0 Sine Wave with dc Offset T C Vp T T2 100F T2 0V 10(T – T2) 6.8F 22F 2.67sec = DUTY CYCLE = e0 CF = 1/ 100s T eIN(RMS) = 1 V RMS 10 Pulse Train Waveform CAV = 22F D T2 T2 10(T – 2T2) 5.6F 18F INCREASE IN ERROR – % T T 2.17sec 0V FREQUENCY RESPONSE The frequency response of the AD637 at various signal levels is shown in Figure 10. The dashed lines show the upper frequency limits for 1%, 10%, and ± 3 dB of additional error. For example, note that for 1% additional error with a 2 V rms input the highest frequency allowable is 200 kHz. A 200 mV signal can be measured with 1% error at signal frequencies up to 100 kHz. CF = 10 0.1 CF = 3 0.01 To take full advantage of the wide bandwidth of the AD637, care must be taken in the selection of the input buffer amplifier. To ensure that the input signal is accurately presented to the converter, the input buffer must have a –3 dB bandwidth that is wider than that of the AD637. A point that should not be overlooked is the importance of slew rate in this application. For example, the minimum slew rate required for a 1 V rms 5 MHz sine-wave input signal is 44 V/µs. The user is cautioned that this is the minimum rising or falling slew rate and that care must be exercised in the selection of the buffer amplifier, as some amplifiers exhibit a two-to-one difference between rising and falling slew rates. The AD845 is recommended as a precision input buffer. REV. F 1.0 1 10 100 PULSEWIDTH – s 1000 Figure 11. AD637 Error vs. Pulsewidth Rectangular Pulse –9– AD637 Figure 12 is a curve of additional reading error for the AD637 for a 1 volt rms input signal with crest factors from 1 to 11. A rectangular pulse train (pulsewidth 100 µs) was used for this test since it is the worst-case waveform for rms measurement (all the energy is contained in the peaks). The duty cycle and peak amplitude were varied to produce crest factors from l to 10 while maintaining a constant 1 V rms input amplitude. MAGNITUDE OF ERROR – % of rms Level 2.0 1.5 INCREASE IN ERROR – % 1.0 1.8 1.6 1.4 1.2 CF = 10 1.0 0.8 CF = 7 0.6 0.4 0.2 CF = 3 0.5 0.0 0.5 0 1.0 VIN – V rms 0 2.0 Figure 13. Error vs. RMS Input Level for Three Common Crest Factors –0.5 POSITIVE INPUT PULSE CAV = 22F CONNECTION FOR dB OUTPUT –1.0 –1.5 1 1.5 2 3 4 5 6 7 CREST FACTOR 8 9 10 Another feature of the AD637 is the logarithmic, or decibel, output. The internal circuit that computes dB works well over a 60 dB range. The connection for dB measurement is shown in Figure 14. The user selects the 0 dB level by setting R1 for the proper 0 dB reference current (which is set to exactly cancel the log output current from the squarer/divider circuit at the desired 0 dB point). The external op amp is used to provide a more convenient scale and to allow compensation of the +0.33%/°C temperature drift of the dB circuit. The special T.C. resistor R3 is available from Tel Labs in Londonderry, NH (model Q-81) and from Precision Resistor Inc., Hillside, NJ (model PT146). 11 Figure 12. Additional Error vs. Crest Factor R2 33.2k SIGNAL INPUT dB SCALE FACTOR ADJUST 5k +VS BUFFER BUFFER INPUT 14 ABSOLUTE VALUE NC 2 ANALOG COM OUTPUT OFFSET 3 4 DENOMINATOR 6 INPUT 13 R3 60.4 BUFFER OUTPUT SIGNAL INPUT * 1k 12 NC BIAS SECTION SQUARER/DIVIDER AD707JN COMPENSATED dB OUTPUT + 100mV/dB –VS 11 +VS 25k CHIP SELECT 5 dB AD637 1 10 –VS RMS OUTPUT 25k 9 FILTER 7 8 + 1F CAV 10k +VS R1 500k +2.5 VOLTS * 1k + 3500ppm TC RESISTOR TEL LAB Q81 PRECISION RESISTOR PT146 OR EQUIVALENT NC = NO CONNECT AD508J 0dB ADJUST Figure 14. dB Connection –10– REV. F AD637 +VS 1F NOTE: VALUES CHOSEN TO GIVE 0.1% AVERAGING ERROR @ 1Hz BUFFER 3.3M ABSOLUTE VALUE –VS SIGNAL INPUT 13 3 6.8M 12 NC BIAS SECTION 1M FILTERED V RMS OUTPUT 14 NC 2 OUTPUT OFFSET 50k ADJUST AD548JN 1F AD637 1 +VS 3.3M 4 1000pF SQUARER/DIVIDER 11 +VS 10 –VS 25k 5 –VS 25k 9 6 FILTER 7 499k CAV1 3.3F NC = NO CONNECT 8 + 100F VIN2 V rms CAV 1% R Figure 15. AD637 as a Low Frequency RMS Converter dB CALIBRATION VECTOR SUMMATION 1. 2. 3. 4. Vector summation can be accomplished through the use of two AD637s as shown in Figure 16. Here the averaging capacitors are omitted (nominal 100 pF capacitors are used to ensure stability of the filter amplifier), and the outputs are summed as shown. The output of the circuit is Set VIN = 1.00 V dc or 1.00 V rms Adjust R1 for 0 dB out = 0.00 V Set VIN = 0.1 V dc or 0.10 V rms Adjust R2 for dB out = – 2.00 V Any other dB reference can be used by setting VIN and R1 accordingly. VO = VX 2 + VY 2 LOW-FREQUENCY MEASUREMENTS If the frequencies of the signals to be measured are below 10 Hz, the value of the averaging capacitor required to deliver even 1% averaging error in the standard rms connection becomes extremely large. The circuit shown in Figure 15 shows an alternative method of obtaining low-frequency rms measurements. The averaging time constant is determined by the product of R and CAV1, in this circuit 0.5 s/µF of CAV. This circuit permits a 20:1 reduction in the value of the averaging capacitor, permitting the use of high quality tantalum capacitors. It is suggested that the two pole Sallen-Key filter shown in the diagram be used to obtain a low ripple level and minimize the value of the averaging capacitor. If the frequency of interest is below 1 Hz, or if the value of the averaging capacitor is still too large, the 20:1 ratio can be increased. This is accomplished by increasing the value of R. If this is done, it is suggested that a low input current, low offset voltage amplifier such as the AD548 be used instead of the internal buffer amplifier. This is necessary to minimize the offset error introduced by the combination of amplifier input currents and the larger resistance. REV. F This concept can be expanded to include additional terms by feeding the signal from Pin 9 of each additional AD637 through a 10 kΩ resistor to the summing junction of the AD711 and tying all of the denominator inputs (Pin 6) together. If CAV is added to IC1 in this configuration, the output is VX 2 + VY 2 . If the averaging capacitor is included on both IC1 and IC2, the output will be VX 2 + VY 2 . This circuit has a dynamic range of 10 V to 10 mV and is limited only by the 0.5 mV offset voltage of the AD637. The useful bandwidth is 100 kHz. –11– AD637 EXPANDABLE BUFFER IC1 AD637 1 14 ABSOLUTE VALUE 2 3 13 VX IN 12 BIAS SECTION 4 SQUARER/DIVIDER 11 +VS 10 –VS 25k 5 25k 9 6 100pF FILTER 7 8 5pF 10k 10k BUFFER IC2 AD637 1 14 ABSOLUTE VALUE 2 3 13 AD711K VYIN 12 BIAS SECTION 4 SQUARER/DIVIDER 10k 11 +VS 10 –VS 20k 25k 5 25k 9 6 100pF 7 FILTER 8 VOUT = VX2 + VY2 Figure 16. Vector Sum Configuration –12– REV. F AD637 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). TO-116 Package (D-14) 0.005 (0.13) MIN Cerdip Package (Q-14) 0.005 (0.13) MIN 0.098 (2.49) MAX 14 8 0.098 (2.49) MAX 14 8 0.310 (7.87) 0.220 (5.59) 1 1 7 PIN 1 0.785 (19.94) MAX 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.310 (7.87) 0.220 (5.59) 0.320 (8.13) 0.290 (7.37) 0.060 (1.52) 0.015 (0.38) 7 PIN 1 0.785 (19.94) MAX 0.200 (5.08) MAX 0.150 (3.81) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.015 (0.38) 0.008 (0.20) 0.100 0.070 (1.78) SEATING (2.54) 0.030 (0.76) PLANE BSC 0.150 (3.81) MIN 0.100 0.070 (1.78) SEATING (2.54) 0.030 (0.76) PLANE BSC SOIC Package (R-16) 0.4133 (10.50) 0.3977 (10.00) 16 9 0.2992 (7.60) 0.2914 (7.40) 1 PIN 1 0.050 (1.27) BSC 0.0118 (0.30) 0.0040 (0.10) REV. F 0.4193 (10.65) 0.3937 (10.00) 8 0.1043 (2.65) 0.0926 (2.35) 8 0.0192 (0.49) SEATING 0 0.0125 (0.32) 0.0138 (0.35) PLANE 0.0091 (0.23) –13– 0.060 (1.52) 0.015 (0.38) 0.0291 (0.74) 45 0.0098 (0.25) 0.0500 (1.27) 0.0157 (0.40) 0.320 (8.13) 0.290 (7.37) 15° 0° 0.015 (0.38) 0.008 (0.20) AD637 Revision History Location Page Data Sheet changed from REV. E to REV. F. Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 –14– REV. F –15– –16– PRINTED IN U.S.A. C00788–0–3/02(F)