81 GHz to 86 GHz, E-Band Power Amplifier With Power Detector HMC8142 Data Sheet FEATURES GENERAL DESCRIPTION Gain: 21 dB typical Output power for 1 dB compression (P1dB): 25 dBm typical Saturated output power (PSAT): 26 dBm typical Output third-order intercept (OIP3): 29 dBm typical Input return loss: 12 dB typical Output return loss: 8 dB typical DC supply: 4 V at 450 mA No external matching required Die size: 3.039 mm × 1.999 mm × 0.05 mm The HMC8142 is an integrated E-band gallium arsenide (GaAs), pseudomorphic high electron mobility transistor (pHEMT), monolithic microwave integrated circuit (MMIC), medium power amplifier with a temperature compensated on-chip power detector that operates from 81 GHz to 86 GHz. The HMC8142 provides 21 dB of gain, 25 dBm of output power at 1 dB compression, 29 dBm of output third-order intercept, and 26 dBm of saturated output power at 20% power added efficiency (PAE) from a 4 V power supply. The HMC8142 exhibits excellent linearity and is optimized for E-band communications and high capacity wireless backhaul radio systems. The amplifier configuration and high gain make it an excellent candidate for last stage signal amplification before the antenna. All data is taken with the chip in a 50 Ω test fixture connected via a 3 mil wide × 0. 5 mil thick × 7 mil long ribbon on each port. APPLICATIONS E-band communication systems High capacity wireless backhaul radio systems Test and measurement FUNCTIONAL BLOCK DIAGRAM 4 5 6 7 VDD1 8 9 10 VDD3 VDD2 11 VDD4 HMC8142 12 3 RFOUT 2 13 1 14 VGG1 25 24 VGG2 23 22 VGG3 21 20 VGG4 19 18 VREF 17 VDET 16 15 13425-001 RFIN Figure 1. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com HMC8142 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 12 Applications ....................................................................................... 1 Applications Information .............................................................. 13 General Description ......................................................................... 1 Typical Application Circuit ....................................................... 13 Functional Block Diagram .............................................................. 1 Assembly Diagram ..................................................................... 14 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Mounting and Bonding Techniques for Millimeterwave GaAs MMICs .................................................................................. 15 Absolute Maximum Ratings ............................................................ 4 Handling Precautions ................................................................ 15 Thermal Resistance ...................................................................... 4 Mounting ..................................................................................... 15 ESD Caution .................................................................................. 4 Wire Bonding .............................................................................. 15 Pin Configuration and Function Descriptions ............................. 5 Outline Dimensions ....................................................................... 16 Interface Schematics..................................................................... 6 Ordering Guide .......................................................................... 16 Typical Performance Characteristics ............................................. 7 REVISION HISTORY 2/16—Revision A: Initial Version Rev. A | Page 2 of 16 Data Sheet HMC8142 SPECIFICATIONS TA = 25°C, VDDx = 4 V, IDD = 450 mA, unless otherwise noted. Table 1. Parameter OPERATING CONDITIONS Radio Frequency (RF) Range PERFORMANCE Gain Gain Variation over Temperature Output Power for 1 dB Compression (P1dB) Saturated Output Power (PSAT) Output Third-Order Intercept (OIP3) at Maximum Gain 1 Input Return Loss Output Return Loss POWER SUPPLY Total Supply Current (IDD) 2 1 2 Min Typ 81 19 22.5 Data taken at output power (POUT) = 12 dBm/tone, 1 MHz spacing. Adjust VGGx from −2 V to 0 V to achieve the total drain current, IDD = 450 mA. Rev. A | Page 3 of 16 Max Unit 86 GHz 21 0.02 25 26 29 12 8 dB dB/°C dBm dBm dBm dB dB 450 mA HMC8142 Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter Drain Bias Voltage (VDD1 to VDD4) Gate Bias Voltage (VGG1 to VGG4) Maximum Junction Temperature (to Maintain 1 Million Hours Mean Time to Failure (MTTF)) Storage Temperature Range Operating Temperature Range Rating 4.5 V −3 V to 0 V 175°C Table 3. Thermal Resistance −65°C to +150°C −55°C to +85°C ESD CAUTION Package Type 25-Pad Bare Die [CHIP] 1 θJC1 48.33 Based on ABLETHERM® 2600BT as die attach epoxy with thermal conductivity of 20 W/mK. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. A | Page 4 of 16 Unit °C/W Data Sheet HMC8142 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 5 GND VDD1 3 GND 2 RFIN 1 GND 6 GND 7 8 9 10 11 VDD2 GND VDD3 GND VDD4 GND HMC8142 RFOUT TOP VIEW (Not to Scale) GND GND VGG1 GND VGG2 GND VGG3 GND VGG4 GND VREF VDET 25 24 23 22 21 20 19 18 17 16 15 12 13 14 13425-002 4 Figure 2. Pad Configuration Table 4. Pad Function Descriptions Pad No. 1, 3, 4, 6, 8, 10, 12, 14, 17, 19, 21, 23, 25 2 5, 7, 9, 11 13 15 Mnemonic GND Description Ground Connection (See Figure 3). RFIN VDD1 to VDD4 RFOUT VDET 16 VREF 18, 20, 22, 24 VGG4 to VGG1 Die Bottom GND RF Input. AC couple RFIN and match it to 50 Ω (See Figure 4). Drain Bias Voltage for the Power Amplifier (See Figure 5). RF Output. AC couple RFOUT and match it to 50 Ω (see Figure 6). Detector Voltage for the Power Detector (See Figure 7). VDET is the dc voltage representing the RF output power rectified by the diode, which is biased through an external resistor. Refer to the typical application circuit for the required external components (see Figure 40). Reference Voltage for the Power Detector (See Figure 7). VREF is the dc bias of diode biased through an external resistor used for the temperature compensation of VDET. Refer to the typical application circuit for the required external components (see Figure 40). Gate Bias Voltage for the Power Amplifier (See Figure 8). Refer to the typical application circuit for the required external components (see Figure 40). Ground. The die bottom must be connected to the RF/dc ground (see Figure 3). Rev. A | Page 5 of 16 HMC8142 Data Sheet Figure 6. RFOUT Interface 13425-004 RFIN 13425-006 RFOUT Figure 3. GND Interface VREF, VDET 13425-007 GND 13425-003 INTERFACE SCHEMATICS Figure 7. VDET, VREF Interface Figure 4. RFIN Interface VGG4 TO VGG1 Figure 5. VDD1 to VDD4 Interface 13425-008 13425-005 VDD1 TO VDD4 Figure 8. VGG4 to VGG1 Interface Rev. A | Page 6 of 16 Data Sheet HMC8142 TYPICAL PERFORMANCE CHARACTERISTICS 30 25 25 24 20 23 22 5 0 21 20 19 –5 18 –10 17 –15 16 80 81 82 83 84 85 86 87 88 FREQUENCY (GHz) 15 81.0 83.5 84.0 84.5 85.0 85.5 86.0 –9 21 20 19 18 –11 –13 –15 –17 –19 17 –21 16 –23 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0 FREQUENCY (GHz) –25 81.0 13425-010 82.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0 FREQUENCY (GHz) Figure 10. Gain vs. Frequency at Various Drain Currents (IDD) 13425-013 RETURN LOSS (dB) 22 81.5 TA = +85°C TA = +25°C TA = –55°C –7 IDD = 350mA IDD = 400mA IDD = 450mA 23 GAIN (dB) 83.0 –5 24 Figure 13. Input Return Loss vs. Frequency at Various Temperatures, Drain Current (IDD) = 450 mA –44 –2 –46 –4 –48 –6 –50 ISOLATION (dB) 0 –8 –10 –12 –14 TA = +85°C TA = +25°C TA = –55°C –52 –54 –56 –58 TA = +85°C TA = +25°C TA = –55°C –16 –18 81.5 82.0 82.5 83.0 –60 –62 83.5 84.0 FREQUENCY (GHz) 84.5 85.0 85.5 86.0 13425-011 RETURN LOSS (dB) 82.5 Figure 12. Gain vs. Frequency at Various Temperatures, Drain Current (IDD) = 450 mA 25 –20 81.0 82.0 FREQUENCY (GHz) Figure 9. Broadband Gain and Return Loss Response vs. Frequency, Drain Current (IDD) = 450 mA 15 81.0 81.5 Figure 11. Output Return Loss vs. Frequency at Various Temperatures, Drain Current (IDD) = 450 mA Rev. A | Page 7 of 16 –64 81.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0 FREQUENCY (GHz) Figure 14. Reverse Isolation vs. Frequency at Various Temperatures, Drain Current (IDD) = 450 mA 13425-014 –20 79 TA = +85°C TA = +25°C TA = –55°C 13425-012 10 GAIN (dB) GAIN INPUT RETURN LOSS OUTPUT RETURN LOSS 13425-009 RESPONSE (dB) 15 HMC8142 Data Sheet 30 30 TA = +85°C TA = +25°C TA = –55°C 29 28 29 25 24 25 24 23 23 22 22 21 21 20 81.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0 FREQUENCY (GHz) 20 81.0 29 28 28 27 27 PSAT (dBm) 30 29 26 25 24 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0 IDD = 350mA IDD = 400mA IDD = 450mA 26 25 24 23 TA = +85°C TA = +25°C TA = –55°C 22 82.0 Figure 18. Output P1dB vs. Frequency at Various Drain Currents (IDD) 30 23 81.5 FREQUENCY (GHz) Figure 15. Output P1dB vs. Frequency at Various Temperatures, Drain Current (IDD) = 450 mA 22 21 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0 FREQUENCY (GHz) 20 81.0 13425-016 20 81.0 34 34 33 33 32 32 31 31 IP3 (dBm) 35 30 29 83.0 83.5 84.0 84.5 85.0 85.5 86.0 IDD = 350mA IDD = 400mA IDD = 450mA 30 29 28 TA = +85°C TA = +25°C TA = –55°C 27 26 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0 FREQUENCY (GHz) 13425-017 26 25 81.0 82.5 Figure 19. PSAT vs. Frequency at Various Drain Currents (IDD) 35 27 82.0 FREQUENCY (GHz) Figure 16. PSAT vs. Frequency at Various Temperatures, Drain Current (IDD) = 450 mA 28 81.5 13425-019 21 Figure 17. Output IP3 vs. Frequency at Various Temperatures, Drain Current (IDD) = 450 mA, POUT/Tone = 12 dBm 25 81.0 81.5 82.0 82.5 83.0 83.5 84.0 84.5 85.0 85.5 86.0 FREQUENCY (GHz) Figure 20. Output IP3 vs. Frequency at Various Drain Currents (IDD), POUT/Tone = 12 dBm Rev. A | Page 8 of 16 13425-020 PSAT (dBm) 26 13425-018 P1dB (dBm) 27 26 13425-015 P1dB (dBm) 27 IP3 (dBm) IDD = 350mA IDD = 400mA IDD = 450mA 28 HMC8142 35 35 34 34 33 33 32 32 31 31 IP3 (dBm) 30 29 29 27 12dBm 14dBm 16dBm 25 81.0 81.5 82.0 82.5 26 83.0 83.5 84.0 84.5 85.0 85.5 86.0 FREQUENCY (GHz) 25 13425-021 26 8 9 10 11 12 13 14 15 16 POUT/TONE (dBm) 13425-024 27 Figure 24. Output IP3 vs. POUT/Tone at Various Drain Currents (IDD) at RF = 81 GHz Figure 21. Output IP3 vs. Frequency at Various POUT/Tones, Drain Current (IDD) = 450 mA 35 34 34 IDD = 350mA IDD = 400mA IDD = 450mA 33 32 31 31 IP3 (dBm) 32 30 29 30 29 28 28 27 27 26 26 9 10 11 12 13 14 15 16 POUT/TONE (dBm) 25 13425-022 25 8 8 11 12 13 14 15 16 30 GAIN (dB) P1dB (dBm) PSAT (dBm) GAIN (dB), P1dB (dBm), PSAT (dBm) 29 27 26 25 24 23 22 28 GAIN (dB) P1dB (dBm) PSAT (dBm) 27 26 25 24 23 22 21 400 450 IDD (mA) 13425-023 21 20 350 10 Figure 25. Output IP3 vs. POUT/Tone at Various Drain Currents (IDD) at RF = 86 GHz 30 28 9 POUT/TONE (dBm) Figure 22. Output IP3 vs. POUT/Tone at Various Drain Currents (IDD) at RF = 83.5 GHz 29 IDD = 350mA IDD = 400mA IDD = 450mA 33 13425-025 35 IP3 (dBm) 30 28 28 GAIN (dB), P1dB (dBm), PSAT (dBm) IDD = 350mA IDD = 400mA IDD = 450mA 20 350 400 450 IDD (mA) Figure 26. Gain, Output P1dB, and PSAT vs. Drain Current (IDD) at RF = 83.5 GHz Figure 23. Gain, Output P1dB, and PSAT vs. Drain Current (IDD) at RF = 81 GHz Rev. A | Page 9 of 16 13425-026 IP3 (dBm) Data Sheet Data Sheet GAIN (dB) P1dB (dBm) PSAT (dBm) 27 26 25 24 23 22 580 24 560 20 540 16 520 12 500 480 8 POUT GAIN PAE IDD 4 21 450 0 –15 –13 –11 –9 IDD (mA) –3 –1 1 3 5 7 9 11 Figure 30. POUT, Gain, PAE, and IDD vs. Input Power at RF = 81 GHz, Drain Current (IDD) = 450 mA 580 28 580 24 560 24 560 20 540 20 540 16 520 16 520 12 500 12 500 0 –15 –13 –11 –9 –7 –5 –3 –1 1 3 5 7 9 460 4 440 0 –15 –13 –11 –9 13425-028 4 11 INPUT POWER (dBm) 480 8 POUT GAIN PAE IDD 460 440 –7 –5 –3 –1 1 3 5 7 9 11 INPUT POWER (dBm) Figure 28. POUT, Gain, PAE, and IDD vs. Input Power at RF = 83.5 GHz, Drain Current (IDD) = 450 mA Figure 31. POUT, Gain, PAE, and IDD vs. Input Power at RF = 86 GHz, Drain Current (IDD) = 450 mA 560 28 560 24 530 24 530 20 500 20 500 16 470 16 470 12 440 12 440 IDD (mA) 410 –7 –5 –3 –1 1 3 5 7 9 8 380 4 350 0 –15 –13 –11 –9 11 INPUT POWER (dBm) 13425-029 POUT GAIN PAE IDD 4 0 –15 –13 –11 –9 POUT (dBm), GAIN (dB), PAE (%) 28 8 13425-031 480 POUT GAIN PAE IDD Figure 29. POUT, Gain, PAE, and IDD vs. Input Power at RF = 81 GHz, Drain Current (IDD) = 350 mA 410 POUT GAIN PAE IDD 380 350 –7 –5 –3 –1 1 3 5 7 9 11 INPUT POWER (dBm) Figure 32. POUT, Gain, PAE, and IDD vs. Input Power at RF = 83.5 GHz, Drain Current (IDD) = 350 mA Rev. A | Page 10 of 16 13425-032 8 POUT (dBm), GAIN (dB), PAE (%) 28 IDD (mA) POUT (dBm), GAIN (dB), PAE (%) –5 INPUT POWER (dBm) Figure 27. Gain, Output P1dB, and PSAT vs. Drain Current (IDD) at RF = 86 GHz POUT (dBm), GAIN (dB), PAE (%) 440 –7 IDD (mA) 400 13425-027 20 350 460 IDD (mA) 28 POUT (dBm), GAIN (dB), PAE (%) GAIN (dB), P1dB (dBm), PSAT (dBm) 29 28 13425-030 30 IDD (mA) HMC8142 HMC8142 28 560 24 530 20 500 16 470 12 440 8 410 50 45 25 380 –5 –3 –1 1 3 5 7 9 13425-033 350 –7 11 INPUT POWER (dBm) 20 8 2.5 POWER DISSIPATION (W) 2.5 2.0 1.5 81GHz 82GHz 83GHz 84GHz 85GHz 86GHz –13 –11 –9 –7 –5 –3 –1 1 3 5 7 INPUT POWER (dBm) Figure 34. Power Dissipation vs. Input Power at Various Frequencies, Drain Current (IDD) = 450 mA, TA = 85°C 0 –15 –1 4 9 14 OUTPUT POWER (dBm) 19 24 29 15 16 –13 Figure 35. Detector Output Voltage (VOUT) vs. Output Power at Various Temperatures, Drain Current (IDD) = 450 mA, RF = 81 GHz –11 –9 –7 –5 –3 –1 1 3 5 7 Figure 37. Power Dissipation vs. Input Power at Various Frequencies, Drain Current (IDD) = 350 mA, TA = 85°C OUTPUT VOLTAGE (V) –6 14 INPUT POWER (dBm) TA = +85°C TA = +25°C TA = –55°C 1 0.1 0.01 –16 13425-035 0.1 –11 13 81GHz 82GHz 83GHz 84GHz 85GHz 86GHz 1.0 TA = +85°C TA = +25°C TA = –55°C 1 0.01 –16 12 1.5 10 10 11 2.0 0.5 13425-034 POWER DISSIPATION (W) 3.0 0 –15 10 Figure 36. Output IMD3 vs. POUT/Tone at Various Frequencies, Drain Current (IDD) = 450 mA 3.0 0.5 9 POUT/TONE (dBm) Figure 33. POUT, Gain, PAE, and IDD vs. Input Power at RF = 86 GHz, Drain Current (IDD) = 350 mA 1.0 81GHz 82GHz 83GHz 84GHz 85GHz 86GHz 13425-036 IDD (mA) 30 13425-037 0 –15 –13 –11 –9 35 –11 –6 –1 4 9 14 OUTPUT POWER (dBm) 19 24 29 13425-038 POUT GAIN PAE IDD 4 IMD3 (dBc) 40 OUTPUT VOLTAGE (V) POUT (dBm), GAIN (dB), PAE (%) Data Sheet Figure 38. Detector Output Voltage (VOUT) vs. Output Power at Various Temperatures, Drain Current (IDD) = 450 mA, RF = 86 GHz Rev. A | Page 11 of 16 HMC8142 Data Sheet THEORY OF OPERATION The architecture of the HMC8142 power amplifier is shown in Figure 39. The HMC8142 uses four cascaded gain stages to form an amplifier with a combined gain of 21 dB and saturated output power (PSAT) of 26 dBm. At the output of the last stage, a coupler taps off a small portion of the output signal. The coupled signal is presented to an on-chip diode detector for external monitoring of the output power. A matched reference diode is included to help correct for detector temperature dependencies. See the application circuit shown in Figure 40 for further details on biasing the different blocks and using the detector features. VREF VDET Figure 39. Power Amplifier Circuit Architecture Rev. A | Page 12 of 16 13425-043 RFOUT RFIN Data Sheet HMC8142 APPLICATIONS INFORMATION 1. 2. 3. TYPICAL APPLICATION CIRCUIT A typical application circuit for the HMC8142 is shown in Figure 40. Combine supply lines as shown in the application circuit schematic to minimize external component count and simplify power supply routing. Apply a −2 V bias to the VGG1 to VGG4 pads. Apply 4 V to the VDD1 to VDD4 pads. Adjust VGG1 to VGG4 between −2 V and 0 V to achieve a total amplifier drain current of 450 mA. To power down the HMC8142, follow the procedure in reverse. The HMC8142 uses several amplifier, detector, and attenuator stages. All stages use depletion mode pHEMT transistors. It is important to follow the following power-up bias sequence to ensure transistor damage does not occur. For additional guidance on general bias sequencing, see the MMIC Amplifier Biasing Procedure application note. VDD1 , VDD2 , VDD3 , VDD4 4.7µF 0.01µF 120pF 120pF 4 5 6 VDD1 7 8 VDD2 120pF 120pF 10 9 11 VDD3 VDD4 3 RFIN 2 12 RFIN RFOUT 1 RFOUT 13 14 VGG1 VGG3 VGG2 25 120pF 24 23 22 120pF VGG4 21 20 120pF 19 18 VREF VDET 17 16 120pF 15 +5V +5V 100kΩ 100kΩ 10kΩ 10kΩ 10kΩ VGG1, VGG2, VGG3, VGG4 10kΩ 0.01µF –5V SUGGESTED INTERFACE CIRCUIT Figure 40. Typical Application Circuit Rev. A | Page 13 of 16 13425-040 4.7µF VOUT = VREF – VDET HMC8142 Data Sheet ASSEMBLY DIAGRAM 4.7µF 0.01µF 120pF 4 5 120pF 6 120pF 7 8 120pF 9 10 11 50Ω TRANSMISSION LINE 3 MIL WIDE GOLD RIBBON (WEDGE BOND) 3 12 2 13 1 14 3 MIL WIDE GOLD RIBBON (WEDGE BOND) 25 24 23 22 21 20 19 18 17 16 15 6 MIL NOMINAL GAP 120pF 120pF 120pF 120pF 0.01µF 13425-041 4.7µF Figure 41. Assembly Diagram Rev. A | Page 14 of 16 Data Sheet HMC8142 MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GAAS MMICS Attach the die directly to the ground plane eutectically or with conductive epoxy. To bring RF to and from the chip, use 50 Ω microstrip transmission lines on 0.127 mm (5 mil) thick alumina thin film substrates (see Figure 42). Transients Suppress instrument and bias supply transients while bias is applied. To minimize inductive pickup, use shielded signal and bias cables. General Handling Handle the chip on the edges only using a vacuum collet or with a sharp pair of bent tweezers. Because the surface of the chip has fragile air bridges, never touch the surface of the chip with a vacuum collet, tweezers, or fingers. 0.05mm (0.002") THICK GaAs MMIC RIBBON BOND 0.076mm (0.003") MOUNTING The chip is back metallized and can be die mounted with gold/tin (AuSn) eutectic preforms or with electrically conductive epoxy. The mounting surface must be clean and flat. RF GROUND PLANE 13425-042 Eutectic Die Attach 0.127mm (0.005") THICK ALUMINA THIN FILM SUBSTRATE Figure 42. Routing RF Signals To minimize bond wire length, place microstrip substrates as close to the die as possible. The typical die to substrate spacing is 0.076 mm to 0.152 mm (3 mil to 6 mil). HANDLING PRECAUTIONS To avoid permanent damage, adhere to the precautions in the following sections. Storage All bare die ship in either waffle or gel-based ESD protective containers, sealed in an ESD protective bag. After opening the sealed ESD protective bag, all die must be stored in a dry nitrogen environment. Cleanliness Handle the chips in a clean environment. Never use liquid cleaning systems to clean the chip. Static Sensitivity Follow ESD precautions to protect against ESD strikes. It is best to use an 80% gold/20% tin preform with a work surface temperature of 255°C and a tool temperature of 265°C. When hot 90% nitrogen/10% hydrogen gas is applied, maintain tool tip temperature at 290°C. Do not expose the chip to a temperature greater than 320°C for more than 20 sec. No more than 3 sec of scrubbing is required for attachment. Epoxy Die Attach ABLETHERM 2600BT is recommended for die attachment. Apply a minimum amount of epoxy to the mounting surface so that a thin epoxy fillet is observed around the perimeter of the chip after placing it into position. Cure the epoxy per the schedule provided by the manufacturer. WIRE BONDING RF bonds made with 3 mil × 0.5 mil gold ribbon are recommended for the RF ports. These bonds must be thermosonically bonded with a force of 40 g to 60 g. DC bonds of 1 mil (0.025 mm) diameter, thermosonically bonded, are recommended. Create ball bonds with a force of 40 g to 50 g and wedge bonds with a force of 18 g to 22 g. Create all bonds with a nominal stage temperature of 150°C. Apply a minimum amount of ultrasonic energy to achieve reliable bonds. Keep all bonds as short as possible, less than 12 mil (0.31 mm). Rev. A | Page 15 of 16 HMC8142 Data Sheet OUTLINE DIMENSIONS 3.039 0.200 0.114 4 0.200 0.200 5 6 0.200 0.600 8 7 0.600 10 9 0.05 0.200 0.089 11 0.168 0.764 0.130 0.130 3 12 2 13 1 14 1.999 0.764 0.191 25 24 23 22 0.09 0.003 0.200 0.200 0.200 21 0.600 20 19 17 18 0.200 0.200 0.200 0.600 16 15 SIDE VIEW 0.200 0.200 TOP VIEW 0.014 (CIRCUIT SIDE) 07-15-2015-A 0.106 Figure 43. 25-Pad Bare Die [CHIP] (C-25-2) Dimensions shown in millimeters ORDERING GUIDE Model1 HMC8142 HMC8142-SX 1 2 Temperature Range −55°C to +85°C −55°C to +85°C Package Description 25-Pad Bare Die [CHIP] 25-Pad Bare Die [CHIP] The HMC8142-SX consists of two pairs of the die in a gel pack for sample orders. This is a waffle pack option; contact Analog Devices, Inc., sales representatives for additional packaging options. ©2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13425-0-2/16(A) Rev. A | Page 16 of 16 Package Option2 C-25-2 C-25-2