Document No. 001-97717 Rev. *A ECN# 4804484 Cypress Semiconductor Automotive Product Qualification Report QTP# 142401 VERSION *A June, 2015 128-Kbit and 256-Kbit Serial Automotive F-RAM 130nm Technology, Texas Instruments DMOS5 Fab CY15B256J-SXA 32K x 8 Serial (I2C) Automotive 256Kbit F-RAM, -40C to +85C CY15B128J-SXA 16K x 8 Serial (I2C) Automotive 128Kbit F-RAM, -40C to +85C CY15B256Q-SXA 32K x 8 Serial (SPI) Automotive 256Kbit F-RAM, -40C to +85C CY15B128Q-SXA 16K x 8 Serial (SPI) Automotive 128Kbit F-RAM, -40C to +85C FOR ANY QUESTIONS ON THIS REPORT, PLEASE CONTACT [email protected] or via a CYLINK CRM CASE Prepared By: Becky Thomas Reliability Engineer Reviewed By: Rene Rodgers Reliability Manager Approved By: Don Darling (DCDA) Reliability Director Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 1 of 12 Document No. 001-97717 Rev. *A ECN# 4804484 PRODUCT QUALIFICATION HISTORY QTP Number Description of Qualification Purpose Date 02-60-5112 / 124901 TI Process Qualification 130nm F-RAM Process Aug 2008 / Dec 2012 141603 128-Kbit and 256-Kbit Serial F-RAM Memory Product Qualification (Industrial, -40C to +85C) Jan 2015 142401 128-Kbit and 256-Kbit Serial F-RAM Memory Automotive Product Qualification (-40C to +85C) May 2015 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 2 of 12 Document No. 001-97717 Rev. *A ECN# 4804484 PRODUCT DESCRIPTION (for qualification) Qualification Purpose: 128-Kbit and 256-Kbit Serial F-RAM Memory Automotive Product Qualification (-40C to +85C) Automotive Marketing Part #: CY15B256J-SXA, CY15B128J-SXA, CY15B256Q-SXA, CY15B128Q-SXA Device Description: 128-Kbit and 256-Kbit Automotive Serial (SPI and I2C) F-RAM Memory Cypress Division: Cypress Semiconductor Corporation – Memory Products Division (MPD) TECHNOLOGY/FAB PROCESS DESCRIPTION Number of Metal Layers: Proprietary* Metal Composition: Passivation Type and Thickness: Proprietary* Proprietary* Generic Process Technology/Design Rule (-drawn): CMOS / 130nm Gate Oxide Material/Thickness (MOS): Proprietary* Name/Location of Die Fab (prime) Facility: Texas Instruments / Dallas Die Fab Line ID/Wafer Process ID: DMOS 5 / E035.1 *Texas Instruments’ proprietary information is available with signed NDA. PACKAGE AVAILABILITY PACKAGE ASSEMBLY FACILITY SITE 150-mil 8-LD SOIC UTL-UT 150-mil 8-LD SOIC CML-RA Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 3 of 12 Document No. 001-97717 Rev. *A ECN# 4804484 MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION Mold Compound Flammability Rating: SW815 SZ815 8-LD SOIC, 150-mil EME-G600 / Sumitomo UL 94 V=0 pass Mold Compound Alpha Emission Rate: <0.1 Oxygen Rating Index: >28% 54% Lead Frame Designation: FMP Lead Frame Material: Copper Substrate Material: N/A Lead Finish, Composition / Thickness: Matte Sn Die Backside Preparation Method/Metallization: Backgrind Die Separation Method: Laser Groove/Wafer Saw Die Attach Supplier: Ablestik Die Attach Material: Abletherm 8600 Bond Diagram Designation 001-85999, 001-86119 Wire Bond Method: Thermosonic Wire Material/Size: Au / 0.8 mil Thermal Resistance Theta JA C/W: 152 C/W Package Cross Section Yes/No: Yes Assembly Process Flow: 001-91702 / 001-91703 Name/Location of Assembly (prime) facility: UTAC, Thailand (UT) MSL LEVEL 3 REFLOW PROFILE 260C Package Designation: Package Outline, Type, or Name: Mold Compound Name/Manufacturer: ELECTRICAL TEST / FINISH DESCRIPTION UTL Test Location: UTAC, Thailand / CML, Philippines Note: Please contact a Cypress Representative for other package availability. Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 4 of 12 Document No. 001-97717 Rev. *A ECN# 4804484 RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENTS Stress/Test Test Condition (Temp/Bias) Result P/F Electrostatic Discharge Human Body Model (ESD-HBM) Electrostatic Discharge Charge Device Model (ESD-CDM) Latchup Sensitivity NVM Endurance /Data Retention (Plastic ) NVM Endurance / High Temperature Operating Life High Temperature Operating Life Early Failure Rate AEC-Q100-002, 500V, 1,000V, 1,500V, 2,000V P AEC-Q100-011 250V, 500V, 750V (corner pins) P AEC-Q100-004, +/-140mA, 5.4V Over-Voltage AEC-Q100-005, 7.5 E9 Cycles,125C, non-biased P P AEC-Q100-005 and JESD22-A108, 125C Dynamic Operating Condition, Vcc = 3.60V, AEC-Q100-008 and JESD22-A108, 125C Dynamic Operating Condition, Vcc = 3.60V, P High Temperature Operating Life Latent Failure Rate JESD22-A108, 125 C Dynamic Operating Condition, Vcc = 3.60, 125 C P High Accelerated Saturation Test (HAST) JESD22-A110,130 C, 85%RH, 3.60V Precondition: JESD22-A113 Moisture Sensitivity Level (192 Hrs., 30 C, 60% RH) JESD22- A104, -65 C to 150 C Precondition: JESD22-A113 Moisture Sensitivity Level (192 Hrs., 30 C, 60% RH) Mil-Std 883, Method 2011 P P Wire Bond Shear JESD22-A102, 121 C, 100%RH, 15 PSIG Precondition: JESD22-A113 Moisture Sensitivity Level (192 Hrs., 30 C, 60% RH) AEC Q100-001 Wire Bond Pull Mil-Std 883, Method 2011 P Solderability JESD22-B102 P Physical Dimensions JESD22B100 and B108 P Electrical Distributions AEC Q100-009 P Temperature Cycle Post Temperature Cycle Wire Bond Pull Pressure Cooker Test Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 5 of 12 P P P P Document No. 001-97717 Rev. *A ECN# 4804484 RELIABILITY FAILURE RATE SUMMARY Stress/Test Device Tested/ Device Hours # Fails Activation Energy Thermal AF3 Failure Rate High Temperature Operating Life Early Failure Rate 10,499 Devices 0 N/A N/A 0 PPM High Temperature Operating Life1,2 Long Term Failure Rate 547,000 DHRs* 0 0.7 55 21 FITs 240,000 DHRs *Leverage HTOL data from TI 130nm F-RAM Process QTP#124901 (SPEC#001-85093) 1 2 3 Assuming an ambient temperature of 55C and a junction temperature rise of 15C. Chi-squared 60% estimations used to calculate the failure rate. Thermal Acceleration Factor is calculated from the Arrhenius equation E 1 1 AF = exp A - k T 2 T1 where: EA =The Activation Energy of the defect mechanism. -5 K = Boltzmann's constant = 8.62x10 eV/Kelvin. T1 is the junction temperature of the device under stress and T 2 is the junction temperature of the device at use conditions. Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 6 of 12 Document No. 001-97717 Rev. *A ECN# 4804484 Reliability Test Data QTP #: 142401 Device Fab Lot # Assy Lot # Assy Loc Duration/ Samp Rej Failure Mechanism STRESS: ESD-HUMAN BODY CIRCUIT (500V) CY15B256Q-SXA 4438157 611437933 UTAC - UT 500 3 0 CY15B256J-SXA 4440062 611439609 UTAC - UT 500 3 0 STRESS: ESD-HUMAN BODY CIRCUIT (1000V) CY15B256Q-SXA 4438157 611437933 UTAC - UT 1000 3 0 CY15B256J-SXA 4440062 611439609 UTAC - UT 1000 3 0 FM24V01B-G / 4438076 611442261 CML-RA 1100 3 0 4438076 611442260 CML-RA 1100 3 0 CY15B128J-SXA FM25V01B-G/ CY15B128Q-SXA STRESS: ESD-HUMAN BODY CIRCUIT (2000V) CY15B256Q-SXA 4438157 611437933 UTAC - UT 2000 3 0 CY15B256J-SXA 4440062 611439609 UTAC - UT 2000 3 0 FM24V01B-G / 4438076 611442261 CML-RA 2200 8 0 4438076 611442260 CML-RA 2200 8 0 CY15B128J-SXA FM25V01B-G/ CY15B128Q-SXA STRESS: ESD- CHARGED DEVICE MODEL (250V) CY15B256Q-SXA 4438157 611437933 UTAC - UT 250 3 0 CY15B256J-SXA 4440062 611439609 UTAC - UT 250 3 0 STRESS: ESD- CHARGED DEVICE MODEL (500V) CY15B256Q-SXA 4438157 611437933 UTAC - UT 500 3 0 CY15B256J-SXA 4440062 611439609 UTAC - UT 500 3 0 FM24V01B-G / 4438076 611442261 CML-RA 500 9 0 4438076 611442260 CML-RA 500 9 0 CY15B128J-SXA FM25V01B-G/ CY15B128Q-SXA Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 7 of 12 Document No. 001-97717 Rev. *A ECN# 4804484 Reliability Test Data QTP #: 142401 Device Fab Lot # Assy Lot # Assy Loc Duration/ Samp Rej Failure Mechanism STRESS: ESD- CHARGED DEVICE MODEL (750V)- corner pins CY15B256Q-SXA 4438157 611437933 UTAC - UT 750 3 0 CY15B256J-SXA 4440062 611439609 UTAC - UT 750 3 0 FM24V01B-G / 4438076 611442261 CML-RA 750 3 0 4438076 611442260 CML-RA 750 3 0 CY15B128J-SXA FM25V01B-G/ CY15B128Q-SXA STRESS: STATIC LATCH-UP TESTING (±140mA current injection and 5.4V overvoltage test, tested at 85C) CY15B256Q-SXA 4438157 611437933 UTAC - UT COMP 6 0 CY15B256J-SXA 4440062 611439609 UTAC - UT COMP 6 0 FM24V01B-G / 4438076 611442261 CML-RA COMP 6 0 4438076 611442260 CML-RA COMP 6 0 CY15B128J-SXA FM25V01B-G/ CY15B128Q-SXA STRESS: NVM ENDURANCE/DATA RETENTION (7.5E9 cycles at 25C, 1000 hours at 125C, non-biased, tested at 85C) CY15B256Q-SXA 4438157 611437933 UTAC - UT 1000 80 0 CY15B256J-SXA 4440062 611439609 UTAC - UT 1000 80 0 CY15B256Q-SXA 4442315 611440779 UTAC - UT 1000 80 0 STRESS: NVM ENDURANCE/HIGH TEMPERATURE OPERATING LIFE (7.5E9 cycles at 25C, 1000 hours at 125C, tested room, 85C, -40C) CY15B256Q-SXA 4438157 611437933 UTAC - UT 1000 80 0 CY15B256J-SXA 4440062 611439609 UTAC - UT 1000 80 0 CY15B256Q-SXA 4442315 611440779 UTAC - UT 1000 80 0 STRESS: HIGH TEMPERATURE OPERATING LIFE- EARLY FAILURE RATE (125C, 96 hours, 3.60V, tested room and 85C) CY15B256Q-SXA 4438157 611437933 UTAC - UT 96 3500 0 CY15B256Q-SXA 4440062 611439609 UTAC - UT 96 3499 0 CY15B256Q-SXA 4442315 611440779 UTAC - UT 96 3500 0 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 8 of 12 Document No. 001-97717 Rev. *A ECN# 4804484 Reliability Test Data QTP #: 142401 Device Fab Lot # Assy Lot # Assy Loc Duration/ Samp Rej Failure Mechanism STRESS: HIGH TEMPERATURE OPERATING LIFE- LATENT FAILURE RATE (125C, 1,000 hours, 3.60V, tested room and 85C) CY15B256Q-SXA 4438157 611437933 UTAC - UT 1000 80 0 CY15B256J-SXA 4440062 611439609 UTAC - UT 1000 80 0 CY15B256Q-SXA 4442315 611440779 UTAC - UT 1000 80 0 STRESS: HIGHLYACCELERATED SATURATION TEST (HAST) (130C, 85%RH, Biased at 3.60V), with MSL3 Preconditioning – 96 hours, tested at room temperature and 85C CY15B256Q-SXA 4438157 611437933 UTAC - UT 96 60 0 CY15B256J-SXA 4440062 611439609 UTAC - UT 96 60 0 CY15B256Q-SXA 4442315 611440779 UTAC - UT 96 60 0 CY15B256Q-SXA 4440062 LGQTP1 UTAC - UT 96 80 0 STRESS: TEMPERATURE CYCLE, CONDITION C (-65C TO 150C), with MSL3 Preconditioning CY15B256Q-SXA 4438157 611437933 UTAC - UT 500 79 0 CY15B256Q-SXA 4438157 611437933 UTAC - UT 1000 74 0 CY15B256J-SXA 4440062 611439609 UTAC - UT 500 80 0 CY15B256J-SXA 4440062 611439609 UTAC - UT 1000 80 0 CY15B256Q-SXA 4442315 611440779 UTAC - UT 500 80 0 CY15B256Q-SXA 4442315 611440779 UTAC - UT 1000 80 0 500 5 0 STRESS: POST TEMPERATURE CYCLE WIRE BOND PULL CY15B256Q-SXA 4438157 611437933 UTAC - UT Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 9 of 12 Document No. 001-97717 Rev. *A ECN# 4804484 Reliability Test Data QTP #: 142401 Device Fab Lot # Assy Lot # Assy Loc Duration/ Samp Rej Failure Mechanism STRESS: PRESSURE COOKER TEST (121C, 100%RH), with MSL3 Preconditioning tested at room temperature CY15B256Q-SXA 4438157 611437933 UTAC - UT 96 80 0 CY15B256Q-SXA 4438157 611437933 UTAC - UT 168 80 0 CY15B256J-SXA 4440062 611439609 UTAC - UT 96 80 0 CY15B256J-SXA 4440062 611439609 UTAC - UT 168 80 0 CY15B256Q-SXA 4442315 611440779 UTAC - UT 96 80 0 CY15B256Q-SXA 4442315 611440779 UTAC - UT 168 80 0 STRESS: WIRE BALL SHEAR CY15B256Q-SXA 4438157 611437933 UTAC - UT COMP 15 0 CY15B256J-SXA 4440062 611439609 UTAC - UT COMP 15 0 CY15B256Q-SXA 4442315 611440779 UTAC - UT COMP 15 0 STRESS: WIRE BOND PULL CY15B256Q-SXA 4438157 611437933 UTAC - UT COMP 15 0 CY15B256J-SXA 4440062 611439609 UTAC - UT COMP 15 0 CY15B256Q-SXA 4442315 611440779 UTAC - UT COMP 15 0 STRESS: SOLDERABILITY CY15B256Q-SXA 4438157 611437933 UTAC - UT COMP 15 0 CY15B256J-SXA 4440062 611439609 UTAC - UT COMP 15 0 CY15B256Q-SXA 4442315 611440779 UTAC - UT COMP 15 0 STRESS: PHYSICAL DIMENSIONS CY15B256Q-SXA 4438157 611437933 UTAC - UT COMP 10 0 CY15B256J-SXA 4440062 611439609 UTAC - UT COMP 10 0 CY15B256Q-SXA 4442315 611440779 UTAC - UT COMP 10 0 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 10 of 12 Document No. 001-97717 Rev. *A ECN# 4804484 Reliability Test Data QTP #: 142401 Device Fab Lot # Assy Lot # Assy Loc Duration/ Samp Rej Failure Mechanism STRESS: Electrical Distributions (room temperature, 85C and -40C) CY15B256Q-SXA 4438157 611437933 UTAC - UT COMP 30 0 CY15B256J-SXA 4440062 611439609 UTAC - UT COMP 30 0 CY15B256Q-SXA 4442315 611440779 UTAC - UT COMP 30 0 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 11 of 12 Document No. 001-97717 Rev. *A ECN# 4804484 Document History Page Document Title: QUALIFICATION Document Number: Rev. ECN No. ** 4772359 *A 4804484 QTP#142401: 128KB AND 256KB SERIAL F-RAM MEMORY AUTOMOTIVE PRODUCT 001-97717 Orig. of Change BECK BECK Description of Change Initial Release Indicated “Proprietary” Items on the “TECHNOLOGY/FAB PROCESS DESCRIPTION” Table, Page 3. Distribution: WEB Posting: None Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 12 of 12