LTC3410 - 2.25MHz, 300mA Synchronous Step-Down Regulator in SC70

LTC3410
2.25MHz, 300mA
Synchronous Step-Down
Regulator in SC70
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FEATURES
DESCRIPTIO
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The LTC ®3410 is a high efficiency monolithic synchronous buck regulator using a constant frequency, current
mode architecture. The device is available in adjustable
and fixed output voltage versions. Supply current during
operation is only 26µA, dropping to <1µA in shutdown.
The 2.5V to 5.5V input voltage range makes the LTC3410
ideally suited for single Li-Ion battery-powered applications. 100% duty cycle provides low dropout operation,
extending battery life in portable systems.
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High Efficiency: Up to 96%
Low Ripple (20mVP-P) Burst Mode Operation: IQ 26µA
Low Output Voltage Ripple
300mA Output Current at VIN = 3V
380mA Minimum Peak Switch Current
2.5V to 5.5V Input Voltage Range
2.25MHz Constant Frequency Operation
No Schottky Diode Required
Low Dropout Operation: 100% Duty Cycle
Stable with Ceramic Capacitors
0.8V Reference Allows Low Output Voltages
Shutdown Mode Draws < 1µA Supply Current
±2% Output Voltage Accuracy
Current Mode Operation for Excellent Line and
Load Transient Response
Overtemperature Protected
Available in Low Profile SC70 Package
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APPLICATIO S
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Cellular Telephones
Wireless and DSL Modems
Digital Cameras
MP3 Players
Portable Instruments
The internal synchronous switch increases efficiency and
eliminates the need for an external Schottky diode. Low
output voltages are easily supported with the 0.8V feedback reference voltage. The LTC3410 is available in a tiny,
low profile SC70 package.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All
other trademarks are the property of their respective owners. Protected by U.S. Patents,
including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131, 5994885.
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Switching frequency is internally set at 2.25MHz, allowing
the use of small surface mount inductors and capacitors.
The LTC3410 is specifically designed to work well with
ceramic output capacitors, achieving very low output
voltage ripple and a small PCB footprint.
TYPICAL APPLICATIO
Efficiency and Power Loss
vs Output Current
100
4.7µH
SW
LTC3410
10pF
RUN
VFB
GND
887k
412k
VOUT
2.5V
COUT
4.7µF
CER
80
EFFICIENCY (%)
CIN
4.7µF
CER
VIN
70
0.1
EFFICIENCY
60
0.01
50
40
POWER LOSS
30
3410 TA01a
20
10
0
0.1
VIN = 2.7V
VIN = 3.6V
VIN = 4.2V
1
10
100
OUTPUT CURRENT (mA)
POWER LOSS (W)
VIN
2.7V
TO 5.5V
1
90
0.001
0.0001
1000
3410 TA01b
3410fb
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LTC3410
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ABSOLUTE
RATI GS (Note 1)
Input Supply Voltage .................................. – 0.3V to 6V
RUN, VFB Voltages ..................................... – 0.3V to VIN
SW Voltage (DC) ......................... – 0.3V to (VIN + 0.3V)
P-Channel Switch Source Current (DC) ............. 500mA
N-Channel Switch Sink Current (DC) ................. 500mA
Peak SW Sink and Source Current .................... 630mA
Operating Temperature Range (Note 2) .. – 40°C to 85°C
Junction Temperature (Notes 3, 5) ...................... 125°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
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PACKAGE/ORDER I FOR ATIO
TOP VIEW
TOP VIEW
RUN 1
6 VFB
RUN 1
6 VOUT
GND 2
5 GND
GND 2
5 GND
SW 3
4 VIN
SW 3
4 VIN
SC6 PACKAGE
6-LEAD PLASTIC SC70
SC6 PACKAGE
6-LEAD PLASTIC SC70
TJMAX = 125°C, θJA = 250°C/ W
TJMAX = 125°C, θJA = 250°C/ W
ORDER PART NUMBER
LTC3410ESC6
SC6 PART MARKING
LBSD
ORDER PART NUMBER
LTC3410ESC6-1.2
LTC3410ESC6-1.5
LTC3410ESC6-1.65
LTC3410ESC6-1.8
LTC3410ESC6-1.875*
SC6 PART MARKING
LCHV
LCNB
LCJF
LCNC
LCFQ
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges. *A separate data sheet is available for the LT3410-1.875.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
VIN = 3.6V unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
IVFB
Feedback Current
Adjustable Output Voltage
●
IVOUT
Output Voltage Feedback Current
Fixed Output Voltage
●
IPK
Peak Inductor Current
VIN = 3V, VFB = 0.7V or VOUT = 90%, Duty Cycle < 35%
VFB
Regulated Feedback Voltage
Adjustable Output Voltage (LTC3410E)
●
∆VFB
Reference Voltage Line Regulation
VIN = 2.5V to 5.5V
●
VOUT
Regulated Output Voltage
LTC3410-1.2, IOUT = 100mA
LTC3410-1.5, IOUT = 100mA
LTC3410-1.65, IOUT = 100mA
LTC3410-1.8, IOUT = 100mA
LTC3410-1.875, IOUT = 100mA
●
●
●
●
●
∆VOUT
Output Voltage Line Regulation
VIN = 2.5V to 5.5V
●
VLOADREG
Output Voltage Load Regulation
ILOAD = 50mA to 250mA
VIN
Input Voltage Range
TYP
3.3
380
0.784
1.176
1.47
1.617
1.764
1.837
MAX
±30
nA
6
µA
490
mA
0.8
0.816
0.04
0.4
1.2
1.5
1.65
1.8
1.875
1.224
1.53
1.683
1.836
1.913
0.04
0.4
0.5
●
2.5
UNITS
V
%/V
V
V
V
V
V
%/V
%
5.5
V
3410fb
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LTC3410
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
VIN = 3.6V unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
VUVLO
Undervoltage Lockout Threshold
IS
MIN
TYP
MAX
UNITS
VIN Rising
VIN Falling
2
1.94
2.3
V
V
Input DC Bias Current
Burst Mode® Operation
Shutdown
(Note 4)
VFB = 0.83V or VOUT = 104%, ILOAD = 0A
VRUN = 0V
26
0.1
35
1
µA
µA
fOSC
Oscillator Frequency
VFB = 0.8V or VOUT = 100%
VFB = 0V or VOUT = 0V
2.25
310
2.7
MHz
kHz
RPFET
RDS(ON) of P-Channel FET
ISW = 100mA
0.75
0.9
Ω
RNFET
RDS(ON) of N-Channel FET
ISW = –100mA
0.55
0.7
Ω
ILSW
SW Leakage
VRUN = 0V, VSW = 0V or 5V, VIN = 5V
±0.01
±1
µA
VRUN
RUN Threshold
●
1
1.5
V
IRUN
RUN Leakage Current
●
±0.01
±1
µA
●
1.8
0.3
Burst Mode is a registered trademark of Linear Technology Corporation.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3410E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
LTC3410: TJ = TA + (PD)(250°C/W)
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 5: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
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TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure1 Except for the Resistive Divider Resistor Values)
Efficiency vs Input Voltage
IOUT = 100mA
IOUT = 250mA
70
EFFICIENCY (%)
EFFFICIENCY (%)
IOUT = 10mA
80
IOUT = 1mA
60
100
90
90
80
80
70
70
60
50
40
30
IOUT = 0.1mA
50
100
20
40
10
VOUT = 1.8V
30
2.5
3
4.5
4
3.5
INPUT VOLTAGE (V)
EFFICIENCY (%)
100
90
Efficiency vs Output Current
Efficiency vs Output Current
5
5.5
3410 G02
60
50
40
30
VIN = 2.7V
VIN = 3.6V
VIN = 4.2V
VOUT = 1.8V
0
1
10
100
0.1
OUTPUT CURRENT (mA)
1000
3410 G03
20
10
VIN = 2.7V
VIN = 3.6V
VIN = 4.2V
VOUT = 1.2V
0
1
10
100
0.1
OUTPUT CURRENT (mA)
1000
3410 G04
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LTC3410
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TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure 1 Except for the Resistive Divider Resistor Values)
Oscillator Frequency vs
Temperature
Reference Voltage vs
Temperature
2.7
0.814
VIN = 3.6V
2.7
VIN = 3.6V
2.6
0.804
0.799
0.794
0.789
2.6
OSCILLATOR FREQUENCY (MHz)
OSCILLATOR FREQUENCY (MHz)
0.809
REFERENCE VOLTAGE (V)
Oscillator Frequency vs
Supply Voltage
2.5
2.4
2.3
2.2
2.1
2.0
1.9
0.784
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
–25
0
25
50
75
TEMPERATURE (°C)
100
3410 G05
2.3
2.2
2.1
2.0
1.8
125
2
3410 G07
RDS(ON) vs Temperature
RDS(ON) vs Input Voltage
1.2
1.2
VIN = 3.6V
VOUT = 1.8V
1.1
0.8
MAIN SWITCH
0.8
RDS (ON) (Ω)
RDS (ON) (Ω)
VOUT ERROR (%)
–0.5
0.7
0.6
0.5
SYNCHRONOUS SWITCH
0.6
VIN = 4.2V
0.4
0.4
VIN = 2.7V
0.3
–1.0
0.2
0.2
0
100
200
400
300
LOAD CURRENT (mA)
0
500
1
2
5
4
3
INPUT VOLTAGE (V)
3410 G08
3410 G10
3410 G09
Dynamic Supply Current
vs Temperature
Dynamic Supply Current vs VIN
Switch Leakage vs Temperature
110
50
50
VOUT = 1.2V
ILOAD = 0A
100
40
30
20
10
VIN = 5.5V
RUN = 0V
90
40
SWITCH LEAKAGE (nA)
DYNAMIC SUPPLY CURRENT (µA)
DYNAMIC SUPPLY CURRENT (µA)
0
–50 –30 –10 10 30 50 70 90 110 130
TEMPERATURE (°C)
7
6
VIN = 3.6V
MAIN SWITCH
SYNCHRONOUS SWITCH
0.1
–1.5
VIN = 3.6V
VIN = 2.7V
0.9
0
VIN = 4.2V
1.0
1.0
0.5
6
3
5
4
SUPPLY VOLTAGE (V)
3410 G06
Output Voltage vs Load Current
1.0
2.4
1.9
1.8
–50
125
2.5
30
20
10
80
70
SYNCHRONOUS
SWITCH
60
50
40
30
MAIN
SWITCH
20
10
0
1
2
4
3
5
6
VIN (V)
3410 G11
0
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
3410 G12
0
–50
–25
50
25
0
75
TEMPERATURE (°C)
100
125
3410 G13
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LTC3410
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TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure 1 Except for the Resistive Divider Resistor Values)
Burst Mode Operation
Switch Leakage vs Input Voltage
Start-Up from Shutdown
600
550
LEAKAGE CURRENT (pA)
500
RUN
2V/DIV
SW
5V/DIV
450
400
350
MAIN
SWITCH
300
VOUT
50mV/DIV
AC COUPLED
250
VOUT
1V/DIV
200
150
IL
100mA/DIV
SYNCHRONOUS
SWITCH
100
50
IL
200mA/DIV
0
0
1
4
3
2
INPUT VOLTAGE (V)
5
6
VIN = 3.6V
VOUT = 1.8V
ILOAD = 10mA
3410 G14
2µs/DIV
3410 G15
VIN = 3.6V
VOUT = 1.8V
ILOAD = 300mA
Load Step
Start-Up from Shutdown
VOUT
100mV/DIV
AC COUPLED
VOUT
1V/DIV
IL
200mA/DIV
IL
200mA/DIV
IL
200mA/DIV
ILOAD
200mA/DIV
ILOAD
200mA/DIV
VIN = 3.6V
VOUT = 1.8V
ILOAD = 0A
200µs/DIV
3410 G19
10µs/DIV
VIN = 3.6V
VOUT = 1.8V
ILOAD = 0mA TO 300mA
3410 G16
Load Step
VOUT
100mV/DIV
AC COUPLED
RUN
2V/DIV
200µs/DIV
3410 G17
10µs/DIV
VIN = 3.6V
VOUT = 1.8V
ILOAD = 20mA TO 300mA
3410 G18
3410fb
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LTC3410
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RUN (Pin 1): Run Control Input. Forcing this pin above
1.5V enables the part. Forcing this pin below 0.3V shuts
down the device. In shutdown, all functions are disabled
drawing <1µA supply current. Do not leave RUN floating.
GND (Pins 2, 5): Ground Pin.
SW (Pin 3): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchronous power MOSFET switches.
VIN (Pin 4): Main Supply Pin. Must be closely decoupled
to GND, Pin 2, with a 2.2µF or greater ceramic capacitor.
VFB (Pin 6 Adjustable Version ): Feedback Pin. Receives
the feedback voltage from an external resistive divider
across the output.
VOUT (Pin 6 Fixed Voltage Versions): Output Voltage
Feedback Pin. An internal resistive divider divides the
output voltage down for comparison to the internal reference voltage.
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FU CTIO AL DIAGRA
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SLOPE
COMP
0.65V
OSC
OSC
4 VIN
FREQ
SHIFT
–
VFB/VOUT
+
0.8V
R1*
– EA
R2
240k
0.4V
EN
SLEEP
–
+
S
Q
R
Q
RUN
0.8V REF
(
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
ANTISHOOTTHRU
3 SW
+
SHUTDOWN
V
*R1 = 240k OUT – 1
0.8
5Ω
+
ICOMP
BURST
RS LATCH
VIN
1
–
+
)
IRCMP
–
6
5
2 GND
3410 BD
3410fb
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LTC3410
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OPERATIO (Refer to Functional Diagram)
Main Control Loop
Short-Circuit Protection
The LTC3410 uses a constant frequency, current mode
step-down architecture. Both the main (P-channel
MOSFET) and synchronous (N-channel MOSFET) switches
are internal. During normal operation, the internal top
power MOSFET is turned on each cycle when the oscillator
sets the RS latch, and turned off when the current comparator, ICOMP, resets the RS latch. The peak inductor
current at which ICOMP resets the RS latch, is controlled by
the output of error amplifier EA. The VFB pin, described in
the Pin Functions section, allows EA to receive an output
feedback voltage from an external resistive divider. When
the load current increases, it causes a slight decrease in
the feedback voltage relative to the 0.8V reference, which
in turn, causes the EA amplifier’s output voltage to increase until the average inductor current matches the new
load current. While the top MOSFET is off, the bottom
MOSFET is turned on until either the inductor current
starts to reverse, as indicated by the current reversal
comparator IRCMP, or the beginning of the next clock cycle.
When the output is shorted to ground, the frequency of the
oscillator is reduced to about 310kHz, 1/7 the nominal
frequency. This frequency foldback ensures that the inductor current has more time to decay, thereby preventing
runaway. The oscillator’s frequency will progressively
increase to 2.25MHz when VFB rises above 0V.
Burst Mode Operation
The LTC3410 is capable of Burst Mode operation in which
the internal power MOSFETs operate intermittently based
on load demand.
When the converter is in Burst Mode operation, the peak
current of the inductor is set to approximately 70mA regardless of the output load. Each burst event can last from
a few cycles at light loads to almost continuously cycling
with short sleep intervals at moderate loads. In between
these burst events, the power MOSFETs and any unneeded
circuitry are turned off, reducing the quiescent current to
26µA. In this sleep state, the load current is being supplied
solely from the output capacitor. As the output voltage
droops, the EA amplifier’s output rises above the sleep
threshold signaling the BURST comparator to trip and turn
the top MOSFET on. This process repeats at a rate that is
dependent on the load demand.
Dropout Operation
As the input supply voltage decreases to a value approaching the output voltage, the duty cycle increases toward the
maximum on-time. Further reduction of the supply voltage forces the main switch to remain on for more than one
cycle until it reaches 100% duty cycle. The output voltage
will then be determined by the input voltage minus the
voltage drop across the P-channel MOSFET and the
inductor.
Another important detail to remember is that at low input
supply voltages, the RDS(ON) of the P-channel switch
increases (see Typical Performance Characteristics).
Therefore, the user should calculate the power dissipation
when the LTC3410 is used at 100% duty cycle with low
input voltage (See Thermal Considerations in the Applications Information section).
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant frequency architectures by preventing subharmonic oscillations at high duty cycles. It is accomplished internally by
adding a compensating ramp to the inductor current
signal at duty cycles in excess of 40%. Normally, this
results in a reduction of maximum inductor peak current
for duty cycles > 40%. However, the LTC3410 uses a
patented scheme that counteracts this compensating
ramp, which allows the maximum inductor peak current
to remain unaffected throughout all duty cycles.
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LTC3410
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APPLICATIO S I FOR ATIO
Inductor Core Selection
VIN
2.7V
TO 5.5V
4.7µH
CIN
4.7µF
CER
VIN
SW
LTC3410
10pF
RUN
VOUT
1.2V
COUT
4.7µF
CER
VFB
GND
232k
464k
3410 F01
Figure 1. High Efficiency Step-Down Converter
The basic LTC3410 application circuit is shown in Figure 1.
External component selection is driven by the load requirement and begins with the selection of L followed by CIN and
COUT.
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials
are small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on
what the LTC3410 requires to operate. Table 1 shows some
typical surface mount inductors that work well in
LTC3410 applications.
Table 1. Representative Surface Mount Inductors
MANUFACTURER PART NUMBER
Inductor Selection
Taiyo Yuden
For most applications, the value of the inductor will fall in
the range of 2.2µH to 4.7µH. Its value is chosen based on
the desired ripple current. Large value inductors lower
ripple current and small value inductors result in higher
ripple currents. Higher VIN or VOUT also increases the ripple
current as shown in equation 1. A reasonable starting point
for setting ripple current is ∆IL = 120mA (40% of 300mA).
∆IL =
⎛ V ⎞
1
VOUT ⎜ 1− OUT ⎟
( f)(L) ⎝ VIN ⎠
(1)
The DC current rating of the inductor should be at least
equal to the maximum load current plus half the ripple
current to prevent core saturation. Thus, a 360mA rated
inductor should be enough for most applications (300mA
+ 60mA). For better efficiency, choose a low DC-resistance
inductor.
The inductor value also has an effect on Burst Mode
operation. The transition to low current operation begins
when the inductor current peaks fall to approximately
100mA. Lower inductor values (higher ∆IL) will cause this
to occur at lower load currents, which can cause a dip in
efficiency in the upper range of low current operation. In
Burst Mode operation, lower inductance values will cause
the burst frequency to increase.
MAX DC
VALUE CURRENT DCR HEIGHT
CB2016T2R2M
CB2012T2R2M
LBC2016T3R3M
2.2µH
2.2µH
3.3µH
510mA
530mA
410mA
0.13Ω 1.6mm
0.33Ω 1.25mm
0.27Ω 1.6mm
Panasonic
ELT5KT4R7M
4.7µH
950mA
0.2Ω 1.2mm
Sumida
CDRH2D18/LD
4.7µH
630mA 0.086Ω 2mm
Murata
LQH32CN4R7M23 4.7µH
450mA
Taiyo Yuden
NR30102R2M
NR30104R7M
2.2µH
4.7µH
1100mA 0.1Ω 1mm
750mA 0.19Ω 1mm
FDK
FDKMIPF2520D
FDKMIPF2520D
FDKMIPF2520D
4.7µH
3.3µH
2.2µH
1100mA 0.11Ω 1mm
1200mA 0.1Ω 1mm
1300mA 0.08Ω 1mm
0.2Ω
2mm
CIN and COUT Selection
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle VOUT/VIN. To prevent large
voltage transients, a low ESR input capacitor sized for the
maximum RMS current must be used. The maximum
RMS capacitor current is given by:
CIN required IRMS ≅ IOMAX
[VOUT (VIN − VOUT )]1/ 2
VIN
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations
do not offer much relief. Note that the capacitor
manufacturer’s ripple current ratings are often based on
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LTC3410
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APPLICATIO S I FOR ATIO
2000 hours of life. This makes it advisable to further derate
the capacitor, or choose a capacitor rated at a higher
temperature than required. Always consult the manufacturer if there is any question.
The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR requirement for COUT has been met, the RMS current rating
generally far exceeds the IRIPPLE(P-P) requirement. The
output ripple ∆VOUT is determined by:
⎛
1 ⎞
∆VOUT ≅ ∆IL ⎜ ESR +
⎟
⎝
8fC OUT ⎠
where f = operating frequency, COUT = output capacitance
and ∆IL = ripple current in the inductor. For a fixed output
voltage, the output ripple is highest at maximum input
voltage since ∆IL increases with input voltage.
can potentially cause a voltage spike at VIN, large enough
to damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size.
The recommended capacitance value to use is 4.7µF for
both input and output capacitor. For applications with
VOUT greater than 2.5V, the recommended value for output
capacitance should be increased. See Table 2.
Table 2. Capacitance Selection
OUTPUT
VOLTAGE RANGE
OUTPUT
CAPACITANCE
INPUT
CAPACITANCE
0.8V ≤ VOUT ≤ 2.5V
4.7µF
4.7µF
VOUT > 2.5V
10µH or 2x 4.7µF
4.7µF
If tantalum capacitors are used, it is critical that the
capacitors are surge tested for use in switching power
supplies. An excellent choice is the AVX TPS series of
surface mount tantalum. These are specially constructed
and tested for low ESR so they give the lowest ESR for a
given volume. Other capacitor types include Sanyo
POSCAP, Kemet T510 and T495 series, and Sprague 593D
and 595D series. Consult the manufacturer for other
specific recommendations.
Output Voltage Programming (LTC3410 Only)
Using Ceramic Input and Output Capacitors
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. Because the
LTC3410’s control loop does not depend on the output
capacitor’s ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size.
The output voltage is set by a resistive divider according
to the following formula:
⎛ R2⎞
VOUT = 0.8V ⎜ 1+ ⎟
( 2)
⎝ R1⎠
The external resistive divider is connected to the output,
allowing remote voltage sensing as shown in Figure 2.
Efficiency Considerations
Efficiency = 100% – (L1 + L2 + L3 + ...)
0.8V ≤ VOUT ≤ 5.5V
R2
However, care must be taken when ceramic capacitors are
used at the input and the output. When a ceramic capacitor
is used at the input and the power is supplied by a wall
adapter through long wires, a load step at the output can
induce ringing at the input, VIN. At best, this ringing can
couple to the output and be mistaken as loop instability. At
worst, a sudden inrush of current through the long wires
VFB
LTC3410
R1
GND
3410 F02
Figure 2. Setting the LTC3410 Output Voltage
3410fb
9
LTC3410
U
W
U U
APPLICATIO S I FOR ATIO
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3410 circuits: VIN quiescent current and I2R
losses. The VIN quiescent current loss dominates the
efficiency loss at very low load currents whereas the I2R
loss dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence as illustrated in Figure 3.
1. The VIN quiescent current is due to two components:
the DC bias current as given in the electrical characteristics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of
charge, dQ, moves from VIN to ground. The resulting
dQ/dt is the current out of VIN that is typically larger than
the DC bias current. In continuous mode,
IGATECHG = f(QT + QB) where QT and QB are the
gate charges of the internal top and bottom
switches. Both the DC bias and gate charge
losses are proportional to VIN and thus their effects will
be more pronounced at higher supply voltages.
2. I2R losses are calculated from the resistances of the
internal switches, RSW, and external inductor RL. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET RDS(ON) and the duty cycle
(DC) as follows:
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Charateristics
curves. Thus, to obtain I2R losses, simply add RSW to
RL and multiply the result by the square of the average
output current.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for less
than 2% total additional loss.
Thermal Considerations
In most applications the LTC3410 does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC3410 is running at high ambient
temperature with low supply voltage and high duty
cycles, such as in dropout, the heat dissipated may
exceed the maximum junction temperature of the part. If
1
VIN = 3.6V
POWER LOSS (W)
0.1
0.01
0.001
0.0001
0.00001
0.1
VOUT = 3.3V
VOUT = 1.8V
VOUT = 1.2V
10
100
1
LOAD CURRENT (mA)
1000
3410 F03
Figure 3. Power Loss vs Load Current
3410fb
10
LTC3410
U
W
U U
APPLICATIO S I FOR ATIO
the junction temperature reaches approximately 150°C,
both power switches will be turned off and the SW node
will become high impedance.
To avoid the LTC3410 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The temperature rise is given by:
TR = (PD)(θJA)
where PD is the power dissipated by the regulator and
θJAis the thermal resistance from the junction of the die to
the ambient temperature.
The junction temperature, TJ, is given by:
T J = TA + TR
where TA is the ambient temperature.
As an example, consider the LTC3410 in dropout at an
input voltage of 2.7V, a load current of 300mA and an
ambient temperature of 70°C. From the typical performance graph of switch resistance, the RDS(ON) of the
P-channel switch at 70°C is approximately 1.0Ω.
Therefore, power dissipated by the part is:
PD = ILOAD2 • RDS(ON) = 90mW
For the SC70 package, the θJA is 250°C/ W. Thus, the
junction temperature of the regulator is:
TJ = 70°C + (0.09)(250) = 92.5°C
which is well below the maximum junction temperature
of 125°C.
Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)).
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to (∆ILOAD • ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or
discharge COUT, which generates a feedback error signal.
The regulator loop then acts to return VOUT to its steadystate value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability
problem. For a detailed explanation of switching control
loop theory, see Application Note 76.
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 • CLOAD).
Thus, a 10µF capacitor charging to 3.3V would require a
250µs rise time, limiting the charging current to about
130mA.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3410. These items are also illustrated graphically in
Figures 4 and 5. Check the following in your layout:
1. The power traces, consisting of the GND trace, the SW
trace and the VIN trace should be kept short, direct and
wide.
3410fb
11
LTC3410
U
W
U U
APPLICATIO S I FOR ATIO
1
1
RUN
2
–
VFB
GND
+
2
6
COUT
VOUT
L1
VIN
SW
5
6
COUT
VOUT
R1
4
VOUT
GND
–
R2
3
RUN
LTC3410-1.875
LTC3410
3
+
L1
CFWD
SW
VIN
5
CIN
4
CIN
VIN
VIN
3410 F04b
3410 F04a
BOLD LINES INDICATE HIGH CURRENT PATHS
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 4a. LTC3410 Layout Diagram
Figure 4b. LTC3410-1.875 Layout Diagram
VIA TO GND
R1
VOUT
VOUT
VIN
VIA TO VIN
VIA TO VOUT
R2
PIN 1
L1
PIN 1
L1
CFWD
LTC3410
VIN
VIA TO VIN
LTC34101.875
SW
SW
COUT
COUT
CIN
CIN
GND
3410 F05b
3410 F05a
Figure 5b. LTC3410 Fixed Output Voltage
Suggested Layout
Figure 5a. LTC3410 Suggested Layout
2. Does the VFB pin connect directly to the feedback
resistors? The resistive divider R1/R2 must be connected between the (+) plate of COUT and ground.
3. Does the (+) plate of CIN connect to VIN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the (–) plates of CIN and COUT as close as possible.
5. Keep the switching node, SW, away from the sensitive
VFB node.
Design Example
As a design example, assume the LTC3410 is used in a
single lithium-ion battery-powered cellular phone
application. The VIN will be operating from a maximum of
4.2V down to about 2.7V. The load current requirement
is a maximum of 0.3A but most of the time it will be in
standby mode, requiring only 2mA. Efficiency at both low
and high load currents is important. Output voltage is
3V. With this information we can calculate L using
Equation (1),
L=
⎛ V ⎞
1
VOUT ⎜ 1− OUT ⎟
( f)(∆IL ) ⎝ VIN ⎠
(3)
3410fb
12
LTC3410
U
W
U U
APPLICATIO S I FOR ATIO
Substituting VOUT = 3V, VIN = 4.2V, ∆IL = 100mA
and f = 2.25MHz in Equation (3) gives:
L=
of less than 0.5Ω. In most cases, a ceramic capacitor will
satisfy this requirement. From Table 2, Capacitance Selection, COUT = 10µF and CIN = 4.7µF.
3V
3V ⎞
⎛
⎜ 1−
⎟ = 3.8µH
2.25MHz(100mA) ⎝ 4.2V ⎠
For the feedback resistors, choose R1 = 301k. R2 can
then be calculated from equation (2) to be:
A 4.7µH inductor works well for this application. For best
efficiency choose a 350mA or greater inductor with less
than 0.3Ω series resistance.
⎛V
⎞
R2 = ⎜ OUT − 1⎟ R1= 827.8k ; use 825k
⎝ 0.8
⎠
Figure 6 shows the complete circuit along with its
efficiency curve.
CIN will require an RMS current rating of at least 0.125A ≅
ILOAD(MAX)/2 at temperature and COUT will require an ESR
VIN
2.7V
TO 4.2V
4
CIN††
4.7µF
CER
VIN
SW
3
VOUT
3V
10pF
LTC3410
1
4.7µH*
COUT†
10µF
CER
RUN
VFB
6
825k
GND
2, 5
301k
3410 F06a
†
TAIYO YUDEN JMK212BJ106
TAIYO YUDEN JMK212BJ475
*MURATA LQH32CN4R7M23
††
Figure 6a
100
90
VOUT
100mV/DIV
AC COUPLED
EFFICIENCY (%)
80
70
60
50
IL
200mA/DIV
40
30
20
VIN = 3.6V
VIN = 4.2V
10
0
0.1
1
10
ILOAD (mA)
100
1000
3410 F06b
Figure 6b
ILOAD
200mA/DIV
20µs/DIV
VIN = 3.6V
VOUT = 3V
ILOAD = 100mA TO 300mA
3410 F06c
Figure 6c
3410fb
13
LTC3410
U
TYPICAL APPLICATIO S
Using Low Profile Components, <1mm Height
VIN
2.7V
TO 4.2V
4
VIN
†
CIN
4.7µF
SW
3
4.7µH*
LTC3410-1.875
1
RUN
VOUT
6
COUT†
4.7µF
CER
VOUT
1.875V
GND
†
TAIYO YUDEN JMK212BJ475
*FDK MIPF2520D
2, 5
3410 TA06a
Low Profile Efficiency
100
EFFICIENCY (%)
90
Load Step
VIN = 2.7V
VIN = 3.6V
VIN = 4.2V
VOUT
100mV/DIV
AC COUPLED
80
IL
200mA/DIV
70
ILOAD
200mA/DIV
60
3410 TA06c
20µs/DIV
50
0.1
VIN = 3.6V
ILOAD = 100mA TO 300mA
1
10
LOAD (mA)
100
1000
3410 TA06b
3410fb
14
LTC3410
U
PACKAGE DESCRIPTIO
SC6 Package
6-Lead Plastic SC70
(Reference LTC DWG # 05-08-1638)
0.47
MAX
0.65
REF
1.80 – 2.20
(NOTE 4)
1.00 REF
INDEX AREA
(NOTE 6)
1.80 – 2.40 1.15 – 1.35
(NOTE 4)
2.8 BSC 1.8 REF
PIN 1
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.10 – 0.40
0.65 BSC
0.15 – 0.30
6 PLCS (NOTE 3)
0.80 – 1.00
0.00 – 0.10
REF
1.00 MAX
GAUGE PLANE
0.15 BSC
0.26 – 0.46
0.10 – 0.18
(NOTE 3)
SC6 SC70 1205 REV B
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. DETAILS OF THE PIN 1 INDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE INDEX AREA
7. EIAJ PACKAGE REFERENCE IS EIAJ SC-70
8. JEDEC PACKAGE REFERENCE IS MO-203 VARIATION AB
3410fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC3410
U
TYPICAL APPLICATIO
Using Low Profile Components, <1mm Height
Efficiency
4
CIN†
4.7µF
VIN
SW
3
1
VOUT
1.5V
10pF
LTC3410
90
VFB
6
3410 TA02
402k
GND
464k
2, 5
VOUT
100mV/DIV
AC COUPLED
80
COUT†
4.7µF
RUN
Load Step
100
4.7µH*
EFFICIENCY (%)
VIN
2.7V
TO 4.2V
70
60
50
IL
200mA/DIV
40
30
VIN = 2.7V
VIN = 3.6V
VIN = 4.2V
20
†
TAIYO YUDEN JMK212BJ475
*FDK MIPF2520D
10
0
0.1
1
10
ILOAD (mA)
100
1000
3410 TA03
ILOAD
200mA/DIV
20µs/DIV
3410 TA04
VIN = 3.6V
VOUT = 1.5V
ILOAD = 100mA TO 300mA
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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LTC1877
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LTC1878
600mA (IOUT), 550kHz, Synchronous Step-Down
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LTC1879
1.2A (IOUT), 550kHz, Synchronous Step-Down
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LTC3403
600mA (IOUT), 1.5MHz, Synchronous Step-Down
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96% Efficiency, VIN = 2.5V to 5.5V, VOUT = Dynamically Adjustable,
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LTC3404
600mA (IOUT), 1.4MHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN = 2.7V to 6V, VOUT = 0.8V, IQ = 10µA,
ISD = <1µA, MS8 Package
LTC3405/LTC3405A
300mA (IOUT), 1.5MHz, Synchronous Step-Down
DC/DC Converter
96% Efficiency, VIN = 2.5V to 5.5V, VOUT = 0.8V, IQ = 20µA,
ISD = <1µA, ThinSOT Package
LTC3406
600mA (IOUT), 1.5MHz, Synchronous Step-Down
DC/DC Converter
96% Efficiency, VIN = 2.5V to 5.5V, VOUT = 0.6V, IQ = 20µA,
ISD = <1µA, ThinSOT Package
LTC3409
600mA (IOUT), 1.5MHz/2.25MHz, Synchronous
Step-Down DC/DC Converter
95% Efficiency, VIN = 1.6V to 5.5V, VOUT = 0.613V, IQ = 65µA,
DD8 Package
LTC3410B
300mA (IOUT), 2.25MHz, Synchronous Step-Down
DC/DC Converter with Burst Disabled
96% Efficiency, VIN = 2.5V to 3.5V, VOUT(MIN) = 0.8V, IQ = 200µA,
ISD = <1µA, SC70 Package
LTC3411
1.25A (IOUT), 4MHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN = 2.5V to 5.5V, VOUT = 0.8V, IQ = 60µA,
ISD = <1µA, MS Package
LTC3412
2.5A (IOUT), 4MHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN = 2.5V to 5.5V, VOUT = 0.8V, IQ = 60µA,
ISD = <1µA, TSSOP-16E Package
LTC3440
600mA (IOUT), 2MHz, Synchronous Buck-Boost
DC/DC Converter
95% Efficiency, VIN = 2.5V to 5.5V, VOUT = 2.5V, IQ = 25µA,
ISD = <1µA, MS Package
3410fb
16
Linear Technology Corporation
LT 0806 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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© LINEAR TECHNOLOGY CORPORATION 2005