ADSP-BF537 EZ-KIT Lite Evaluation System Manual (Rev. 2.2)

ADSP-BF537 EZ-KIT Lite®
Evaluation System Manual
Revision 2.2, May 2007
Part Number
82-000865-01
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106
a
Copyright Information
©2007 Analog Devices, Inc., ALL RIGHTS RESERVED. This document
may not be reproduced in any form without prior, express written consent
from Analog Devices, Inc.
Printed in the USA.
Limited Warranty
The EZ-KIT Lite evaluation system is warranted against defects in materials and workmanship for a period of one year from the date of purchase
from Analog Devices or from an authorized dealer.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices icon bar and logo, VisualDSP++, the VisualDSP++
logo, Blackfin, the Blackfin logo, the CROSSCORE logo, EZ-KIT Lite,
and EZ-Extender are registered trademarks of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Regulatory Compliance
The ADSP-BF537 EZ-KIT Lite is designed to be used solely in a laboratory environment. The board is not intended for use as a consumer end
product or as a portion of a consumer end product. The board is an open
system design which does not include a shielded enclosure and therefore
may cause interference to other electrical devices in close proximity. This
board should not be used in or near any medical equipment or RF devices.
The ADSP-BF537 EZ-KIT Lite has been certified to comply with the
essential requirements of the European EMC directive 89/336/EEC
amended by 93/68/EEC and therefore carries the “CE” mark.
The ADSP-BF537 EZ-KIT Lite has been appended to Analog Devices,
Inc. Technical Construction File (TCF) referenced ‘DSPTOOLS1’ dated
December 21, 1997 and was awarded CE Certification by an appointed
European Competent Body as listed below.
Technical Certificate No: Z600ANA1.021
Issued by: Technology International (Europe) Limited
60 Shrivenham Hundred Business Park
Shrivenham, Swindon, SN6 8TY, UK
The EZ-KIT Lite evaluation system contains ESD (electrostatic
discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without
detection. Permanent damage may occur on devices subjected to
high-energy discharges. Proper ESD precautions are recommended
to avoid performance degradation or loss of functionality. Store
unused EZ-KIT Lite boards in the protective shipping package.
CONTENTS
PREFACE
Purpose of This Manual ................................................................ xv
Intended Audience ......................................................................... xvi
Manual Contents .......................................................................... xvi
What’s New in This Manual .......................................................... xvii
Technical or Customer Support ..................................................... xvii
Supported Processors ..................................................................... xviii
Product Information ..................................................................... xviii
MyAnalog.com ........................................................................ xviii
Processor Product Information ................................................. xix
Related Documents ................................................................. xix
Online Technical Documentation ............................................ xxi
Accessing Documentation From VisualDSP++ ..................... xxi
Accessing Documentation From Windows ........................... xxii
Accessing Documentation From Web .................................. xxii
Printed Manuals ...................................................................... xxii
VisualDSP++ Documentation Set ........................................ xxiii
Hardware Tools Manuals ..................................................... xxiii
Processor Manuals ............................................................... xxiii
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
v
CONTENTS
Data Sheets ........................................................................ xxii
Notation Conventions ................................................................. xxiv
USING ADSP-BF537 EZ-KIT LITE
Package Contents ......................................................................... 1-3
Default Configuration .................................................................. 1-4
Installation and Session Startup ..................................................... 1-4
Evaluation License Restrictions ..................................................... 1-7
Memory Map ............................................................................... 1-8
SDRAM Interface ......................................................................... 1-9
Flash Memory ............................................................................ 1-11
CAN Interface ............................................................................ 1-12
Ethernet Interface ....................................................................... 1-12
ELVIS Interface .......................................................................... 1-13
Audio Interface ........................................................................... 1-14
LEDs and Push Buttons .............................................................. 1-15
Example Programs ...................................................................... 1-15
Background Telemetry Channel .................................................. 1-16
ADSP-BF537 EZ-KIT LITE HARDWARE REFERENCE
System Architecture ...................................................................... 2-2
External Bus Interface Unit ..................................................... 2-3
SPORT0 Audio Interface ........................................................ 2-4
SPI Interface ........................................................................... 2-4
Programmable Flags (PFs) ....................................................... 2-4
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ADSP-BF537 EZ-KIT Lite Evaluation System Manual
CONTENTS
UART Port .............................................................................. 2-7
Expansion Interface ................................................................. 2-7
JTAG Emulation Port .............................................................. 2-8
Jumper and Switch Settings ........................................................... 2-9
CAN Enable Switch (SW2) ...................................................... 2-9
Ethernet Mode Select Switch (SW3) ...................................... 2-10
UART Enable Switch (SW4) .................................................. 2-11
Push Button Enable Switch (SW5) ......................................... 2-11
Flash Enable Switch (SW6) .................................................... 2-12
Audio Enable Switch (SW7) .................................................. 2-12
Boot Mode Select Switch (SW16) .......................................... 2-13
3V Power Selection Jumper (JP3) ........................................... 2-14
Expansion Interface Voltage Selection Jumper (JP5) ............... 2-14
UART Loop Jumper (JP9) ..................................................... 2-16
ELVIS Oscilloscope Configuration Switch (SW1) ................... 2-16
ELVIS Function Generator Configuration Switch (SW8) ........ 2-17
ELVIS Voltage Selection Jumper (JP6) ................................... 2-18
ELVIS Select Jumper (JP8) .................................................... 2-18
LEDs and Push Buttons .............................................................. 2-19
Reset Push Button (SW9) ...................................................... 2-19
Programmable Flag Push Buttons (SW10–13) ........................ 2-20
Power LED (LED7) ............................................................... 2-20
Reset LED (LED8) ................................................................ 2-20
User LEDs (LED1–6) ............................................................ 2-21
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
vii
CONTENTS
USB Monitor LED (ZLED3) ................................................ 2-21
Connectors ................................................................................. 2-22
Audio Connectors (J9 and J10) ............................................. 2-23
CAN Connectors (J5 and J11) .............................................. 2-23
Ethernet Connector (J4) ....................................................... 2-23
RS-232 Connector (J6) ......................................................... 2-24
Power Connector (J7) ........................................................... 2-24
Expansion Interface Connectors (J1–3) .................................. 2-24
JTAG Connector (ZP4) ......................................................... 2-25
SPORT0 Connector (P6) ...................................................... 2-25
SPORT1 Connector (P7) ...................................................... 2-26
PPI Connector (P8) .............................................................. 2-26
SPI Connector (P9) ............................................................... 2-26
Two-Wire Interface Connector (P10) ..................................... 2-27
TIMERS Connector (P11) .................................................... 2-27
UART1 Connector (P12) ...................................................... 2-27
ADSP-BF537 EZ-KIT LITE BILL OF MATERIALS
ADSP-BF537 EZ-KIT LITE SCHEMATIC
Title Page ..................................................................................... B-1
ADSP-BF537 Processor ................................................................ B-2
SDRAM and Flash ....................................................................... B-3
ADC and Audio In ....................................................................... B-4
DAC and Audio Out .................................................................... B-5
viii
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
CONTENTS
Ethernet and CAN ....................................................................... B-6
Push Buttons, LEDs, and Boot Mode ........................................... B-7
ELVIS Interface ........................................................................... B-8
Expansion Interface and JTAG ..................................................... B-9
Stamp Connectors ...................................................................... B-10
Power ........................................................................................ B-11
INDEX
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ix
x
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
PREFACE
Thank you for purchasing the ADSP-BF537 EZ-KIT Lite®, Analog
Devices, Inc. evaluation system for Blackfin® processors.
Blackfin processor family embodies a new type of embedded processor
designed specifically to meet the computational demands and power constraints of today’s embedded audio, video, and communications
applications. They deliver breakthrough signal-processing performance
and power efficiency within a reduced instruction set computing (RISC)
programming model.
Blackfin processors support a media instruction set computing (MISC)
architecture. This architecture is the natural merging of RISC, media
functions, and digital signal processing (DSP) characteristics. Blackfin
processors deliver signal-processing performance in a microprocessor-like
environment.
Based on the Micro Signal Architecture (MSA), Blackfin processors combine a 32-bit RISC instruction set, dual 16-bit multiply accumulate
(MAC) DSP functionality, and 8-bit video processing performance that
had previously been the exclusive domain of very-long instruction word
(VLIW) media processors.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
xi
The evaluation board is designed to be used in conjunction with the VisualDSP++® development environment to test the capabilities of
ADSP-BF537 Blackfin processors. The VisualDSP++ development environment gives you the ability to perform advanced application code
development and debug, such as:
• Create, compile, assemble, and link application programs written
in C++, C, and ADSP-BF537 assembly
• Load, run, step, halt, and set breakpoints in application programs
• Read and write data and program memory
• Read and write core and peripheral registers
• Plot memory
Access to the ADSP-BF537 processor from a personal computer (PC) is
achieved through a USB port or an optional JTAG emulator. The USB
interface gives unrestricted access to the ADSP-BF537 processor and the
evaluation board peripherals. Analog Devices JTAG emulators offer faster
communication between the host PC and target hardware. Analog Devices
carries a wide range of in-circuit emulation products. To learn more about
Analog Devices emulators and processor development tools, go to
http://www.analog.com/dsp/tools/.
The ADSP-BF537 EZ-KIT Lite provides example programs to demonstrate the capabilities of the evaluation board.
ADSP-BF537 EZ-KIT Lite installation is part of the VisuL The
alDSP++ installation. The EZ-KIT Lite is a licensed product that
offers an unrestricted evaluation license for the first 90 days. For
details about evaluation license restrictions after the 90 days, refer
to “Evaluation License Restrictions” on page 1-7 and the VisualDSP++ Installation Quick Reference Card.
xii
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
Preface
The board features:
• Analog Devices ADSP-BF537 Blackfin processor
D
D
D
D
Core performance up to 600 MHz
External bus performance to 133 MHz
182-pin mini-BGA package
25 MHz crystal
• Synchronous dynamic random access memory (SDRAM)
D
MT48LC32M8 – 64 MB (8M x 8-bits x 4 banks) x 2 chips
• Flash memory
D
4 MB (2M x 16-bits)
• Analog audio interface
D
D
D
D
AD1871 96 kHz analog-to-digital codec (ADC)
AD1854 96 kHz digital-to-audio codec (DAC)
1 input stereo jack
1 output stereo jack
• Ethernet interface
D
D
10-BaseT (10 Mbits/sec) and 100-BaseT (100 Mbits/sec)
Ethernet Media Access Controller (MAC)
SMSC LAN83C185 device
• Controller Area Network (CAN) interface
D
Philips TJA1041 high-speed CAN transceiver
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
xiii
• National Instruments Educational Laboratory Virtual Instrumentation Suite (ELVIS) interface
D
D
D
LabVIEW™-based virtual instruments
Multifunction data acquisition device
Bench-top workstation and prototype board
• Universal asynchronous receiver/transmitter (UART)
D
D
ADM3202 RS-232 line driver/receiver
DB9 female connector
• LEDs
D
10 LEDs: 1 power (green), 1 board reset (red), 1 USB (red),
6 general-purpose (amber), and 1 USB monitor (amber)
• Push buttons
D
5 push buttons: 1 reset, 4 programmable flags with
debounce logic
• Expansion interface
D
All processor signals
• Other features
D
JTAG ICE 14-pin header
The EZ-KIT Lite board has flash memory with a total of 4 MB. The flash
memory can be used to store user-specific boot code, allowing the board
to run as a stand-alone unit. For more information, see “Flash Memory”
on page 1-11. The board also has 64 MB of SDRAM, which can be used
by the user at runtime.
xiv
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
Preface
interfaces with the audio circuit, facilitating development of audio
signal processing applications. SPORT0 also connects to an off-board connector for communication with other serial devices. For more
information, see “SPORT0 Audio Interface” on page 2-4.
SPORT0
The UART of the processor connects to an RS-232 line driver and a DB9
female connector, providing an interface to a PC or other serial device.
Additionally, the EZ-KIT Lite board provides access to all of the processor’s peripheral ports. Access is provided in the form of a three-connector
expansion interface. For more information, see “Expansion Interface” on
page 2-7.
Purpose of This Manual
The ADSP-BF537 EZ-KIT Lite Evaluation System Manual provides
instructions for installing the product hardware (board). The text
describes the operation and configuration of the board components and
provides guidelines for running your own code on the ADSP-BF537
EZ-KIT Lite. Finally, a schematic and a bill of materials are provided as a
reference for future designs.
EZ-KIT Lite users should use this manual in conjunction with the Getting
Started with ADSP-BF537 EZ-KIT Lite, which familiarizes users with the
hardware capabilities of the evaluation system and demonstrates how to
access these capabilities in the VisualDSP++ environment.
The product software installation is detailed in the VisualDSP++ Installation Quick Reference Card.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
xv
Intended Audience
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set. Programmers who are unfamiliar with Analog Devices
processors can use this manual but should supplement it with other texts
(such as the ADSP-BF537 Blackfin Processor Hardware Reference and
Blackfin Processor Instruction Set Reference) that describe your target
architecture.
Programmers who are unfamiliar with VisualDSP++ should refer to the
VisualDSP++ online Help and user’s or getting started guides. For the
locations of these documents, see “Related Documents”.
Manual Contents
The manual consists of:
• Chapter 1, “Using ADSP-BF537 EZ-KIT Lite” on page 1-1
Describes the EZ-KIT Lite functionality from a programmer’s perspective and provides an easy-to-access memory map.
• Chapter 2, “ADSP-BF537 EZ-KIT Lite Hardware Reference” on
page 2-1
Provides information on the EZ-KIT Lite hardware components.
• Appendix A, “ADSP-BF537 EZ-KIT Lite Bill Of Materials” on
page A-1
Provides a list of components used to manufacture the EZ-KIT
Lite board.
xvi
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
Preface
• Appendix B, “ADSP-BF537 EZ-KIT Lite Schematic” on page B-1
Provides the resources to allow EZ-KIT Lite board-level debugging
or to use as a reference design.
B now is part of the online Help. The PDF version of
L Appendix
the ADSP-BF537 EZ-KIT Lite Evaluation System Manual is located
in the Docs\EZ-KIT Lite Manuals folder on the installation CD.
Alternatively, the schematics can be found on the Analog Devices
Web site, www.analog.com/processors.
What’s New in This Manual
The ADSP-BF537 EZ-KIT Lite Evaluation System Manual has been
updated for the current revision of VisualDSP++.
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following
ways:
• Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technicalSupport
• E-mail tools questions to
[email protected]
• E-mail processor questions to
[email protected] (World wide support)
[email protected] (Europe support)
[email protected] (China support)
• Phone questions to 1-800-ANALOGD
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
xvii
Supported Processors
• Contact your Analog Devices, Inc. local sales office or authorized
distributor
• Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
This evaluation system supports Analog Devices ADSP-BF537 Blackfin
embedded processors.
Product Information
You can obtain product information from the Analog Devices Web site,
from the product CD-ROM, or from printed publications (manuals).
Analog Devices is online at www.analog.com. Our Web site provides information about a broad range of products—analog integrated circuits,
amplifiers, converters, and digital signal processors.
MyAnalog.com
MyAnalog.com is a free feature of the Analog Devices Web site that allows
customization of a Web page to display only the latest information on
products you are interested in. You can also choose to receive weekly
e-mail notifications containing updates to the Web pages that meet your
interests. MyAnalog.com provides access to books, application notes, data
sheets, code examples, and more.
xviii
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
Preface
Registration:
Visit www.myanalog.com to sign up. Click Register to use MyAnalog.com.
Registration takes about five minutes and serves as means for you to select
the information you want to receive.
If you are already a registered user, just log on. Your user name is your
e-mail address.
Processor Product Information
For information on embedded processors and DSPs, visit our Web site at
www.analog.com/processors, which provides access to technical publications, data sheets, application notes, product overviews, and product
announcements.
You may also obtain additional information about Analog Devices and its
products in any of the following ways.
• E-mail questions or requests for information to
[email protected] (World wide support)
[email protected] (Europe support)
[email protected] (China support)
• Fax questions or requests for information to
1-781-461-3010 (North America)
+49-89-76903-157 (Europe)
Related Documents
For information on product related development software, see the following publications.
you plan to use the EZ-KIT Lite board in conjunction with a
L IfJTAG
emulator, also refer to the documentation that accompanies
the emulator.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
xix
Product Information
Table 1. Related Processor Publications
Title
Description
ADSP-BF536/ADSP-BF537 Embedded Processor
Data Sheet
General functional description, pinout, and
timing.
ADSP-BF537 Blackfin Processor Hardware Reference
Description of internal processor architecture and all register functions.
Blackfin Processor Programming Reference
Description of all allowed processor assembly instructions.
Table 2. Related VisualDSP++ Publications
Title
Description
ADSP-BF537 EZ-KIT Lite Evaluation System
Manual
Description of the hardware capabilities of
the evaluation system; description of how to
access these capabilities in the VisualDSP++
environment.
VisualDSP++ User’s Guide
Description of VisualDSP++ features and
usage.
VisualDSP++ Assembler and Preprocessor Manuals
Description of the assembler function and
commands.
VisualDSP++ C/C++ Complier and Library Manual for Blackfin Processors
Description of the complier function and
commands for Blackfin processors.
VisualDSP++ Linker and Utilities Manual
Description of the linker function and commands.
VisualDSP++ Loader and Utilities Manual
Description of the loader/splitter function
and commands.
All documentation is available online. Most documentation is available in
printed form.
Visit the Technical Library Web site to access all processor and tools manuals and data sheets:
http://www.analog.com/processors/technicalSupport/technicalLibrary/.
xx
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
Preface
Online Technical Documentation
Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, the Dinkum
Abridged C++ library, and Flexible License Manager (FlexLM) network
license manager software documentation. You can easily search across the
entire VisualDSP++ documentation set for any topic of interest. For easy
printing, supplementary .pdf files of most manuals are provided in the
Docs folder on the VisualDSP++ installation CD.
Each documentation file type is described as follows.
File
Description
.chm
Help system files and manuals in Help format
.htm or
.html
Dinkum Abridged C++ library and FlexLM network license manager software documentation. Viewing and printing the .html files requires a browser, such as
Internet Explorer 6.0 (or higher).
.pdf
VisualDSP++ and processor manuals in Portable Documentation Format (PDF).
Viewing and printing the .pdf files requires a PDF reader, such as Adobe Acrobat
Reader (4.0 or higher).
If documentation is not installed on your system as part of the software
installation, you can add it from the VisualDSP++ CD at any time by running the Tools installation. Access the online documentation from the
VisualDSP++ environment, Windows® Explorer, or the Analog Devices
Web site.
Accessing Documentation From VisualDSP++
To view VisualDSP++ Help, click on the Help menu item or go to the
Windows task bar and navigate to the VisualDSP++ documentation via
the Start menu.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
xxi
Product Information
To view ADSP-BF537 EZ-KIT Lite Help, which is part of the VisualDSP++ Help system, use the Contents or Search tab of the Help
window.
Accessing Documentation From Windows
In addition to any shortcuts you may have constructed, there are many
ways to open VisualDSP++ online Help or the supplementary documentation from Windows.
Help system files (.chm) are located in the Help folder, and .pdf files are
located in the Docs folder of your VisualDSP++ installation CD-ROM.
The Docs folder also contains the Dinkum Abridged C++ library and the
FlexLM network license manager software documentation.
Your software installation kit includes online Help as part of the Windows
interface. These help files provide information about VisualDSP++ and
the ADSP-BF537 EZ-KIT Lite evaluation system.
Accessing Documentation From Web
Download manuals at the following Web site:
http://www.analog.com/processors/technicalSupport/technicalLibrary/.
Select a processor family and book title. Download archive (.zip) files,
one for each manual. Use any archive management software, such as WinZip, to decompress downloaded files.
Printed Manuals
For general questions regarding literature ordering, call the Literature
Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts.
xxii
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
Preface
VisualDSP++ Documentation Set
To purchase VisualDSP++ manuals, call 1-603-883-2430. The manuals
may be purchased only as a kit.
If you do not have an account with Analog Devices, you are referred to
Analog Devices distributors. For information on our distributors, log onto
http://www.analog.com/salesdir/continent.asp.
Hardware Tools Manuals
To purchase EZ-KIT Lite and in-circuit emulator (ICE) manuals, call
1-603-883-2430. The manuals may be ordered by title or by product
number located on the back cover of each manual.
Processor Manuals
Hardware reference and instruction set reference manuals may be ordered
through the Literature Center at 1-800-ANALOGD (1-800-262-5643),
or downloaded from the Analog Devices Web site. Manuals may be
ordered by title or by product number located on the back cover of each
manual.
Data Sheets
All data sheets (preliminary and production) may be downloaded from the
Analog Devices Web site. Only production (final) data sheets (Rev. 0, A,
B, C, and so on) can be obtained from the Literature Center at
1-800-ANALOGD (1-800-262-5643); they also can be downloaded from
the Web site.
To have a data sheet faxed to you, call the Analog Devices Faxback System
at 1-800-446-6212. Follow the prompts and a list of data sheet code
numbers will be faxed to you. If the data sheet you want is not listed,
check for it on the Web site.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
xxiii
Notation Conventions
Notation Conventions
Text conventions used in this manual are identified and described as
follows.
Example
Description
Close command
(File menu)
Titles in reference sections indicate the location of an item within the
VisualDSP++ environment’s menu system (for example, the Close command appears on the File menu).
{this | that}
Alternative required items in syntax descriptions appear within curly
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.
[this | that]
Optional items in syntax descriptions appear within brackets and separated by vertical bars; read the example as an optional this or that.
[this,…]
Optional item lists in syntax descriptions appear within brackets delimited by commas and terminated with an ellipse; read the example as an
optional comma-separated list of this.
.SECTION
Commands, directives, keywords, and feature names are in text with
letter gothic font.
filename
Non-keyword placeholders appear in text with italic style format.
L
a
[
xxiv
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
Warning: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Warning
appears instead of this symbol.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
1 USING ADSP-BF537 EZ-KIT
LITE
This chapter provides specific information to assist you with development
of programs for the ADSP-BF537 EZ-KIT Lite evaluation system.
The information appears in the following sections.
• “Package Contents” on page 1-3
Lists the items contained in your ADSP-BF537 EZ-KIT Lite
package.
• “Default Configuration” on page 1-4
Shows the default configuration of the ADSP-BF537 EZ-KIT Lite.
• “Installation and Session Startup” on page 1-4
Instructs how to start a new or open an existing ADSP-BF537
EZ-KIT Lite session using VisualDSP++.
• “Evaluation License Restrictions” on page 1-7
Describes the restrictions of the VisualDSP++ demo license
shipped with the EZ-KIT Lite.
• “Memory Map” on page 1-8
Defines the ADSP-BF537 EZ-KIT Lite board’s memory map.
• “SDRAM Interface” on page 1-9·
Defines the register values to configure the on-board SDRAM.
• “Flash Memory” on page 1-11
Describes the on-board flash memory.
• “CAN Interface” on page 1-12
Describes the on-board Controller Area Network (CAN) interface.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
1-1
• “Ethernet Interface” on page 1-12
Describes the on-board Fast Ethernet Media Access Controller
(MAC) interface.
• “ELVIS Interface” on page 1-13
Describes the on-board National Instruments Educational Laboratory Virtual Instrumentation Suite (NI ELVIS) interface.
• “Audio Interface” on page 1-14
Describes the on-board audio circuit.
• “LEDs and Push Buttons” on page 1-15
Describes the board’s general-purpose IO pins and buttons.
• “Background Telemetry Channel” on page 1-16
Highlights the advantages of the background telemetry channel
(BTC) feature of VisualDSP++.
For information on the graphical user interface, including the boot loading, target options, and other facilities of the EZ-KIT Lite system, refer to
the online Help.
For more detailed information about programming the ADSP-BF537
Blackfin processor, see the documents referred to as “Related
Documents”.
1-2
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
Using ADSP-BF537 EZ-KIT Lite
Package Contents
Your ADSP-BF537 EZ-KIT Lite evaluation system package contains the
following items.
• ADSP-BF537 EZ-KIT Lite board
• VisualDSP++ Installation Quick Reference Card
• CD containing:
D
VisualDSP++ software
D
ADSP-BF537 EZ-KIT Lite debug software
D
USB driver files
D
Example programs
D
ADSP-BF537 EZ-KIT Lite Evaluation System Manual (this
document)
• Universal 7V DC power supply
• 7-foot Ethernet crossover cable
• 7-foot Ethernet patch cable
• 6-foot 3.5 mm male-to-male audio cable
• 3.5 mm headphones
• 10-foot USB 2.0 cable
• Registration card (please fill out and return)
If any item is missing, contact the vendor where you purchased your
EZ-KIT Lite or contact Analog Devices, Inc.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
1-3
Default Configuration
Default Configuration
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate
on the human body and equipment and can discharge without
detection. Permanent damage may occur on devices subjected to
high-energy discharges. Proper ESD precautions are recommended
to avoid performance degradation or loss of functionality. Store
unused EZ-KIT Lite boards in the protective shipping package.
The ADSP-BF537 EZ-KIT Lite board is designed to run outside your personal computer as a stand-alone unit. You do not have to open your
computer case.
When removing the EZ-KIT Lite board from the package, handle the
board carefully to avoid the discharge of static electricity, which may damage some components. Figure 1-1 shows the default jumper settings,
switches, connector locations, and LEDs used in installation. Confirm
that your board is in the default configuration before using the board.
Installation and Session Startup
correct operation, install the software and hardware in the
L For
order presented in the VisualDSP++ Installation Quick Reference
Card.
1. Verify that the yellow USB monitor LED (ZLED3, located near the
USB connector) is lit. This signifies that the board is communicating properly with the host PC and is ready to run VisualDSP++.
2. If you are running VisualDSP++ for the first time, navigate to the
VisualDSP++ environment via the Start –>Programs menu. The
main window appears. Note that VisualDSP++ does not connect to
any session. Skip the rest of this step to step 3.
1-4
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
Using ADSP-BF537 EZ-KIT Lite
Figure 1-1. EZ-KIT Lite Hardware Setup
If you have run VisualDSP++ previously, the last opened session
appears on the screen. You can override the default behavior and
force VisualDSP++ to start a new session by pressing and holding
down the Ctrl key while starting VisualDSP++. Do not release the
Ctrl key until the Session Wizard appears on the screen. Go to
step 4.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
1-5
Installation and Session Startup
3. To connect to a new EZ-KIT Lite session, start Session Wizard by
selecting one of the following.
• From the Session menu, New Session.
• From the Session menu, Session List. Then click New Session from the Session List dialog box.
• From the Session menu, Connect to Target.
4. The Select Processor page of the wizard appears on the screen.
Ensure Blackfin is selected in Processor family. In Choose a target
processor, select ADSP-BF537. Click Next.
5. The Select Connection Type page of the wizard appears on the
screen. Select EZ-KIT Lite and click Next.
6. The Select Platform page of the wizard appears on the screen.
In the Select your platform list, select ADSP-BF537 EZ-KIT Lite
via Debug Agent. In Session name, highlight or specify the session
name.
The session name can be a string of any length; although, the box
displays approximately 32 characters. The session name can
include space characters. If you do not specify a session name,
VisualDSP++ creates a session name by combining the name of the
selected platform with the selected processor. The only way to
change a session name later is to delete the session and to open a
new session.
Click Next.
7. The Finish page of the wizard appears on the screen. The page displays your selections. Check the selections. If you are not satisfied,
click Back to make changes; otherwise, click Finish. VisualDSP++
1-6
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
Using ADSP-BF537 EZ-KIT Lite
creates the new session and connects to the EZ-KIT Lite. Once
connected, the main window’s title is changed to include the session name set in step 6.
disconnect from a session, click the disconnect button
L Toor select
Session–>Disconnect from Target.
To delete a session, select Session –> Session List. Select the session name from the list and click Delete. Click OK.
Evaluation License Restrictions
The ADSP-BF537 EZ-KIT Lite installation is part of the VisualDSP++
installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. Once the initial
unrestricted 90-day evaluation license expires:
• VisualDSP++ allows a connection to the ADSP-BF537 EZ-KIT
Lite via the USB debug agent interface only. Connections to simulators and emulation products are no longer allowed.
• The linker restricts a users program to 20 KB of internal memory
for code space with no restrictions for data space.
EZ-KIT Lite hardware must be connected and powered up to
L The
use VisualDSP++ with a valid evaluation or permanent license.
Refer to the VisualDSP++ Installation Quick Reference Card for details.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
1-7
Memory Map
Memory Map
The ADSP-BF537 processor has internal SRAM that can be used for
instruction or data storage. The configuration of internal SRAM is
detailed in the ADSP-BF537 Blackfin Processor Hardware Reference.
The ADSP-BF537 EZ-KIT Lite board includes two types of external
memory, SDRAM and flash.
The size of the SDRAM is 64 Mbytes (32M x 16-bit). The processor’s
memory select pin, ~SMS0, is configured for the SDRAM.
The size of the flash memory is 4 Mbytes (2M x 16-bits). The processor’s
asynchronous memory select pins, ~AMS3–0, are configured for the flash.
Table 1-1. EZ-KIT Lite Evaluation Board Memory Map
Start Address
External
Memory
End Address
Content
0x0000 0000
0x03FF FFFF
SDRAM bank 0 (SDRAM). See “SDRAM Interface” on page 1-9.
0x2000 0000
0x200F FFFF
ASYNC memory bank 0. See “Flash Memory” on
page 1-11.
0x2010 0000
0x201F FFFF
ASYNC memory bank 1. See “Flash Memory” on
page 1-11.
0x2020 0000
0x202F FFFF
ASYNC memory bank 2. See “Flash Memory” on
page 1-11.
0x2030 0000
0x203F FFFF
ASYNC memory bank 3. See “Flash Memory” on
page 1-11.
0x203F 0000
All other locations
1-8
MAC address
Not used
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
Using ADSP-BF537 EZ-KIT Lite
Table 1-1. EZ-KIT Lite Evaluation Board Memory Map (Cont’d)
Start Address
Internal
Memory
End Address
Content
0xFF80 0000
0xFF80 3FFF
Data bank A SRAM 16 KB
0xFF80 4000
0xFF80 7FFF
Data bank A SRAM/CACHE 16 KB
0xFF90 0000
0xFF90 7FFF
Data bank B SRAM 16 KB
0xFF90 4000
0xFF90 7FFF
Data bank B SRAM/CACHE 16 KB
0xFFA0 0000
0xFFA0 7FFF
Instruction bank A SRAM 32 KB
0xFFA1 0000
0xFFA1 3FFF
Instruction bank B SRAM 16 KB
0xFFA0 8000
0xFFA0 BFFF
Instruction SRAM/CACHE 16 KB
0xFFB0 0000
0xFFB0 0FFF
Scratch pad SRAM 4 KB
0xFFC0 0000
0xFFDF FFFF
System MMRs 2 MB
0xFFE0 0000
0xFFFF FFFF
Core MMRs 2 MB
All other locations
Reserved
SDRAM Interface
The three SDRAM control registers must be initialized in order to use the
MT48LC32M8A2 32M x 16 bits (64 MB) SDRAM memory. When you
are in a VisualDSP++ session and connect to the EZ-KIT Lite board, the
SDRAM registers are configured automatically through the debugger each
time the processor is reset. The values in Table 1-2 are used whenever
SDRAM bank 0 is accessed through the debugger (for example, when
viewing memory windows or loading a program). The numbers were
derived for maximum flexibility and work for a system clock frequency
between 54 MHz and 133 MHz.
To re-write the EBIU_SDGCTL register within the user code, first, place the
chip in self-refresh (see the ADSP-BF537 Blackfin Processor Hardware Reference). Clearing the appropriate checkbox on the Target Options dialog
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
1-9
SDRAM Interface
Table 1-2. EZ-KIT Lite Session SDRAM Default Settings1
Register
Value
Function
EBIU_SDGCTL
0x0091998D
Calculated with SCLK = 133 MHz
16-bit data path
External buffering timing disabled
tWR = 2 SCLK cycles
tRCD = 3 SCLK cycles
tRP = 3 SCLK cycles
tRAS = 6 SCLK cycles
pre-fetch disabled
CAS latency = 3 SCLK cycles
SCLK1 disabled
EBIU_SDBCTL
0x00000025
Bank 0 enabled
Bank 0 size = 64 MB
Bank 0 column address width = 10 bits
EBIU_SDRRC
0x000003A0
Calculated with SCLK = 54 MHz
RDIV = 416 clock cycles
1
54 MHz <=SCLK <= 133 MHz.
box, which is accessible through the Settings pull-down menu, disables
the automatic and allows manual configuration. For more information,
see online Help.
The automatic configuration of SDRAM is not optimized for any SCLK
frequency. Table 1-3 shows the optimized configuration for the SDRAM
registers using a 120 MHz and 133 MHz SCLK. Only the EBIU_SDRRC register needs to be modified in the user code to achieve maximum
performance.
Table 1-3. SDRAM Optimum Settings
Register
SCLK = 133 MHz
(CCLK = 400 MHz)
SCLK = 120 MHz
(CCLK = 600 MHz)
EBIU_SDGCTL
0x0091 998D
0x0091 998D
EBIU_SDBCTL
0x0000 0025
0x0000 0025
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ADSP-BF537 EZ-KIT Lite Evaluation System Manual
Using ADSP-BF537 EZ-KIT Lite
Table 1-3. SDRAM Optimum Settings (Cont’d)
Register
SCLK = 133 MHz
(CCLK = 400 MHz)
SCLK = 120 MHz
(CCLK = 600 MHz)
EBIU_SDRRC
0x0000 0408
0x0000 03A0
An example program is included in the EZ-KIT Lite installation directory
to demonstrate the SDRAM memory setup.
Flash Memory
The flash interface of the ADSP-BF537 EZ-KIT Lite contains a 4 MB
(2M x 16-bits) ST Micro M29W320DB device. The size of the flash
memory is controlled by the flash address range switch, SW6. See “Flash
Enable Switch (SW6)” on page 2-12. The default for the SW6 switch is all
positions ON, which allows the user to have access to the full 4 MB of the
flash memory. If any of the ~AMS signals needs to connect to the board by
plugging into the expansion interface, the signal can be disconnected from
the flash by turning OFF the appropriate position of the SW6 switch. Each
~AMS signal accounts for 1 MB of flash memory. The amount of available
flash memory decreases as ~AMS signals are being turned OFF.
The last sector in the flash memory (0x1F8000–0x1FFFFF) is reserved for
the MAC address, which can be found on the back of the board. Each
board has a unique MAC address. The sector is protected and is not erased
even when the entire flash erase command is issued.
Example code is provided in the EZ-KIT Lite installation directory to
demonstrate how to program the flash memory.
Table 1-4 shows a sample value for the asynchronous memory configuration register, EBIU_AMBCTL0.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
1-11
CAN Interface
Table 1-4. Asynchronous Memory Control Register Setting Example
Register
Value
Function
EBIU_AMBCTL0
0x7BB07BB0
Timing control for banks 1 and 0
CAN Interface
The Controller Area Network interface contains a Philips TJA1041
high-speed CAN transceiver. The PF14 programmable flag connects to the
enable control input (EN). The PF15 programmable flag connects to the
standby control input (~STB). The PF13 programmable flag connects to the
error and power-on indication output (ERR). The PJ4 of the processor connects to the receive data output (RXD), and PJ5 connects to the transmit
data input (TXD).
The CAN interface can be disconnected from the processor by turning
positions 1 though 4 of the SW2 switch OFF. When in the OFF position, the
signals can be used elsewhere on the board. See “CAN Enable Switch
(SW2)” on page 2-9 for more information.
The CAN interface contains two 4-position modular connectors (see
“CAN Connectors (J5 and J11)” on page 2-23).
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate CAN circuit operation.
Ethernet Interface
The ADSP-BF537 processor is able to connect to a network directly, with
the help of an embedded Fast Ethernet MAC. The MAC supports both
10-BaseT (10 Mbits/sec) and 100-BaseT (100 Mbits/sec) operations. The
10/100 Ethernet MAC peripheral of the ADSP-BF537 processor is fully
1-12
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
Using ADSP-BF537 EZ-KIT Lite
compliant with the IEEE 802.3-2002 standard and provides programmable features designed to minimize supervision, bus utilization, or message
processing by the rest of the processor system.
The Ethernet interface contains a SMSC LAN83C185 device. The
LAN83C185 is a low-power highly-integrated analog interface IC for
high-performance embedded Ethernet applications.
The Ethernet connector, J4, is a RJ-45 type connector with built-in magnetics and LEDs (see “Ethernet Connector (J4)” on page 2-23).
The 802.3af Power-over-Ethernet (PoE) standard is supported when the
EZ-KIT Lite connects to a Blackfin USB-LAN EZ-Extender®.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate Ethernet circuit operation.
ELVIS Interface
This EZ-KIT Lite board contains the National Instruments ELVIS interface. The interface features the DC voltage and current measurement
modules, oscilloscope and bode analyzer modules, function generator,
arbitrary waveform generator, and digital IO.
The ELVIS interface is a NI LabVIEW-based design and prototype environment for university science and engineering laboratories. The ELVIS
interface consists of the LabVIEW-based virtual instruments, a multifunction data acquisition (DAQ) device, and a custom-designed bench-top
workstation and prototype board. This combination provides a
ready-to-use suite of instruments found in most educational laboratories.
Because the interface is based on the LabVIEW and provides complete
data acquisition and prototyping capabilities, the system is ideal for academic coursework that range from lower-division classes to advanced
project-based curriculums.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
1-13
Audio Interface
For more information on ELVIS and example demonstration programs,
visit National Instruments Web site at www.ni.com.
Audio Interface
The audio circuit of the EZ-KIT Lite consists of an AD1871 analog-to-digital converter (ADC) and an AD1854 digital-to-analog
converter (DAC). The audio circuit provides one channel of stereo input
and one channel of stereo output via 3.5 mm stereo jacks. The SPORT0
interface of the processor is linked with the stereo audio data input and
output pins of the audio circuit.
The frame sync and bit clocks are generated from the ADC and feed to the
processor because the ADC is operating in master mode. The audio interface samples data at a 48 kHz sample rate. The serial data interface
operates in two-wire interface (TWI) mode and connects to SPORT0 of the
processor.
The audio interface can be disconnected from the SPORT0 by turning
positions 1 and 5 of the SW7 switch OFF. When in the OFF position, the
SPORT0 signals can be used on the SPORT0 connector (P6) or on the expansion interface (see “SPORT0 Connector (P6)” on page 2-25 and “Audio
Enable Switch (SW7)” on page 2-12 for more information).
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate audio circuit operation.
1-14
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
Using ADSP-BF537 EZ-KIT Lite
LEDs and Push Buttons
The EZ-KIT Lite provides four push buttons and six LEDs for general-purpose IO.
The six LEDs, labeled LED1 through LED6, are accessed via the PF11–6 processor pins. For information on how to program the pins, refer to the
ADSP-BF537 Blackfin Processor Hardware Reference.
The four general-purpose push button are labeled SW10 through SW13. A
status of each individual button can be read through programmable flag
(PF) inputs, PF5 through PF2. A PF reads 1 when a corresponding switch is
being pressed-on. When the switch is released, the PF reads 0. A connection between the push button and PF input is established through the SW5
DIP switch. See “LEDs and Push Buttons” on page 2-19 for details.
An example program is included in the EZ-KIT Lite installation directory
to demonstrate the functionality of the LEDs and push buttons.
Example Programs
Example programs are provided with the ADSP-BF537 EZ-KIT Lite to
demonstrate various capabilities of the evaluation board. These programs
are installed with the EZ-KIT Lite software and can be found in the
…\Blackfin\Examples\ADSP-BF537 EZ-KIT Lite subdirectory of the VisualDSP++ installation directory. Please refer to the readme file provided
with each example for more information.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
1-15
Background Telemetry Channel
Background Telemetry Channel
The ADSP-BF537 USB debug agent supports the background telemetry
channel (BTC), which facilitates data exchange between VisualDSP++ and
the processor without interrupting processor execution.
The BTC allows you to view a variable as it is updated or changed, all
while the processor continues to execute. For increased performance of the
BTC, including faster reading and writing, please check our latest line
of processor emulators at:
http://www.analog.com/processors/blackfin/evaluationDevelopment/crosscore/.
For more information about the background telemetry
channel, see the VisualDSP++ User’s Guide or online Help.
1-16
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2 ADSP-BF537 EZ-KIT LITE
HARDWARE REFERENCE
This chapter describes the hardware design of the ADSP-BF537 EZ-KIT
Lite board. The following topics are covered.
• “System Architecture” on page 2-2
Describes the configuration of the ADSP-BF537 EZ-KIT Lite
board and explains how the board components interface with the
processor.
• “Jumper and Switch Settings” on page 2-9
Shows the location and describes the function of the configuration
jumpers and switches.
• “LEDs and Push Buttons” on page 2-19
Shows the location and describes the function of the LEDs and
push buttons.
• “Connectors” on page 2-22
Shows the location and gives the part number for all of the connectors on the board. Also, the manufacturer and part number
information is given for the mating parts.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2-1
System Architecture
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board.
Figure 2-1. System Architecture
This EZ-KIT Lite is designed to demonstrate the capabilities of the
ADSP-BF537 Blackfin processor. The processor has an IO voltage of
3.3V. The core voltage of the processor is supplied by the internal voltage
regulator.
2-2
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Hardware Reference
The core voltage and the core clock rate can be set on the fly by the processor. The input clock is 25 MHz. A 32.768 kHz crystal supplies the
real-time clock (RTC) inputs of the processor. The default boot mode for
the processor is flash boot. See “Boot Mode Select Switch (SW16)” on
page 2-13 for information about changing the default boot mode.
External Bus Interface Unit
The external bus interface unit (EBIU) connects external memory to the
ADSP-BF537 processor. The unit includes a 16-bit wide data bus, an
address bus, and a control bus. On the EZ-KIT Lite, the EBIU connects
to the SDRAM, flash, and expansion interfaces.
The 64 Mbytes (32M x 16 bits) of SDRAM connect to the synchronous
memory select 0 pin (~SMS0). Refer to “SDRAM Interface” on page 1-9
for information about configuring the SDRAM. Note that SDRAM clock
is the processor’s clock out (CLK OUT), which must not exceed 133 MHz.
The flash memory device connects to the asynchronous memory select signals, ~AMS3 through ~AMS0. The device provides a total of 4 Mbytes of
flash memory. The processor can use this memory for both booting and
storing information during normal operation. Refer to “Flash Memory”
on page 1-11 for details.
All of the address, data, and control signals are available externally via the
expansion interface (J1–3). The pinout of these connectors can be found
in “ADSP-BF537 EZ-KIT Lite Schematic” on page B-1.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2-3
System Architecture
SPORT0 Audio Interface
The SPORT0 interface connects to the audio circuit, the SPORT0 connector
(P6), and the expansion interface. The audio circuit uses the primary data
transmit and receive pins to input and output data from the audio input
and outputs.
The pinout of the SPORT and expansion interface connectors can be found
in “ADSP-BF537 EZ-KIT Lite Schematic” on page B-1.
SPI Interface
The serial peripheral interface (SPI) of the processor connects to the SPI
connector (P9) and the expansion interface.
Programmable Flags (PFs)
The processor has 48 general-purpose input/output (GPIO) signals spread
across three ports (PF, PG, and PH). The pins are multi-functional and
depend on the processor setup. Table 2-1 shows how the programmable
flag pins are used on the EZ-KIT Lite.
Table 2-1. Programmable Flag Connections
2-4
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PF0
GPIO/DMAR0
UART0
transmit
PF1
GPIO/DMAR1
UART0
receive
PF2
UART1_TX/TMR7
Push button (SW13). See “Programmable
Flag Push Buttons (SW10–13)” on
page 2-20.
PF3
UART1_RX/TMR6/TACI6
Push button (SW12). See “Programmable
Flag Push Buttons (SW10–13)” on
page 2-20.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Hardware Reference
Table 2-1. Programmable Flag Connections (Cont’d)
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PF4
TMR5/SPI_SSEL6
Push button (SW11). See “Programmable
Flag Push Buttons (SW10–13)” on
page 2-20.
PF5
TMR4/SPI_SSEL5
Push button (SW10). See “Programmable
Flag Push Buttons (SW10–13)” on
page 2-20.
PF6
TMR3/SPI_SSEL4
LED (LED1). See “LEDs and Push Buttons”
on page 1-15 and “Push Button Enable
Switch (SW5)” on page 2-11 for information on how to disable the push button.
PF7
TMR2/PPI_FS3
LED (LED2). See “LEDs and Push Buttons”
on page 1-15 and “Push Button Enable
Switch (SW5)” on page 2-11 for information on how to disable the push button.
PF8
TMR1/PPI_FS2
LED (LED3). See “LEDs and Push Buttons”
on page 1-15 and “Push Button Enable
Switch (SW5)” on page 2-11 for information on how to disable the push button.
PF9
TMR0/PPI_FS1
LED (LED4). See “LEDs and Push Buttons”
on page 1-15 for information on how to disable the push button.
PF10
SPI_SSEL1
LED (LED5). See “LEDs and Push Buttons”
on page 1-15 for information on how to disable the push button.
PF11
SPI_MOSI
LED (LED6). See “LEDs and Push Buttons”
on page 1-15 for information on how to disable the push button.
PF12
SPI_MISO
Audio reset
PF13
SPI_SCK
CAN ERR
PF14
SPI_SS/TACLK0
CAN EN
PF15
PPI4_CLK/TMRCLK
CAN STB
PG0
PPI_D0
ELVIS_TRIGGER
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2-5
System Architecture
Table 2-1. Programmable Flag Connections (Cont’d)
2-6
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PG1
PPI_D1
ELVIS_PF1
PG2
PPI_D2
ELVIS_PF2
PG3
PPI_D3
ELVIS_PF5
PG4
PPI_D4
ELVIS_PF6
PG5
PPI_D5
ELVIS_PF7
PG6
PPI_D6
UART0_CTS
PG7
PPI_D7
UART0_RTS
PG8
PPI_D8/DR1SEC
Not used
PG9
PPI_D9/DT1SEC
Not used
PG10
PPI_D10/RSCLK1
Not used
PG11
PPI_D11/RFS1
Not used
PG12
PPI_D12/DR1PRI
Not used
PG13
PPI_D13/TSCLK1
Not used
PG14
PPI_D14/TFS1
No used
PG15
PPI_D15/DT1PRI
USB_IRQ
PH0
ETXD0
ETXD
PH1
ETXD1
ETXD1
used for Ethernet interface
PH2
ETXD2
ETXD2
used for Ethernet interface
PH3
ETXD3
ETXD3
used for Ethernet interface
PH4
ETXEN
ETXEN
used for Ethernet interface
PH5
MII_TXCLK/RMII_REF_CLK
MII_TXCLK
PH6
MII_PHYINT/RMII_MDINT
MII_PHYINT
PH7
COL
COL
PH8
ERXD0
ERXD0
used for USB bus power
used for Ethernet interface
used for Ethernet interface
used for Ethernet interface
used for Ethernet interface
used for Ethernet interface
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Hardware Reference
Table 2-1. Programmable Flag Connections (Cont’d)
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PH9
ERXD1
ERXD1
used for Ethernet interface
PH10
ERXD2
ERXD2
used for Ethernet interface
PH11
ERXD3
ERXD3
used for Ethernet interface
PH12
ERXDV/TACLK5
ERXDV
used for Ethernet interface
PH13
ERXCLK/TACLK6
ERXCLK
PH14
ERXER/TACLK7
ERXER
PH15
MII_CRS/RMII_CRS_DV
MII_CRS
used for Ethernet interface
used for Ethernet interface
used for Ethernet interface
UART Port
The universal asynchronous receiver/transmitter (UART) port of the processor connects to the ADM3202 RS-232 line driver as well as to the
expansion interface. The RS-232 line driver connects to the DB9 female
connector, providing an interface to a PC and other serial devices.
Expansion Interface
The expansion interface consists of three 90-pin connectors. Table 2-2
shows the interfaces each connector provides. For the exact pinout of the
connectors, refer to “ADSP-BF537 EZ-KIT Lite Schematic” on page B-1.
The mechanical dimensions of the connectors can be obtained from Technical or Customer Support.
Analog Devices offers many EZ-Extender products that plug on to the
expansion interface. For more information on these products, visit the
Analog Devices Web site at www.analog.com.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2-7
System Architecture
Table 2-2. Expansion Interface Connectors
Connector
Interfaces
J1
5V, GND, address, data, PPI
J2
3.3V, GND, SPI, NMI, TMR2–0, SPORT0, SPORT1, PF15–0, EBUI control signals
J3
5V, 3.3V, GND, UART, flash IO, reset, audio control signals
Limits to the current and to the interface speed must be taken into consideration when using the expansion interface. The maximum current limit is
dependent on the capabilities of the used regulator. Additional circuitry
also can add extra loading to signals, decreasing their maximum effective
speed.
Devices does not support and is not responsible for the
[ Analog
effects of additional circuitry.
JTAG Emulation Port
The JTAG emulation port allows an emulator to access the processor’s
internal and external memory through a 6-pin interface. The JTAG emulation port of the processor connects also to the USB debugging interface.
When an emulator connects to the board at ZP4, the USB debugging
interface is disabled. See “JTAG Connector (ZP4)” on page 2-25 for more
information about the connector.
To learn more about available emulators, contact Analog Devices (see
“Processor Product Information”).
2-8
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Hardware Reference
Jumper and Switch Settings
This section describes the operation of the jumpers and switches. The
jumper and switch locations are shown in Figure 2-2.
Figure 2-2. Jumper and Switch Locations
CAN Enable Switch (SW2)
The Controller Area Network (CAN) enable switch (SW2) disconnects the
CAN signals from the GPIO pins of the processor. When the SW2 switch is
in the OFF position, its associated GPIO signal (see Table 2-3) can be used
on the expansion interface.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2-9
Jumper and Switch Settings
Table 2-3. CAN Enable Switch (SW2)
CAN Signal
SW2 Switch Position (Default)
Processor Signal
ENABLE
1 (ON)
PF14
STANDBY
2 (ON)
PF15
ERROR
3 (ON)
PF13
RECEIVE DATA
4 (ON)
PJ4
Ethernet Mode Select Switch (SW3)
The Ethernet mode select switch (SW3) controls the configuration of the
10/100 digital block in the LAN83C185 PHY device (see Table 2-4).
Table 2-4. Ethernet Mode Select Switch (SW3)
SW3 Switch Position
Ethernet Mode
3
2
1
ON
ON
ON
10Base-T half duplex; auto-negotiation disabled
ON
ON
OFF
10Base-T full duplex; auto-negotiation disabled
ON
OFF
ON
100Base-T half duplex; auto-negotiation disabled
ON
OFF
OFF
100Base-T full duplex; auto-negotiation disabled
OFF
ON
ON
100Base-T half duplex; auto-negotiation enabled
OFF
ON
OFF
Repeater mode; auto-negotiation enabled
OFF
OFF
ON
Power down mode
OFF
OFF
OFF
All capable; auto-negotiation enabled (default)
2-10
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Hardware Reference
UART Enable Switch (SW4)
The UART enable switch (SW4) disconnects UART signals from the GPIO
pins of the processor. When the switch is in the OFF position, its associated
GPIO signal (see Table 2-5) can be used on the expansion interface.
Table 2-5. UART Enable Switch (SW4)
EZ-KIT Lite Signal
SW4 Switch Position (Default)
Processor Signal
TX
1 (ON)
PF0
CTS
2 (ON)
PG6
RX
3 (ON)
PPF1
RTS
4 (OFF)
PG7
Push Button Enable Switch (SW5)
The push button enable switch (SW5) disconnects the associated with the
push button circuit drivers from the GPIO pins of the processor. When
the SW5 switch is in the OFF position, the associated GPIO signal
(see Table 2-6) can be used on the expansion interface.
Table 2-6. Push Button Enable Switch (SW5)
Push Button
SW5 Switch Position (Default)
Processor Signal
PB1 (SW13)
1 (ON)
PF2
PB2 (SW12)
2 (ON)
PF3
PB3 (SW11)
3 (ON)
PF4
PB4 (SW10)
4 (ON)
PF5
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2-11
Jumper and Switch Settings
Flash Enable Switch (SW6)
The flash enable switch (SW6) disconnects ~AMS signals from the flash
memory, allowing other devices to utilize the signals via the expansion
interface. For each switch listed in Table 2-7 that is turned OFF, the size of
available flash memory is reduced by 1 MB.
Table 2-7. Flash Enable Switch (SW6)
Processor Signal
SW6 Switch Position (Default)
~AMS0
~AMS1
~AMS2
~AMS3
1 (ON)
2 (ON)
3 (ON)
4 (ON)
Audio Enable Switch (SW7)
The audio enable switch (SW7) disconnects the audio signals from the processor (positions 1–5) and determines how the clock for the audio circuit
generates and connects (positions 6–8). Position 8 determines if the ADC
is in master or slave mode. When in master mode (position 8 is ON), the
ADC generates the clock. When in slave mode (position 8 is OFF), the processor generates the clock. Positions 6 and 7 connect the transmit and
receive clocks together (see Table 2-8).
Table 2-8. Audio Enable Switch (SW7)
EZ-KIT Lite Signal
SW7 Switch Position (Default)
Processor Signal
DR0PRI
1 (ON)
PJ8
RSCLK0
2 (ON)
PJ6
RFS0
3 (ON)
PJ7
TSCLK0
4 (ON)
PG9
2-12
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Hardware Reference
Table 2-8. Audio Enable Switch (SW7) (Cont’d)
EZ-KIT Lite Signal
SW7 Switch Position (Default)
Processor Signal
TFS0
5 (ON)
PJ10
Clock loopback
6 (ON)
FS loopback
7 (ON)
ADC master/slave
8 (ON)
Boot Mode Select Switch (SW16)
The rotary switch (SW16) determines the boot mode of the processor.
Table 2-9 shows the available boot mode settings. By default, the
ADSP-BF537 processor boots from the on-board flash memory.
Table 2-9. Boot Mode Select Switch (SW16)
SW16 Position
Processor Boot Mode
0
Execute from 16-bit external memory
1
Boot from 16-bit flash memory (default)
2
Reserved
3
Boot from SPI memory
4
Boot from SPI host
5
Boot from serial TWI memory
6
Boot from TWI host
7
Boot from UART host
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2-13
Jumper and Switch Settings
3V Power Selection Jumper (JP3)
The 3V power selection jumper (JP3) selects the power source for the
3-volt parts. In a standard mode of operation, the parts are powered by the
on-board switching regulator circuit via an external power supply. When a
Blackfin USB-LAN EZ-Extender connects to the EZ-KIT Lite, power can
be derived from the USB bus power or Power-over-Ethernet (802.3af). In
this case, the board can operate without an external power supply. The
jumper settings are shown in Table 2-10.
Table 2-10. 3V Power Selection Jumper (JP3)
JP3 Position
Mode
1&2
3V parts powered from the on-board switching regulator (default)
2&3
3V parts powered from an external power supply: USB-bus power or
Power-over-Ethernet
Expansion Interface Voltage Selection Jumper
(JP5)
The expansion interface voltage selection jumper (JP5) selects the power
source for the 5-volt signal on the expansion interface. In a standard mode
of operation, the signal is powered by the on-board switching regulator
circuit (ADP3025) via an external power supply. When a Blackfin
USB-LAN EZ-Extender connects to the board, power can be derived from
the USB bus power or Power-over-Ethernet (802.3af). In this case, the
board can operate without an external power supply. The jumper setting is
shown in Table 2-11.
2-14
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Hardware Reference
Table 2-11. Expansion Interface Voltage Selection Jumper (JP5)
JP5 Setting
Mode
ON
5V signal powered from the on-board switching regulator (default)
OFF
5V signal powered from an external power supply: USB-bus power or
Power-over-Ethernet
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2-15
Jumper and Switch Settings
UART Loop Jumper (JP9)
The UART loop jumper (JP9) is for looping the transmit and receive signals. The default is the OFF position.
ELVIS Oscilloscope Configuration Switch (SW1)
The oscilloscope configuration switch (SW1) determines which audio circuit signals connect to channels A and B of the oscilloscope. The switch is
used only when the board connects to the Educational Laboratory Virtual
Instrumentation Suite (ELVIS) station (see “ELVIS Interface” on
page 1-13). Each channel must have only one signal selected at a time (see
Table 2-12).
Table 2-12. Oscilloscope Configuration Switch (SW1)
Channel
SW1 Switch Position (Default)
Audio Circuit Signal
A
1 (OFF)
AMP_LEFT_IN
A
2 (OFF)
AMP_RIGHT_IN
A
3 (OFF)
LEFT_OUT
A
4 (OFF)
RIGHT_OUT
B
5 (OFF
AMP_LEFT_IN
B
6 (OFF)
AMP_RIGHT_IN
B
7 (OFF)
LEFT_OUT
B
8 (OFF)
RIGHT_OUT
2-16
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Hardware Reference
ELVIS Function Generator Configuration Switch
(SW8)
The function generator configuration switch (SW8) controls signals connecting to the left and right input signals of the audio interface. The SW8
switch is used only when the board connects to the ELVIS station (see
“ELVIS Interface” on page 1-13). Each channel must have only one signal
selected at a time, as described in Table 2-13.
Table 2-13. Function Generator Configuration Switch (SW8)
Channel
SW8 Switch Position (Default)
Audio Circuit Signal
AMP_LEFT_IN
1 (ON)
LEFT_IN
AMP_RIGHT_IN
2 (ON)
RIGHT_IN
AMP_LEFT_IN
3 (OFF)
DAC0
AMP_RIGHT_IN
4 (OFF)
DAC1
AMP_LEFT_IN
5 (OFF)
FUNCT_OUT
AMP_RIGHT_IN
6 (OFF)
FUNCT_OUT
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2-17
Jumper and Switch Settings
ELVIS Voltage Selection Jumper (JP6)
The ELVIS voltage selection jumper (JP6) is used to select the power
source for the EZ-KIT Lite. In a standard mode of operation, the board
receives its power from an external power supply. When JP6 is installed,
the board is powered from an ELVIS station, and no external power supply is required. The jumper setting is shown in Table 2-14.
Table 2-14. ELVIS Voltage Selection Jumper (JP6)
JP6 Setting
Mode
OFF
Powered from an external power supply (default)
ON
Powered from an ELVIS station
external power supply must be disconnected from the board
[ The
when
is installed. In this case, the power supply can cause damJP6
age to the EZ-KIT Lite board and ELVIS unit.
ELVIS Select Jumper (JP8)
The ELVIS select jumper (JP8) configures the EZ-KIT Lite’s connection
to an ELVIS station (see “ELVIS Interface” on page 1-13). When JP8 is
installed, the connections to the push buttons and LED are re-directed to
the ELVIS station, instead of the processor. The jumper setting is shown
in Table 2-15.
Table 2-15. ELVIS Select Jumper (JP8)
JP8 Setting
Mode
OFF
Not connected to an ELVIS station (default)
ON
Connected to an ELVIS station
2-18
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Hardware Reference
LEDs and Push Buttons
This section describes the functionality of the LEDs and push buttons.
Figure 2-3 shows the locations of the LEDs and push buttons.
Figure 2-3. LED and Push Button Locations
Reset Push Button (SW9)
The RESET push button resets all of the ICs on the board. One exception is
the USB interface chip. The chip is not being reset when the push button
is pressed after the USB cable has been plugged in and communication
with the PC has been initialized correctly. After USB communication has
been initialized, the only way to reset the USB chip is by powering down
the board.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2-19
LEDs and Push Buttons
Programmable Flag Push Buttons (SW10–13)
Four push buttons, SW10–13, are provided for general-purpose user input.
The buttons connect to PF5–2 programmable flag pins of the processor.
The push buttons are active high and, when pressed, send a high (1) to the
processor. Refer to “LEDs and Push Buttons” on page 1-15 for more
information on how to use the PFs when programming the processor. The
push button enable switch (SW5) is capable of disconnecting the push buttons from its corresponding PF (refer to “Push Button Enable Switch
(SW5)” on page 2-11 for more information). The programmable flag signals and associated switches are shown in Table 2-16.
Table 2-16. Programmable Flag Switches
Processor Programmable Flag Pin
Push Button Reference Designator
PF2
SW13
PF3
SW12
PF4
SW11
PF5
SW10
Power LED (LED7)
When LED7 is lit (green), it indicates that power is being properly supplied
to the board.
Reset LED (LED8)
When LED8 is lit, it indicates that the master reset of all the major ICs is
active.
2-20
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Hardware Reference
User LEDs (LED1–6)
Six LEDs connect to six general-purpose IO pins of the processor (see
Table 2-17). The LEDs are active high and are lit by writing a 1 to the
correct PF signal. Refer to “LEDs and Push Buttons” on page 1-15 for
more information about how to use the flash when programming the
LEDs.
Table 2-17. User LEDs
LED Reference Designator
Processor Programmable Flag Pin
LED1
PF6
LED2
PF7
LED3
PF8
LED4
PF9
LED5
PF10
LED6
PF11
USB Monitor LED (ZLED3)
The USB monitor LED (ZLED3) indicates that USB communication has
been initialized successfully, and you can connect to the processor using a
VisualDSP++ EZ-KIT Lite session. This takes approximately 15 seconds.
If the LED does not light, try cycling power on the board and/or
re-installing the USB driver (see the VisualDSP++ Installation Quick Reference Card).
VisualDSP++ is actively communicating with the EZ-KIT
L When
Lite target board, the LED can flicker, indicating communications
handshake.
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2-21
Connectors
Connectors
This section describes the connector functionality and provides information about mating connectors. The connector locations are shown in
Figure 2-4.
Figure 2-4. Connector Locations
2-22
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Hardware Reference
Audio Connectors (J9 and J10)
Part Description
Manufacturer
Part Number
3.5 mm stereo jack
A/D ELECTRONICS
ST323-5
Mating Cable (shipped with EZ-KIT Lite)
3.5 mm stereo interconnect
cable
RANDOM
10A3-01106
3.5 mm headphones
KOSS
UR5
CAN Connectors (J5 and J11)
Part Description
Manufacturer
Part Number
Modular jack
AMP
5558872-1
Mating Cable
4-conductor modular jack cable
L-COM
TSP3044
Ethernet Connector (J4)
Part Description
Manufacturer
Part Number
Ethernet jack
PULSE
JK0-0025NL
Mating Cable (shipped with EZ-KIT Lite)
Cat 5E patch cable
RANDOM
PC10/100T-007
Cat 5E crossover cable
RANDOM
PC10/100TC-007
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2-23
Connectors
RS-232 Connector (J6)
Part Description
Manufacturer
Part Number
DB9, female, vertical mount
NORCOMP
191-009-213-L-571
Mating Cable
2m female-to-female cable
DIGI-KEY
AE1020-ND
Power Connector (J7)
The power connector provides all of the power necessary to operate the
EZ-KIT Lite board.
Part Description
Manufacturer
Part Number
2.5 mm power jack
SWITCHCRAFT
RAPC712X
Mating Power Supply (shipped with EZ-KIT Lite)
7V power supply
CUI INC.
DMS070214-P6P-SZ
Expansion Interface Connectors (J1–3)
Three board-to-board connector footprints provide signals for most of the
processor’s peripheral interfaces. The connectors are located at the bottom
of the board. For more information about the interface, see “Expansion
Interface” on page 2-7. For the availability and pricing of the J1, J12, and
J3 connectors, contact Samtec.
Part Description
Manufacturer
Part Number
90-position 0.05” spacing, SMT
SAMTEC
SFC-145-T2-F-D-A
Mating Connector
90-position 0.05” spacing
(through hole)
2-24
SAMTEC
TFM-145-x1 series
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Hardware Reference
Part Description
Manufacturer
Part Number
90-position 0.05” spacing
(surface mount)
SAMTEC
TFM-145-x2 series
90-position 0.05” spacing
(low cost)
SAMTEC
TFC-145 series
JTAG Connector (ZP4)
The JTAG header is the connecting point for a JTAG in-circuit emulator
pod. When an emulator connects to the JTAG header, the USB debug
interface is disabled.
3 is missing to provide keying. Pin 3 in the mating connector
L Pin
should have a plug.
using an emulator with the EZ-KIT Lite board, follow the
L When
connection instructions provided with the emulator.
SPORT0 Connector (P6)
The pinout of the P6 connector can be found in “ADSP-BF537 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-434HLF
Mating Connector
IDC socket
DIGI-KEY
S4217-ND
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2-25
Connectors
SPORT1 Connector (P7)
The pinout of the P7 connector can be found in “ADSP-BF537 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-434HLF
Mating Connector
IDC socket
DIGI-KEY
S4217-ND
PPI Connector (P8)
The pinout of the P8 connector can be found in “ADSP-BF537 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-440HLF
Mating Connector
IDC socket
DIGI-KEY
S4220-ND
SPI Connector (P9)
The pinout of the P9 connector can be found in “ADSP-BF537 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-420HLF
Mating Connector
IDC socket
2-26
DIGI-KEY
S4210-ND
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Hardware Reference
Two-Wire Interface Connector (P10)
The pinout of the P10 connector can be found in “ADSP-BF537 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-420HLF
Mating Connector
IDC socket
DIGI-KEY
S4210-ND
TIMERS Connector (P11)
The pinout of the P11 connector can be found in “ADSP-BF537 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-410HLF
Mating Connector
IDC socket
DIGI-KEY
S4205-ND
UART1 Connector (P12)
The pinout of the P12 connector can be found in “ADSP-BF537 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-410HLF
Mating Connector
IDC socket
DIGI-KEY
S4205-ND
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
2-27
Connectors
2-28
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
A ADSP-BF537 EZ-KIT LITE BILL
OF MATERIALS
The bill of materials corresponds to “ADSP-BF537 EZ-KIT Lite Schematic” on page B-1. Please check the latest schematic on the Analog
Devices Web site:
http://www.analog.com/processors/blackfin/technicalLibrary/manuals/index.html#Evaluation%20Kit%20Manuals.
Ref. Qty.
Description
Reference
Designator
Manufacturer
Part Number
1
1
74LVC14A
SOIC14
U37
TI
74LVC14AD
2
1
IDT74FCT3244
APY SSOP20
U36
IDT
IDT74FCT3244APYG
3
2
25MHZ
OSC005
Y1,Y3
EPSON
MA-505
25.0000M-C0:ROHS
4
1
SN74AHC1G00
SOT23-5
U39
TI
SN74AHC1G00DBVR
5
1
12.288MHZ
OSC003
U4
DIGI-KEY
SG-8002CA-PCC-ND
(12.288M)
6
1
32.768KHZ
OSC008
Y2
EPSON
MC-156-32.7680KA-A0:
ROHS
7
1
SN74LVC1G32
SOT23-5
U52
TI
SN74LVC1G32DBVRE4
8
2
25MHZ
OSC003
U51,U53
DIGI-KEY
SG-8002CA-PCC-ND
(25.00M)
9
6
SN74LVC1G08
SOT23-5
U22,U47-50,
U58
TI
SN74LVC1G08DBVR
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
A-1
Ref. Qty.
Description
Reference
Designator
Manufacturer
Part Number
10
2
MT48LC32M8A
2 TSOP54
U15-16
MICRON
MT48LC32M8A2P-75
11
1
TJA1041
SOIC14
U21
PHILIPS
TJA1041T
12
1
LAN83C185
TQFP64
U14
SMSC
LAN83C185-JT
13
1
FDS9431A
SOIC8
U28
FAIRCHILD
FDS9431A
14
1
BF537
M29W320DB
“U24”
U24
ST MICRO
M29W320DB70ZA1E
15
3
LMV722M
SOIC8
U29-31
NATIONAL
SEMI
LMV722MNOPB
16
1
LTC3727EUH-1
VQFN32
U20
LINEAR
TECH
LTC3727EUH-1PBF
17
2
FDS6990AS
SOIC8
U12-13
FAIRCHILD
FDS6990AS
18
1
ADM708SARZ
SOIC8
U27
ANALOG
DEVICES
ADM708SARZ
19
1
ADP3338AKCZ33 SOT-223
VR1
ANALOG
DEVICES
ADP3338AKCZ-3.3-RL
20
1
AD1854JRSZ
SSOP28
U38
ANALOG
DEVICES
AD1854JRSZ
21
1
AD1871YRSZ
SSOP28
U33
ANALOG
DEVICES
AD1871YRSZ
22
1
ADM3202ARNZ U32
SOIC16
ANALOG
DEVICES
ADM3202ARNZ
23
2
AD623ARMZ
USOIC8
U2-3
ANALOG
DEVICES
AD623ARMZ
24
2
AD820ARZ
SOIC8
U11,U23
ANALOG
DEVICES
AD820ARZ
A-2
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Bill Of Materials
Ref. Qty.
Description
Reference
Designator
Manufacturer
Part Number
25
4
ADG774ABRQZ
QSOP16
U54-57
ANALOG
DEVICES
ADG774ABRQZ
26
1
ADSP-BF537
MINI_BGA182
U35
ANALOG
DEVICES
ADSP-BF537KBCZ-6A
27
5
RUBBER FOOT
M1-5
MOUSER
517-SJ-5018BK
28
1
PWR
2.5MM_JACK
CON005
J7
SWITCHCRAFT
RAPC712X
29
5
MOMENTARY
SWT013
SW9-13
PANASONIC
EVQ-PAD04M
30
3
.05 45X2
CON019
J1-3
SAMTEC
SFC-145-T2-F-D-A
31
2
DIP8 SWT016
SW1,SW7
C&K
TDA08H0SB1
32
1
DIP6 SWT017
SW8
C&K
TDA06H0SB1
33
5
DIP4 SWT018
SW2-6
ITT
TDA04HOSB1
34
1
RJ45 16PIN
CON033
J4
PULSE ENG.
JK0-0025NL
35
1
ROTARY
SWT019
SW16
GRAYHILL
94HAB08T
36
1
DB9 9PIN
CON038
J6
NORCOMP
191-009-213-L-571
37
2
RJ11 4PIN
CON039
J5,J11
TYCO
5558872-1
38
5
IDC 2X1
IDC2X1
JP5-6,JP8-9,
JP12
FCI
90726-402HLF
39
1
IDC 3X1
IDC3X1
JP3
FCI
90726-403HLF
40
2
IDC 5X2
IDC5X2
P11-12
FCI
68737-410HLF
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
A-3
Ref. Qty.
Description
Reference
Designator
Manufacturer
Part Number
41
1
IDC 7X2
IDC7X2
ZP4
FCI
68737-414HLF
42
2
IDC 10X2
IDC10X2
P9-10
FCI
68737-420HLF
43
2
IDC 17X2
IDC17X2
P6-7
FCI
68737-434HLF
44
1
IDC 20X2
IDC20X2
P8
FCI
68737-440HLF
45
1
2.5A
RESETABLE
FUS001
F1
RAYCHEM
SMD250F-2
46
4
IDC
2PIN_JUMPER_
SHORT
SJ5-7,SJ9
DIGI-KEY
S9001-ND
47
2
3.5MM
STEREO_JACK
CON001
J9-10
A/D ELECTRONICS
ST-323-5
48
6
YELLOW
LED001
LED1-6
PANASONIC
LN1461C
49
2
22PF 50V 5%
0805
C229-230
AVX
08055A220JAT
50
1
0.1UF 50V 10%
0805
C116
AVX
08055C104KAT
51
2
10UF 16V
10% C
CT7-8
AVX
TAJC106K016R
52
4
100 1/10W 5%
0805
R82,R100-101,
R103
VISHAY
CRCW0805100RJNEA
53
6
600 100MHZ
200MA 0603
FER1-5,FER9
DIGI-KEY
490-1014-2-ND
54
1
2A S2A
DO-214AA
D4
VISHAY
S2A-E3
A-4
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Bill Of Materials
Ref. Qty.
Description
Reference
Designator
Manufacturer
Part Number
55
1
68UF 6.3V
20% D
CT5
AVX
TAJD686K016R
56
2
68UF 25V 20%
CAP003
CT1-2
PANASONIC
EEE-FC1E680P
57
1
10UH 20%
IND001
L1
TDK
445-2014-1-ND
58
1
190 100MHZ 5A
FER002
FER7
MURATA
DLW5BSN191SQ2
59
1
1A ZHCS1000
SOT23D
D5
ZETEX
ZHCS1000TA pb-free
60
6
1UF 10V 10%
0805
C131,C134,
C210,C220-222
AVX
0805ZC105KAT2A
61
12
10UF 6.3V 10%
0805
C206-209,C212- AVX
219
080560106KAT2A
62
2
1000PF 10V
20% 0805
C119,C123
DIGI-KEY
311-1136-1-ND
63
13
0.1UF 10V 10%
0402
C55-57,C59-60,
C111-115,C120,
C126,C136
AVX
0402ZD104KAT2A
64
66
0.01UF 16V 10%
0402
C1-25,C30-46,
C96-105,C107109,C132,C137,
C202-205,C211,
C223,C225-227
AVX
0402YC103KAT2A
65
42
10K 1/16W 5%
0402
R2,R5,R7-9,
R12-16,R24-25,
R72-74,R78-80,
R84-90,R97,
R162,R169-172,
R174,R176-179,
R181-182,R185186,R205,R208
VISHAY
CRCW040210K0FKED
66
1
R4
VISHAY
CRCW04024K70JNED
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
A-5
Ref. Qty.
Description
Reference
Designator
Manufacturer
Part Number
67
9
27 1/14W 5%
0402
R216,R218-225
PANASONIC
ERJ-2GEJ270X
68
8
0 1/16W 5%
0402
R3,R120,R163,
R207,R215,
ZR20
PANASONIC
ERJ-2GE0R00X
69
2
1.2K 1/16W 5%
0402
R173,R175
PANASONIC
ERJ-2GEJ122X
70
16
22 1/16W 5%
0402
R187-202
PANASONIC
ERJ-2GEJ220X
71
5
33 1/16W 5%
0402
R1,R54,R119,
R209-210
PANASONIC
ERJ-2GEJ330X
72
4
18PF 50V 5%
0805
C26-29
AVX
08055A180JAT2A
73
2
100MA
CMDSH-3
SOD-323
D1-2
CENTRAL
SEMI
CMDSH-3-E3
74
2
1000PF 50V 5%
0402
C127-128
AVX
04025C102JAT2A
75
1
1.5K 1/10W 5%
0603
R206
PANASONIC
ERAV15J152V
76
1
0.022UF 50V 5%
0805
C95
AVX
08055C223JAT2A
77
10
0.1UF 16V 10%
0603
C64,C72-74,
C87-89,C125,
C130,C133
AVX
0603YC104KAT2A
78
2
33PF 50V 5%
0603
C118,C122
PANASONIC
ECJ-1VC1H330J
79
5
0.01UF 16V 10%
0603
C50-51,C62-63,
C93
AVX
0603YC103KAT2A
80
1
4.7UF 25V 20%
0805
C110
AVX
0805ZD475KAT2A
A-6
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Bill Of Materials
Ref. Qty.
Description
Reference
Designator
Manufacturer
Part Number
81
2
330PF 50V 5%
0603
C79,C84
AVX
06035A331JAT2A
82
3
10K 1/10W 5%
0603
R37,R53,R99
VISHAY
CRCW060310K0JNEA
83
2
10M 1/10W 5%
0603
R10-11
VISHAY
CRCW060310M0FNEA
84
2
100K 1/10W 5%
0603
R20,R26
VISHAY
CRCW0603100KJNEA
85
10
330 1/10W 5%
0603
R75-76,R83,
R91-96,R98
VISHAY
CRCW0603330RJNEA
86
1
1M 1/10W 5%
0603
R211
VISHAY
CRCW06031M00FNEA
87
6
0 1/10W 5%
0603
R27,R113,R115,
R117-118,R168
PHYCOMP
232270296001L
88
4
49.9 1/16W 1%
0603
R67-68,R70-71
VISHAY
CRCW060349R9FNEA
89
8
10 1/10W 5%
0603
R6,R55-57,R59,
R62,R69,R112
VISHAY
CRCW060310R0JNEA
90
2
10.0K 1/16W 1%
0603
R64,R102
DALE
CRCW060310K0FKEA
91
1
25.5K 1/16W 1%
0603
R104
DIGI-KEY
311-25.5KHRTR-ND
92
2
6800PF 16V
10% 0603
C91-92
DIGI-KEY
311-1084-2-ND
93
1
4700PF 16V
10% 0603
C90
DIGI-KEY
311-1083-2-ND
94
4
237.0 1/10W 1%
0603
R23,R29,R31,
R33
DIGI-KEY
311-237HRTR-ND
95
2
750.0K 1/10W
1% 0603
R30,R32
DIGI-KEY
311-750KHRTR-ND
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
A-7
Ref. Qty.
Description
Reference
Designator
Manufacturer
Part Number
96
3
11.0K 1/10W 1%
0603
R39-40,R60
DIGI-KEY
311-11.0KHRTR-ND
97
4
5.49K 1/10W 1%
0603
R42-43,R46-47
DIGI-KEY
311-5.49KHRTR-ND
98
2
3.32K 1/10W 1%
0603
R44,R48
DIGI-KEY
311-3.32KHRTR-ND
99
2
1.65K 1/10W 1%
0603
R45,R49
DIGI-KEY
311-1.65KHRTR-ND
100
2
49.9K 1/10W 1%
0603
R38,R41
DIGI-KEY
311-49.9KHRTR-ND
101
2
604.0 1/10W 1%
0603
R50-51
DIGI-KEY
311-604HRTR-ND
102
2
90.9K 1/10W 1%
0603
R58,R63
DIGI-KEY
311-90.9KHRTR-ND
103
2
0.1 1/10W 1%
0603
R61,R148
PANASONIC
ERJ-3RSFR10V
104
2
10.0K 1/10W 1%
0603
R159-160
DIGI-KEY
311-10.0KHRTR-ND
105
8
5.76K 1/10W 1%
0603
R17-19,R21-22,
R28,R34-35
DIGI-KEY
311-5.76KHRTR-ND
106
4
120PF 50V 5%
0603
C47-49,C71
AVX
06035A121JAT2A
107
12
100PF 50V 5%
0603
C52-54,C61,
C65,C68,C75,
C77,C81,C85,
C94,C106
AVX
06035A101JAT2A
108
4
1000PF 50V 5%
0603
C66-67,C69-70
PANASONIC
ECJ-1VC1H102J
109
1
12.4K 1/10W 1%
0603
R77
DIGI-KEY
311-12.4KHRTR-ND
110
2
62.0 1/10W 1%
0603
R65-66
DIGI-KEY
311-62.0HRTR-ND
A-8
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
ADSP-BF537 EZ-KIT Lite Bill Of Materials
Ref. Qty.
Description
Reference
Designator
Manufacturer
Part Number
111
4
220PF 50V 5%
0603
C82,C86,C117,
C124
PANASONIC
ECJ-1VC1H221J
112
2
680PF 50V 5%
0603
C80,C83
PANASONIC
ECJ-1VC1H681J
113
2
2200PF 50V 5%
0603
C76,C78
PANASONIC
ECJ-1VB1H222K
114
2
2.74K 1/10W 1%
0603
R36,R52
DIGI-KEY
311-2.74KHRTR-ND
115
2
100 1/16W 5%
0402
R213-214
DIGI-KEY
311-100JRTR-ND
116
2
15.0K 1/16W 1%
0603
R106-107
DIGI-KEY
311-15.0KHRTR-ND
117
4
27PF 50V 5%
0402
C121,C129,
C224,C228
AVX
04025A270JAT2A
118
1
63.4 1/16W 1%
0402
R212
PANASONIC
ERJ-2RKF63R4X
119
1
61.9K 1/16W 1%
0603
R111
PANASONIC
ERJ-3EKF6192V
120
1
105.0K 1/16W
1% 0603
R108
PANASONIC
ERJ-3EKF1053V
121
2
20.0K 1/16W 1%
0603
R109-110
PANASONIC
ERJ-3EKF2002V
122
2
8UH 20%
IND008
L2-3
WURTH
ELECTRON.
744392820
123
2
0.015 1W 1%
0815
R114,R116
SUSUMU
RL3720WT-015-F
124
2
10UF 16V 10%
1210
C58,C135
AVX
1210YD106KAT2A
125
1
GREEN LED001
LED7
PANASONIC
LN1361CTR
126
1
RED LED001
LED8
PANASONIC
LN1261CTR
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
A-9
Ref. Qty.
Description
Reference
Designator
Manufacturer
Part Number
127
2
150UF 6.3V
10% D
CT4,CT6
PANASONIC
EEFUE0J151R
128
1
30 100MHZ
500MA 0402
R217
DIGI-KEY
240-2362-1-ND
A-10
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
A
B
C
D
1
1
2
2
ADSP-BF537 EZ-KIT LITE
SCHEMATIC
3
3
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF537 EZ-KIT LITE
TITLE
Title
Size
20 Cotton Road
Rev
A0188-2004
2.2A
Sheet
5-24-2007_9:44
D
1
of
11
A
B
C
D
U35
A[1:19]
A1
J14
A2
K14
A3
L14
A1
A2
A6
L13
1
A9
M12
A10
M13
A11
M14
A12
A13
A14
A15
A16
A17
A18
A19
PJ1_MDIO
N8
D4
PJ2_SCL
P8
D5
PJ3_SDA
D6
PJ4_CAN_RX
N7
D7
PJ5_CAN_TX
P7
D8
PJ6_RSCLK0
M6
D9
PJ7_RFS0
N6
D10
P6
D11
M5
D12
N5
D13
P5
D14
P4
D15
M7
A7
D6
A8
D7
A9
D8
A10
D9
A11
N14
A12
N13
A13
N12
A14
M11
A15
N11
A16
P13
A17
P12
A18
P11
A19
D10
D11
D12
D13
D14
D15
PJ8_DR0PRI
PJ10_TFS0
PJ11_DT0PRI
RTXI
AMS0
F14
AMS1
F13
ARDY
AMS3
ARE
SRAS
BMODE0
D12
H13
ABE0~/SDQM0
H12
ABE1~/SDQM1
ABE1
SCKE
CLKOUT
SA10
D14
BR
P10
BG
N10
BGH
BR
BG
BGH
SMS
BMODE1
BMODE1
L5
BMODE2
G1
PG0_ELVIS_TRIGGER
PF5_PB4
G2
PG1_ELVIS_PF1
PF6_LED1
PG2_ELVIS_PF2
PG3_ELVIS_PF5
GPIO/ETXD1
GPIO/PPI_D2
GPIO/ETXD2
PG4_ELVIS_PF6
GPIO/ETXD3
GPIO/PPI_D4
GPIO/ETXEN
E1
PG6_UART0_CTS
PF11_LED6
E2
PG7_UART0_RTS
PF12_AUDIO_RESET
E3
PG8
PF13_CAN_ERR
E4
PG9
PF14_CAN_EN
D1
PG10
PF15_CAN_STB~
D2
D3
EMU
D5
PG13
TMS
D6
PG14
TCK
C1
PG15_USB_IRQ
CLKIN
B10
NMI
CLKBUF
GPIO/MII_TXCLK/RMII_REF_CLK
GPIO/PPI_D6
GPIO/MII_PHYINT/RMII_MDINT
GPIO/PPI_D8/DR1SEC
GPIO/PPI_D9/DT1SEC
GPIO/PPI_D10/RSCLK1
GPIO/PPI_D11/RFS1
GPIO/PPI_D12/DR1PRI
GPIO/PPI_D13/TSCLK1
GPIO/PPI_D14/TFS1
GPIO/PPI_D15/DT1PRI
B13
PH10_ERXD2
PH11_ERXD3
PH12_ERXDV
PH13_ERXCLK
PH14_ERXER
PH15_CRS
TDO
B14
R4
4.7K
0402
SCLK
E12
SA10
C13
2
SMS
A12
VDDEXT
U35
CLKIN
A11
PG10
XTAL
A7
CLKBUF
C206
10UF
0805
C1
0.01UF
0402
C6
0.01UF
0402
C5
0.01UF
0402
C7
0.01UF
0402
C4
0.01UF
0402
C3
0.01UF
0402
C2
0.01UF
0402
C8
0.01UF
0402
CLKIN
3V_BP
R10
10M
0603
LABEL "VDDRTC"
TP1
VDDEXT
R2
10K
0402
DNP
3
U51
1
4
VDD
OE
VROUT
R1
33
0402
DNP
A1
VDDEXT1
C12
VDDEXT2
E6
VDDEXT3
E11
VDDEXT4
F4
VDDEXT5
F12
VDDEXT6
H5
VDDEXT7
H10
VDDEXT8
J11
VDDEXT9
J12
VDDEXT10
K7
VDDEXT11
K9
VDDEXT12
L7
VDDEXT13
L9
VDDEXT14
L11
VDDEXT15
P1
VDDEXT16
A10
GND1
A14
GND2
D4
GND3
E7
GND4
E9
GND5
F5
GND6
F6
GND7
F10
GND8
F11
GND9
G4
GND10
G5
GND11
G11
GND12
H11
GND13
J4
GND14
J5
GND15
J9
GND16
J10
GND17
K6
GND18
K11
GND19
L6
GND20
L8
GND21
L10
GND22
M4
GND23
M10
GND24
P14
GND25
B9
VDDRTC
3
OUT
CLKIN
C209
10UF
0805
GND
25MHZ 2
OSC003
DNP
C15
0.01UF
0402
C10
0.01UF
0402
C11
0.01UF
0402
C9
0.01UF
0402
C12
0.01UF
0402
C13
0.01UF
0402
C14
0.01UF
0402
A13
VROUT0
B12
VROUT1
C16
0.01UF
0402
3V_BP
R3
0
0402
3V_BP
VDDINT
RTXI
PH9_ERXD1
ADSP-BF537
MINI_BGA182
SCKE
R214
100
0402
DNP
C27
18PF
0805
PH8_ERXD0
ADSP-BF537
MINI_BGA182
TDI
ADSP-BF537
MINI_BGA182
C26
18PF
0805
PH7_COL
TRST
C230
22PF
0805
DNP
Y1
25MHZ
OSC005
PH6_PHYINT
SWE
C10
RESET
XTAL
PH5_TXCLK
B2
B3
GPIO/COL
B4
GPIO/ERXD0
B5
GPIO/ERXD1
B6
GPIO/ERXD2
A2
GPIO/ERXD3
A3
GPIO/ERXDV/TACLK5
A4
GPIO/ERXCLK/TACLK6
A5
GPIO/ERXER/TACLK7
A6
GPIO/MII_CRS/RMII_CRS_DV
GPIO/PPI_D7
VDDEXT
RESET
PH4_ETXEN
B1
GPIO/PPI_D5
PF10_LED5
PH3_ETXD3
C6
F3
PG5_ELVIS_PF7
PH2_ETXD2
C5
GPIO/PPI_D3
1
PH1_ETXD1
C4
F2
PF9_LED4
PH0_ETXD0
C3
F1
PF8_LED3
M2
GPIO/ETXD0
GPIO/PPI_D1
G3
PF7_LED2
C2
GPIO/PPI_D0
VDDINT
XTAL
NMI
U35
PF4_PB3
N2
TMS
P2
TCK
N1
TRST
M3
TDI
N3
TDO
SCAS
SWE
ABE0
BMODE0
P3
SRAS
C14
SCAS
EMU
N4
BMODE2
ARE
H14
AWE
PF3_PB2
PG12
AMS3
D13
PF2_PB1
PG11
AOE
G14
PF1_UART0_RX
AMS1
AMS2
G12
PF0_UART0_TX
AMS0
G13
AWE
2
PJ9_TSCLK0
R216
27
0402
E14
AMS2
AOE
M1
GPIO/UART0_TX/DMAR0
L1
MDIO
GPIO/UART0_RX/DMAR1/TACI1
B11
L2
SCL
GPIO/UART1_TX/TMR7
C11
L3
SDA
GPIO/UART1_RX/TMR6/TACI6
D7
L4
DR0SEC/CAN_RX/TACI0
GPIO/TMR5/SPI_SSEL6
D8
K1
DT0SEC/CAN_TX/SPI_SSEL7
GPIO/TMR4/SPI_SSEL5
C8
K2
RSCLK0/TACLK2
GPIO/TMR3/SPI_SSEL4
B8
K3
RFS0/TACLK3
GPIO/TMR2/PPI_FS3
D9
K4
DR0PRI/TACLK4
GPIO/TMR1/PPI_FS2
C9
J1
TSCLK0/TACLK1
GPIO/TMR0/PPI_FS1
D10
J2
TFS0/SPI_SSEL3
GPIO/SPI_SSEL1
D11
J3
DT0PRI/SPI_SSEL2
GPIO/SPI_MOSI
H1
GPIO/SPI_MISO
A9
H2
RTXI
GPIO/SPI_SCK
A8
H3
RTXO
GPIO/SPI_SS/TACLK0
H4
GPIO/PPI_CLK/TMRCLK
MDC
B7
RTXO
E13
ARDY
C7
PJ0_MDC
D3
D5
K12
L12
D2
D4
A6
A8
P9
D[0:15]
U35
D3
A5
A7
D1
M8
A4
K13
N9
D2
J13
A5
D0
D1
A3
A4
M9
D0
C25
0.01UF
0402
RTXO
E5
VDDINT1
E8
VDDINT2
E10
VDDINT3
G10
VDDINT4
K5
VDDINT5
K8
VDDINT6
K10
VDDINT7
3
ADSP-BF537
MINI_BGA182
R11
10M
0603
R170
10K
0402
R171
10K
0402
R172
10K
0402
R173
1.2K
0402
R174
10K
0402
R175
1.2K
0402
R176
10K
0402
C208
10UF
0805
C207
10UF
0805
C18
0.01UF
0402
C23
0.01UF
0402
C22
0.01UF
0402
C24
0.01UF
0402
C21
0.01UF
0402
C20
0.01UF
0402
C19
0.01UF
0402
C17
0.01UF
0402
Y2
4
PJ8_DR0PRI
3
NMI
1
TERM1 TERM2
2
NC1
NC2
ANALOG
DEVICES
BR
4
C28
18PF
0805
32.768KHZ
OSC008
C29
18PF
0805
PJ3_SDA
PJ4_CAN_RX
PJ2_SCL
ARDY
RTC
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF537 EZ-KIT LITE
DSP
Title
Size
20 Cotton Road
Rev
A0188-2004
2.2A
Sheet
5-24-2007_9:44
D
2
of
11
A
B
C
D
3V_BP
A[1:19]
D[0:15]
3V_BP
U24
1
A1
A1
23
A0
A2
24
A3
25
26
29
A6
DQ1
A2
A5
R196 22 0402
DQ0
A1
A4
U16
DQ2
A3
DQ3
A4
DQ4
30
A5
DQ5
2
D0
A1
R197 22 0402
5
D1
A2
D2
A3
R195 22 0402
8
R199 22 0402
11
D3
A4
D4
A5
R202 22 0402
44
R198 22 0402
47
D5
A6
R201 22 0402
A7
31
A8
32
A9
33
A9
A10
34
A10
A6
DQ6
A7
DQ7
50
D6
A7
D7
A8
R200 22 0402
53
A8
A9
22
SA10
A10
SA10
A12
35
A12
A13
36
A13
A18
20
A18
A11
A12
23
A0
24
A1
25
A2
26
A3
29
A4
30
A5
31
A6
32
A7
33
A8
34
A9
22
A10
35
A11
36
A12
A3
R187 22 0402
2
DQ0
5
DQ1
8
DQ2
11
DQ3
44
DQ4
47
DQ5
50
DQ6
53
DQ7
D8
A4
D9
A5
D10
A6
D11
A7
D12
A8
D13
A9
D14
A10
D15
A11
R188 22 0402
R189 22 0402
R192 22 0402
R190 22 0402
R193 22 0402
R191 22 0402
R194 22 0402
A12
A13
3V_BP
A14
A15
A16
A17
A19
2
BA0
21
A19
BA1
16
SWE
WE
CS
17
SCAS
CAS
CKE
18
SRAS
RAS
CLK
19
37
38
SMS
SWE
SCKE
SCAS
SCLK
20
BA0
21
BA1
A18
R12
10K
0402
16
WE
17
CAS
18
RAS
SRAS
19
CS
37
CKE
38
CLK
R13
10K
0402
R14
10K
0402
R15
10K
0402
R16
10K
0402
A19
SMS
A0
F2
A1
E2
A2
C2
A3
D2
A4
F3
A5
E3
A6
C3
A7
D6
A8
C6
A9
E6
A10
F6
A11
D7
A12
C7
A13
E7
A14
F7
A15
G7
A16
D3
A17
E4
A18
F5
A19
F4
A20
SCLK
6
12GND1
28GND2
41GND3
46GND4
52GND5
54GND6
GND7
6
12GND1
28GND2
41GND3
46GND4
52GND5
54GND6
GND7
AMS2
D2
K4
D3
K5
D4
G5
D5
K6
D6
G6
D7
H3
D8
J3
D9
H4
D10
J4
D11
H5
D12
J6
D13
H6
D14
J7
D15
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15/A-1
2
RESET
BYTE
SN74LVC1G08
SOT23-5
8
C4
U49
1
RY/BY~
4
7
H2
CE
J2
OE
C5
WE
D4
VPP/WP~
2
3
6
1
4
5
2
4
AMS3
ON
2
AMS1
3
MT48LC32M8A2
TSOP54
AMS0
2
MT48LC32M8A2
TSOP54
SW6
1
1
ABE1
39
DQM
D1
G4
D1
H7
2
DQM
K3
D0
D5
U22
4
39
D0
SCKE
1
ABE0
1
G3
SN74LVC1G08
SOT23-5
U39
4
SN74AHC1G00
SOT23-5
DIP4
SWT018
SW6: FLASH Enable Switch
1
M29W320DB
TFBGA63_80
U48
K2
K7GND1
GND2
U15
1
VDD13
VDD29
VDD314
VDD427
VDD543
VDD649
VDD7
1
VDD13
VDD29
VDD314
VDD427
VDD543
VDD649
VDD7
A2
G2
J5
VDD
3V_BP
4
2
SN74LVC1G08
SOT23-5
64 MB SDRAM
(8M x 8 x 4 banks) x 2 chips
RESET
ARE
4 MB FLASH
(2M x 16)
AWE
3
3
Memory Map
START
3V_BP
0x0000 0000
0x2000 0000
0x2010 0000
0x2020 0000
0x2030 0000
3V_BP
3V_BP
C35
0.01UF
0402
C30
0.01UF
0402
C31
0.01UF
0402
C32
0.01UF
0402
C33
0.01UF
0402
C34
0.01UF
0402
C42
0.01UF
0402
C43
0.01UF
0402
C41
0.01UF
0402
C44
0.01UF
0402
C45
0.01UF
0402
C46
0.01UF
0402
C37
0.01UF
0402
C38
0.01UF
0402
C39
0.01UF
0402
C40
0.01UF
0402
END
BANK
0x03FF FFFF
0x200F FFFF
0x201F FFFF
0x202F FFFF
0x203F FFFF
SDRAM Bank 0
ASYNC Memory Bank 0
ASYNC Memory Bank 1
ASYNC Memory Bank 2
ASYNC Memory Bank 3
4
Size
Board No.
C
Date
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF537 EZ-KIT LITE
SDRAM AND FLASH
Title
B
64MB SDRAM
1 MB FLASH
1 MB FLASH
1 MB FLASH
1 MB FLASH
C36
0.01UF
0402
ANALOG
DEVICES
A
DEVICE
Rev
A0188-2004
2.2A
Sheet
5-24-2007_9:44
D
3
of
11
A
B
C
D
3.3V
R169
10K
0402
C216
10UF
0805
FER3
600
0603
1
R20
100K
0603
R21
5.76K
0603
1
PF12_AUDIO_RESET
R28
5.76K
0603
U47
4
AUDIO_RESET
2
RESET
1
SN74LVC1G08
SOT23-5
C71
120PF
0603
C53
100PF
0603
3.3V
R23
237.0
0603
U29
2
1
AGND
3
LMV722M
SOIC8
R17
5.76K
0603
C70
1000PF
0603
R35
5.76K
0603
C68
100PF
0603
LABEL "LINE IN"
J9
ADC LEFT
ADC
C47
120PF
0603
1
5
LEFT_IN
AGND
AMP_LEFT_IN
4
R32
750.0K
0603
LOOPBACK_LEFT
3
RIGHT_IN
C67
1000PF
0603
13
CON001
CAPLP
11
5
VINLN
LMV722M
SOIC8
18
AGND
19
VINRP
FER4
600
0603
R34
5.76K
0603
R22
5.76K
0603
R26
100K
0603
C49
120PF
0603
C52
100PF
0603
CAPRP
1
MCLK
MCLK
24
AUDIO_RESET
2
R219
27
0402
28
LRCLK
27
BCLK
26
DOUT
25
DIN
CAPRN
17
AGND
ADC_M~/S
VINRN
16
C215
10UF
0805
8
XCTRL
2
CCLK/{256~/512}
3
COUT/{DF0}
4
CIN/{DF1}
5
CLATCH/{M~/S}
VINLP
10
2
21
CASC
CAPLN
12
7
AMP_RIGHT_IN
R25
10K
0402
U33
R33
237.0
0603
U29
6
LOOPBACK_RIGHT
2
R24
10K
0402
PJ7_RFS0_S
R217
30
0402
PJ6_RSCLK0_S
R218
27
0402
14
VREF
RESET
PJ8_DR0PRI_S
AD1871YRSZ
SSOP28
VREF_AUDIO
R31
237.0
0603
U30
2
C54
100PF
0603
1
AGND
C61
100PF
0603
C64
0.1UF
0603
C214
10UF
0805
3
LMV722M
SOIC8
R19
5.76K
0603
C69
1000PF
0603
R18
5.76K
0603
C51
0.01UF
0603
C65
100PF
0603
C50
0.01UF
0603
C63
0.01UF
0603
C62
0.01UF
0603
AGND
ADC RIGHT
C48
120PF
0603
AGND
R30
750.0K
0603
3
SW7
1
5
15
3
14
4
13
5
12
6
11
7
10
8
9
3
PJ7_RFS0
LMV722M
SOIC8
4
PJ9_TSCLK0
5
PJ10_TFS0
6
AGND
7
8
ADC_M~/S
16
2
2
PJ6_RSCLK0
ON
1
PJ8_DR0PRI
7
VREF_AUDIO
3
AGND
R29
237.0
0603
U30
6
C66
1000PF
0603
PJ8_DR0PRI_S
PJ6_RSCLK0_S
PJ7_RFS0_S
PJ9_TSCLK0_S
PJ10_TFS0_S
DIP8
SWT016
A5V
A5V
5V
3.3V
5V
FER2
600
0603
R27
0
0603
SW7: Audio Selection Switch
C55
0.1UF
0402
C56
0.1UF
0402
C57
0.1UF
0402
C212
10UF
0805
C213
10UF
0805
C59
0.1UF
0402
C60
0.1UF
0402
AGND
4
AGND
ANALOG
DEVICES
AGND
LMV722
LMV722
AD1871
AD1871
AD1871
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF537 EZ-KIT LITE
ADC AND AUDIO IN
Title
Size
20 Cotton Road
Rev
A0188-2004
2.2A
Sheet
5-24-2007_9:44
D
4
of
11
A
B
C
D
1
1
C81
100PF
0603
R43
5.49K
0603
R40
11.0K
0603
R44
3.32K
0603
3.3V
DAC LEFT
DAC
R54
33
0402
U4
1
OE
OUT
96/48~
3
6
384/256~
12.288MHZ
OSC003
CT2
68UF
CAP003
U31
R50
604.0
0603
1
3
U38
10
2
C77
100PF
0603
MCLK
R53
10K
0603
C79
330PF
0603
R42
5.49K
0603
16
OUTL17
OUTL+
C80
680PF
0603
LMV722M
SOIC8
R45
1.65K
0603
R41
49.9K
0603
C78
2200PF
0603
7
X2MCLK
2
MCLK
PJ9_TSCLK0_S
PJ10_TFS0_S
PJ11_DT0PRI
2
3.3V
26
BCLK
13
OUTR12
OUTR+
R52
2.74K
0603
25
LRCLK
27
SDATA
C82
220PF
0603
14
FILTR
19
FILTB
LABEL "LINE OUT"
AGND
1
4
CCLK
3
CLATCH
5
CDATA
22
C218
10UF
0805
ZEROL
8
ZEROR
C87
0.1UF
0603
C217
10UF
0805
R47
5.49K
0603
5
LEFT_OUT
C85
100PF
0603
4
LOOPBACK_LEFT
3
LOOPBACK_RIGHT
AUDIO_RESET
R37
10K
0603
2
J10
24
R39
11.0K
0603
RESET
R48
3.32K
0603
2
RIGHT_OUT
CON001
9
DEEMP
23
MUTE
C84
330PF
0603
AGND
21
IDPM0
20
IDPM1
6
CT1
68UF
CAP003
U31
C75
100PF
0603
R51
604.0
0603
7
5
AD1854JRSZ
SSOP28
R46
5.49K
0603
DAC RIGHT
C83
680PF
0603
LMV722M
SOIC8
R49
1.65K
0603
R36
2.74K
0603
C76
2200PF
0603
R38
49.9K
0603
C86
220PF
0603
AGND
3
3
VREF_AUDIO
5V
A5V
C72
0.1UF
0603
C73
0.1UF
0603
C74
0.1UF
0603
AGND
AD1854
AD1854
ANALOG
DEVICES
LMV722
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF537 EZ-KIT LITE
DAC AND AUDIO OUT
Title
Size
20 Cotton Road
Rev
A0188-2004
2.2A
Sheet
5-24-2007_9:44
D
5
of
11
A
B
C
D
3.3V
5V
SW2
6
7
14
3
6
8
4
5
1
2
PF15_CAN_STB~
3
PF13_CAN_ERR
PJ4_CAN_RX
4
1
8
2
ON
1
PF14_CAN_EN
1
DIP4
SWT018
4
EN
3
VDD
10
VBAT
U21
5
R79
10K
0402
VIO
R80
10K
0402
3.3V
C106
100PF
0603
7
INH
STB
R65
62.0
0603
R81
10K
0603
DNP
J11
R55
10
0603
9
WAKE
1
ERR
2
SPLIT
4
RXD
11
CANH
3
TXD
13
CANL
12
CON039
GND
PJ5_CAN_TX
C90
4700PF
0603
2
SW2: CAN Enable Switch
TJA1041
SOIC14
1
R66
62.0
0603
R62
10
0603
LABEL "CAN"
SW3: Ethernet Mode Selection Switch
J5
1
2
3
MODE0 MODE1 MODE2
1
2
ON
ON
10B-T HALF
ON
ON
OFF
10B-T FULL
ON
OFF
ON
100B-T HALF
ON
OFF
OFF
100B-T FULL
OFF
ON
ON
100B-T HALF/AUTO
OFF
ON
OFF
REPEATER MODE/AUTO
OFF
OFF
ON
POWER DOWN
OFF
OFF
OFF
ALL CAPABLE/AUTO
3
3.3V
5V
C94
100PF
0603
4
CON039
C103
0.01UF
0402
CAN
C104
0.01UF
0402
ETHERNET MODE
ON
3V_BP
LABEL "ETHERNET"
DEFAULT
FER5
600
0603
3V_BP
ACTIVITY
R76
330
0603
FER9
600
0603
R206
1.5K
0603
R67
49.9
0603
LAN_AVDD
R68
49.9
0603
R70
49.9
0603
R71
49.9
0603
R69
10
0603
13
14
J4
2
2
26
MDIO
27
MDC
29
RXD3
30
RXD2
31
RXD1
32
RXD0
33
RX_DV
34
RX_CLK
35
RX_ER
37
TX_ER
38
TX_CLK
39
TX_EN
41
TXD0
42
TXD1
44
TXD2
45
TXD3
47
COL
48
CRS
PJ1_MDIO
PJ0_MDC
PH11_ERXD3
C102
0.01UF
0402
C99
0.01UF
0402
C98
0.01UF
0402
C97
0.01UF
0402
C96
0.01UF
0402
C101
0.01UF
0402
C100
0.01UF
0402
C223
0.01UF
0402
PH10_ERXD2
PH9_ERXD1
PH8_ERXD0
PH12_ERXDV
PH13_ERXCLK
PH14_ERXER
PH5_TXCLK
PH4_ETXEN
XTAL1_PHY
PH0_ETXD0
R211
1M
0603
DNP
R212
63.4
0402
DNP
3V_BP
PH1_ETXD1
PH2_ETXD2
PH3_ETXD3
PH7_COL
PH15_CRS
13
53
AVDD157
AVDD261
AVDD363
AVDD4
3V_BP
VREG
U14
LAN_AVDD
8
VDD118
VDD243
VDD3
RJ45
XMIT
7
TX+
1
1
TXCT
8
TX-
2
RX+
9
RXCT
3
RX-
6
5
VCC-
4
6
VCC+
5
51
TXP
C91
6800PF
0603
50
TXN
55
RXP
C92
6800PF
0603
54
RXN
2
16
SPEED100/PHYAD0
17
RCV
LINKON/PHYAD1
3
19
ACTIVITY/PHYAD2
20
FDUPLEX/PHYAD3
2
GPO1/PHYAD4
C93
0.01UF
0603
46
INT
C95
0.022UF
0805
PH6_PHYINT
POE_VCCPOE_VCC+
1
GPO0
7
3
GPO2
8
3
Y3
25MHZ
OSC005
DNP
C228
27PF
0402
DNP
12
REG_EN
C224
27PF
0402
DNP
R72
10K
0402
R73
10K
0402
R74
10K
0402
VDD_CORE
3
14
9
TEST0
10
TEST1
LINKON
ACTIVITY
R97
10K
0402
11
CLK_FREQ
R177
10K
0402
R178
10K
0402
R185
10K
0402
R186
10K
0402
3V_BP
10
SHIELD
SW3
1
ON
1
7
3
6
4
5
2
3V_BP
8
2
3
4
MODE0
5
MODE1
6
MODE2
4
DIP4
SWT018
SHGND
CON033
15
16
R75
330
0603
25
RESET
LINKON
RESET
R209
33
0402
DNP
4
VDD
1
OE
OUT
C105
0.01UF
0402
59
EXRES1
3
GND
25MHZ 2
OSC003
DNP
4
C219
10UF
0805
R78
10K
0402
R77
12.4K
0603
LAN83C185
TQFP64
ANALOG
DEVICES
49
52AGND1
58AGND2
60AGND3
62AGND4
AGND5
U53
23
CLKIN/XTAL1
22
XTAL2
7
15GND1
21GND2
24GND3
28GND4
36GND5
40GND6
GND7
R208
10K
0402
DNP
Size
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF537 EZ-KIT LITE
ETHERNET AND CAN
Title
R210
33
0402
CLKBUF
20 Cotton Road
Rev
A0188-2004
2.2A
Sheet
5-24-2007_9:44
D
6
of
11
A
B
C
D
3V_BP
R87
10K
0402
LABEL "PB1"
U54
R100
100
0805
U37
3
1
R6
10
0603
SW13
MOMENTARY
SWT013
4
2
I0A
3
I1A
5
I0B
6
I1B
11
I0C
10
I1C
14
I0D
13
I1D
WS_P0_1
RS_P0
PF6_LED1
74LVC14A
SOIC14
WS_P1_1
3V_BP
PF7_LED2
C222
1UF
0805
WS_P2_1
PF8_LED3
R179
10K
0402
WS_P3_1
PF9_LED4
R88
10K
0402
R101
100
0805
SW12
MOMENTARY
SWT013
6
PF10_LED5
C221
1UF
0805
WS_P5_1
PF11_LED6
SW5
1
ON
1
8
2
7
3
6
4
5
2
3
4
LABEL "PB3"
PF2_PB1
PF3_PB2
PF4_PB3
PF5_PB4
DIP4
SWT018
SW11
MOMENTARY
SWT013
8
12
YA
YB
YC
YD
4
2
1A1
4
1A2
6
1A3
8
1A4
18
1Y1
16
1Y2
14
1Y3
12
1Y4
11
2A1
13
2A2
15
2A3
17
2A4
9
2Y1
7
2Y2
5
2Y3
3
2Y4
1
OE1
19
OE2
3V_BP
LED6
YELLOW
LED001
7
LED5
YELLOW
LED001
LED4
YELLOW
LED001
LED3
YELLOW
LED001
LED2
YELLOW
LED001
POWER
LED7
GREEN
LED001
LED1
YELLOW
LED001
IDT74FCT3244APY
SSOP20
9
R83
330
0603
12
R91
330
0603
R92
330
0603
R93
330
0603
R94
330
0603
R95
330
0603
R96
330
0603
1
S
2
E
R57
10
0603
U37
9
YD
9
15
SW5: Push Button Enable Switch
R103
100
0805
YC
2
I0A
3
I1A
5
I0B
6
I1B
11
I0C
10
I1C
14
I0D
13
I1D
WS_P4_1
74LVC14A
SOIC14
2
1
U36
U55
RS_P1
R89
10K
0402
7
ADG774ABRQZ
QSOP16
R56
10
0603
U37
5
YB
4
1
S
15
E
ELVIS_SELECT
LABEL "PB2"
YA
ADG774ABRQZ
QSOP16
RS_P2
3V_BP
74LVC14A
SOIC14
C220
1UF
0805
SW16
4
BMODE1
2
5
C2
6
LABEL "PB4"
8
ROTARY
SWT019
R90
10K
0402
R82
100
0805
R59
10
0603
U37
1
SW10
MOMENTARY
SWT013
3 4 5
2
6
1 07
2
3
4
2
C1
1
1
BMODE2
BMODE0
R85
10K
0402
R84
10K
0402
3V_BP
R86
10K
0402
RS_P3
74LVC14A
SOIC14
RESET
LED8
RED
LED001
C210
1UF
0805
R181
10K
0402
R182
10K
0402
SW16: Boot Mode Select Switch
3
R8
10K
0402
R9
10K
0402
RESET
POSITION
R98
330
0603
R7
10K
0402
U27
1
MR
3V_BP
SW9
MOMENTARY
SWT013
1
DA_SOFT_RESET
R162
10K
0402
U37
13
4
11
1
5
PFO
2
RESET
ADM708SARZ
SOIC8
74LVC14A
SOIC14
PG15_USB_IRQ
1
C108
0.01UF
0402
C211
0.01UF
0402
U52
4
4
RESET
SN74LVC1G08
SOT23-5
JP12
1
2
RESERVED
3
BOOT FROM SPI MEMORY
4
BOOT FROM SPI HOST
5
BOOT FROM SERIAL TWI MEMORY
6
BOOT FROM TWI HOST
7
BOOT FROM UART HOST
DEFAULT
2
SN74LVC1G32
SOT23-5
IDC2X1
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
Push Button Enable Switch
ANALOG
DEVICES
C225
0.01UF
0402
Size
IDT74FCT3244
QS3257
B
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF537 EZ-KIT LITE
PUSH BUTTONS, LEDS AND BOOT MODE
Board No.
C
QS3257
Date
A
BOOT FROM 16-BIT FLASH MEMORY
U58
Title
ADM708
1
2
R205
10K
0402
74LVC14A
EXECUTE FROM 16-BIT EXTERNAL MEMORY
10
3V_BP
4
7
SN74LVC1G08
SOT23-5
PF7_LED2
C107
0.01UF
0402
U50
RESET
0
U37
12
74LVC14A
SOIC14
C109
0.01UF
0402
PFI
2
AS_P3_1
R5
10K
0402
4
8
3
BOOT MODE
Rev
A0188-2004
2.2A
Sheet
5-24-2007_9:44
D
7
of
11
A
B
C
D
R163
0
0402
LEFT_IN
A5V
3
10
4
9
2
15
5
8
3
14
6
7
4
13
5
12
6
11
7
10
8
9
6
OUT
SW8: Function Generator Switch
3
AD820ARZ
SOIC8
5
REF
ACH4+
ACH0+
AD623ARMZ
USOIC8
16
AMP_LEFT_IN
AMP_RIGHT_IN
1
LEFT_OUT
RIGHT_OUT
DIP8
SWT016
R102
10.0K
0603
C205
0.01UF
0402
8
RG-
6
ON
RG+
1
R160
10.0K
0603
4
V-
7
8
V+
DIP6
SWT017
6
R61
0.1
0603
U11
2
5
IN-
7
4
IN+
2
6
3
3
5
FUNC_OUT
U2
SW1
1
ACH3+
2
4
DAC1
AMP_RIGHT_IN
1
1
AMP_LEFT_IN
11
3
DAC0
12
2
2
RIGHT_IN
R58
90.9K
0603
ON
SW8
1
ACH2+
VDDINT
1
VDDINT_SHUNT
A5V
SW1: Oscilloscope Select Switch
R60
11.0K
0603
C88
0.1UF
0603
C202
0.01UF
0402
P16
AGND
ELVIS_5V
1
2
3
4
U56
V_UNREG
P5
AGND
2
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
IDC2X1
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
2
RS_P2
RS_P0
ELVIS Voltage Selection Jumper
WS_P4_1
WS_P2_1
WS_P0_1
ELVIS_5V
A5V
R63
90.9K
0603
PG3__ELVIS_PF5_S
PG2_ELVIS_PF2_S
PG0_ELVIS_TRIGGER_S
VDDEXT
U3
3
IN+
2
IN-
8
RG+
1
RG-
3
AD623ARMZ
USOIC8
R148
0.1
0603
7
2
V+
R159
10.0K
0603
4
VOUT
REF
U23
VDDINT
6
6
ACH1+
3
AD820ARZ
SOIC8
5
C204
0.01UF
0402
ACH4+
ACH3+
ACH2+
ACH1+
ACH0+
R64
10.0K
0603
A5V
R104
25.5K
0603
FUNC_OUT
C89
0.1UF
0603
C203
0.01UF
0402
AGND
VDDINT
VDDINT_SHUNT
DAC0
+15_P_1
+15_P_2
+5_P_1
+5_P_2
+5_P_3
GND5
RS_P[6]
RS_P[4]
RS_P[2]
RS_P[0]
GND7
KEY2
KEY4
WS_P[6]_1
WS_P[4]_1
WS_P[2]_1
WS_P[0]_1
GND9
ID6
ID4
ID2
ID0
GND11
NC1
AS_P[6]_1
AS_P[4]_1
AS_P[2]_1
AS_P[0]_1
PB_PRES_1
UPDATE
CONVERT
SCANCLK
TRIG1_2
GATE1_1
GPCTR0_SOURCE
GPCTR0_OUT_1
GND13
VH_1
AIGND2
ACH7_1
ACH6_1
ACH5_1
ACH4
AIGND4
ACH3
ACH2
ACH1
ACH0
AISENSE_1
KEY6
KEY8
NC4
FG_SYNC_1
FG_SIG_1
GND14
NC5
ZL_1
ZH_1
NC8
DAC0_2
GND17
VDCA_1
-15_P_1
-15_P_2
GND1
GND2
GND3
GND4
RS_P[7]
RS_P[5]
RS_P[3]
RS_P[1]
GND6
KEY1
KEY3
WS_P[7]_1
WS_P[5]_1
WS_P[3]_1
WS_P[1]_1
GND8
ID7
ID5
ID3
ID1
GND10
AS_P[7]_1
AS_P[5]_1
AS_P[3]_1
AS_P[1]_1
+5V2
WFTRIG
STARTSCAN
EXTSRTOBE
TRIG2
SOURCE1_1
GPCRT1_OUT
GPCTR0_GATE
FREQ_OUT
GND12
VL_1
AIGND1
ACH15_1
ACH14_1
ACH13_1
ACH12
AIGND3
ACH11
ACH10
ACH9
ACH8
NC2
KEY5
KEY7
NC3
FM_1
AM_1
+5V3
GND15
NC6
ZM_1
NC7
DAC1_2
GND16
VDCB_1
B01
B02
B03
B04
B05
B06
B07
B08
B09
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
4
I0A
YA
PG0_ELVIS_TRIGGER
3
I1A
JP6
1
DSP CORE VOLTAGE & CURRENT
VDDEXT_SHUNT
PG0_ELVIS_TRIGGER_S
IDC2X2
REPLACES S2012-02-ND
DNP
2
PG1_ELVIS_PF1_S
5
7
I0B
YB
PG1_ELVIS_PF1
9
YC
PG2_ELVIS_PF2
6
I1B
PG2_ELVIS_PF2_S
11
I0C
10
RS_P3
RS_P1
2
I1C
14
12
YD
13
I0D
I1D
1
S
WS_P5_1
WS_P3_1
WS_P1_1
ELVIS_SELECT
15
E
ADG774ABRQZ
QSOP16
ELVIS_5V
U57
PG3_ELVIS_PF5
2
4
I0A
YA
PG3__ELVIS_PF5_S
3
I1A
AS_P3_1
PG4_ELVIS_PF6
5
7
I0B
YB
PG4_ELVIS_PF6_S
9
YC
PG5_ELVIS_PF7_S
6
PG4_ELVIS_PF6_S
PG5_ELVIS_PF7_S
I1B
PG5_ELVIS_PF7
PG1_ELVIS_PF1_S
11
10
I0C
14
I1C
12
YD
I0D
13
I1D
1
S
15
E
ADG774ABRQZ
QSOP16
3
PFI
3.3V
DAC1
PCI32B
C227
0.01UF
0402
AGND
DSP IO CURRENT
C226
0.01UF
0402
JP8
1
2
ELVIS_SELECT
AGND
IDC2X1
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
ELVIS CONNECTOR
NI ELVIS ID 30 (0001 1110)
ELVIS Select Jumper
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF537 EZ-KIT LITE
ELVIS INTERFACE
Title
Size
20 Cotton Road
Rev
A0188-2004
2.2A
Sheet
5-24-2007_9:44
D
8
of
11
A
B
C
D
EXPANSION INTERFACE (TYPE B)
5V_EI
3V_BP
5V_EI
3V_BP
D[0:15]
A[1:19]
J1
1
2
2
1
J2
2
1
2
J3
1
4
3
4
3
4
3
A1
6
5
6
5
6
5
A3
8
7
A2
8
7
8
7
A5
10
9
A4
10
9
10
9
A7
12
11
A6
12
11
12
11
A9
14
13
A8
14
13
14
13
A11
16
15
A10
16
15
16
15
A13
18
17
A12
18
17
18
17
A15
20
19
A14
20
19
20
19
A17
22
21
A16
22
21
22
21
A19
24
23
A18
24
23
24
23
26
25
26
25
26
25
28
27
28
27
28
27
30
29
30
29
30
29
32
31
32
31
32
31
34
33
34
33
34
33
36
35
36
35
36
35
38
37
38
37
38
37
D1
40
39
D0
40
39
40
39
D3
42
41
D2
42
41
42
41
D5
44
43
D4
44
43
44
43
D7
46
45
D6
46
45
46
45
D9
48
47
D8
48
47
48
47
D11
50
49
D10
50
49
50
49
D13
52
51
D12
52
51
52
51
D15
54
53
D14
54
53
54
53
56
55
56
55
56
55
58
57
58
57
58
57
60
59
60
59
60
59
62
61
62
61
62
61
64
63
64
63
64
63
66
65
66
65
66
65
68
67
68
67
68
67
70
69
70
69
70
69
72
71
72
71
72
71
74
73
74
73
74
73
When designing your JTAG interface please refer to the
76
75
76
75
76
75
Engineer to Engineer Note EE-68 which can be found at
78
77
78
77
78
77
80
79
80
79
80
79
82
81
82
81
82
81
84
83
84
83
84
83
86
85
86
85
86
85
88
87
88
87
88
87
PG0_ELVIS_TRIGGER
PG2_ELVIS_PF2
POE_VCC+
PF7_LED2
PF4_PB3
PF2_PB1
3
R168
0
0603
90
89
CON019
PF11_LED6
PF12_AUDIO_RESET
PF0_UART0_TX
PF8_LED3
PF6_LED1
PG9
PG15_USB_IRQ
PG14
PG13
PJ5_CAN_TX
PJ11_DT0PRI
PJ10_TFS0
PJ9_TSCLK0
PG5_ELVIS_PF7
PG7_UART0_RTS
PG9
PG11
PG13
PG15_USB_IRQ
PF4_PB3
PF3_PB2
ABE1
ABE0
AOE
AWE
PF15_CAN_STB~
PG1_ELVIS_PF1
SMS
PG3_ELVIS_PF5
POE_VCCABE0
PF6_LED1
PF5_PB4
PF3_PB2
SRAS
SA10
SWE
90
PF0_UART0_TX
PF2_PB1
PF13_CAN_ERR
PJ3_SDA
PF14_CAN_EN
PH1_ETXD1
PH3_ETXD3
PH5_TXCLK
NMI
PF10_LED5
PF7_LED2
PF9_LED4
PG8
RESET
PG12
PG11
PG10
RESET
R221
27
0402
PH7_COL
PH9_ERXD1
PJ8_DR0PRI
PJ4_CAN_RX
PH11_ERXD3
R222
27
0402
PH13_ERXCLK
PJ7_RFS0
PG4_ELVIS_PF6
R220
27
0402
PH15_CRS
PJ1_MDIO
PJ6_RSCLK0
PG6_UART0_CTS
PG8
PG10
PG12
PG14
PF14_CAN_EN
PF2_PB1
AMS3
AMS2
AMS1
AMS0
ARDY
ARE
ABE1
SCKE
SCAS
SCLK
89
90
CON019
1
PF1_UART0_RX
PF3_PB2
PJ2_SCL
PH0_ETXD0
PH2_ETXD2
PH4_ETXEN
PF6_LED1
CLKBUF
PH6_PHYINT
PH8_ERXD0
PH10_ERXD2
PH12_ERXDV
PH14_ERXER
PJ0_MDC
2
3.3V
All USB interface circuitry is considered proprietary and has
been omitted from this schematic.
3.3V
http://www.analog.com
R215
0
0402
3.3V
R226
10K
0603
DNP
BR
BG
BGH
3
3V
89
CON019
ZP4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TMS
TCK
TCK
DA_EMULATOR_SELECT
DA_EMULATOR_EMU
TRST
TRST
DA_EMULATOR_TMS
TDI
TDI
TDO
TDO
EMU
EMU
DA_EMULATOR_TCK
DA_EMULATOR_TRST
DA_EMULATOR_TDI
DA_EMULATOR_TDO
DA_GP0
IDC7X2
RESET
TMS
DA_GP1
RESET
DA_GP2
SHGND
DA_SOFT_RESET
GND
DA_SOFT_RESET
DA_GP3
DEBUG_AGENT
DSP JTAG HEADER
SHGND
ANALOG
DEVICES
4
Title
Size
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF537 EZ-KIT LITE
EXPANSION INTERFACE & JTAG
Board No.
C
Date
20 Cotton Road
Rev
A0188-2004
2.2A
Sheet
5-24-2007_9:44
D
9
of
11
A
B
5V
3.3V
5V
V_UNREG
PJ9_TSCLK0
PJ8_DR0PRI
1
PJ4_CAN_RX
R223
27
0402
PJ5_CAN_TX
PJ11_DT0PRI
PJ6_RSCLK0
PF11_LED6
PF12_AUDIO_RESET
PF13_CAN_ERR
PJ3_SDA
PJ2_SCL
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
PJ7_RFS0
PG12
PG8
PJ10_TFS0
PG9
PG15_USB_IRQ
PF10_LED5
PJ11_DT0PRI
PJ10_TFS0
PF6_LED1
PF12_AUDIO_RESET
PF13_CAN_ERR
PJ3_SDA
PJ2_SCL
PF9_LED4
PF4_PB3
PF8_LED3
PJ5_CAN_TX
5
8
7
10
9
12
11
14
13
16
15
RESET
3V_BP
PG11
1
C112
0.1UF
0402
PG14
U32
C114
0.1UF
0402
C1+
J6
3
PF11_LED6
PF5_PB4
3
6
1
PG10
PF14_CAN_EN
4
PF7_LED2
33
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
IDC17X2
C1-
2
PF14_CAN_EN
1
V+
4
PF10_LED5
PJ11_DT0PRI
6
C2+
C113
0.1UF
0402
6
V-
5
2
C2-
7
PJ10_TFS0
PF6_LED1
PF0_UART0_TX
PF5_PB4
PG6_UART0_CTS
PF4_PB3
PF1_UART0_RX
PJ5_CAN_TX
11
SW4
1
10
2
7
12
3
6
9
PG7_UART0_RTS
33
IDC17X2
4
5
T1IN
8
4
34
PG13
1
ON
18
R224
27
0402RESET
P7
2
3
PF7_LED2
P6
2
SPORT 1
2
PF8_LED3
3.3V
1
PF9_LED4
D
V_UNREG
SPORT 0
R225
27
0402
C
T2IN
R1OUT
14
3
T1OUT
7
8
T2OUT
13
4
R1IN
8
9
R2OUT
R2IN
ADM3202ARNZ
SOIC16
5
C111
0.1UF
0402
DIP4
SWT018
CON038
SW4: UART Enable Switch
R99
10K
0603
V_UNREG
JP9
SERIAL PORT
(UART 0)
1
2
IDC2X1
5V 3.3V
SHORTING
JUMPER
DEFAULT=INSTALLED
2
PPI
2
UART 0 Loop Jumper
V_UNREG
PF15_CAN_STB~
PG0_ELVIS_TRIGGER
PG2_ELVIS_PF2
PG4_ELVIS_PF6
PG6_UART0_CTS
PG8
PG10
PG12
PG14
PF9_LED4
PF14_CAN_EN
RESET
PF11_LED6
PF12_AUDIO_RESET
PF13_CAN_ERR
3
P8
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
PJ3_SDA
PJ2_SCL
3.3V
5V
TWI
PG1_ELVIS_PF1
PG3_ELVIS_PF5
PG5_ELVIS_PF7
PJ3_SDA
PG7_UART0_RTS
PG9
PG11
PG13
PG15_USB_IRQ
PG0_ELVIS_TRIGGER
PG2_ELVIS_PF2
PG4_ELVIS_PF6
PG6_UART0_CTS
PF10_LED5
PF15_CAN_STB~
P10
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
PJ2_SCL
RESET
PG1_ELVIS_PF1
PG3_ELVIS_PF5
V_UNREG
PG5_ELVIS_PF7
PG7_UART0_RTS
3.3V
SPI
IDC10X2
P9
2
1
PF9_LED4
4
3
PF8_LED3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
PF7_LED2
PF12_AUDIO_RESET
35
38
37
40
39
5V
R204
0
0402
PF13_CAN_ERR
PF14_CAN_EN
PJ11_DT0PRI
IDC20X2
DNP
PF6_LED1
PF4_PB3
3
PF11_LED6
RESET
PF10_LED5
R203
0
0402
PJ10_TFS0
PF5_PB4
DNP
PJ5_CAN_TX
IDC10X2
3.3V
5V
5V
3.3V
UART 1
TIMERS
P11
2
4
PF9_LED4
PF8_LED3
4
PF7_LED2
6
8
10
1
3
5
PF2_PB1
PF3_PB2
PF2_PB1
PF4_PB3
P12
2
1
4
3
6
5
8
7
10
9
PF6_LED1
PF4_PB3
ANALOG
DEVICES
7
9
PF3_PB2
IDC5X2
IDC5X2
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF537 EZ-KIT LITE
STAMP CONNECTORS
Title
Size
20 Cotton Road
Rev
A0188-2004
2.2A
Sheet
5-24-2007_9:44
D
10
of
11
A
B
C
5V_EI
3.3V
F1
2.5A
FUS001
FER7
190
FER002
4
V_UNREG
3
1
2
JP3
1
J7
R117
0
0603
VR1
1
C127
1000PF
0402
CT7
10UF
C
C130
0.1UF
0603
3
7.5V_POWER
CON005
3
INPUT
1
2
2
OUTPUT
3
GND
1
ADP3338AKCZ-33
SOT-223
SHORTING
JUMPER
DEFAULT=1 & 2
IDC3X1
S1012-03-ND
C134
1UF
0805
C128
1000PF
0402
TP9
LABEL "3.3V_BP"
D4
S2A
2A
DO-214AA
2
3V_BP
D
CT8
10UF
C
C133
0.1UF
0603
3V Selection Jumper
1
FER1
600
0603
LABEL "5V"
[email protected]
5V
5V_EI
JP5
1
TP8
2
SHGND
IDC2X1
L3
8UH
IND008
R116
0.015
0815
SHORTING
JUMPER
DEFAULT=INSTALLED
EI Voltage Selection Jumper
U12
C132
0.01UF
0402
1
R113
0
0603
DNP
CT6
150UF
D
8
2
U20
7
27
PGOOD
C120
0.1UF
0402
28
RUN/SS1
30
SENSE1+
2
M1
M2
RUBBER FOOT
MSC009
M3
RUBBER FOOT
MSC009
M4
RUBBER FOOT
MSC009
C129
27PF
0402
M5
RUBBER FOOT
MSC009
RUBBER FOOT
MSC009
C119
1000PF
0805
31
SENSE1-
MH4
MH5
MH6
3
MH7
R107
15.0K
0603
C124
220PF
0603
R121
0
0402
DNP
MH10
MH11
MH12
MH13
C122
33PF
0603
MH14
R106
15.0K
0603
D1
CMDSH-3
SOD-323
R112
10
0603
C135
10UF
1210
FDS6990AS
SOIC8
PLLIN
FCB
INTVCC
C110
4.7UF
0805
21
C116
0.1UF
0805
C58
10UF
1210
20
V_UNREG
ITH1
C131
1UF
0805
SGND
7
3VOUT
33
THSGND
PGND
19
SOD-323
CMDSH-3
D2
C117
220PF
0603
8
9
R110
20.0K
0603
3
PLLFLTR
EXTVCC
4
6
MH9
6
23
VOSENSE1
R120
0
0402
5
MH8
VIN
22
BG1
C118
33PF
0603
MH3
2
5
4
2
MH2
U12
C115
0.1UF
0402
24
1
MH1
FDS6990AS
SOIC8
BOOST1
R108
105.0K
0603
R109
20.0K
0603
26
TG1
25
SW1
ITH2
VOSENSE2
R111
61.9K
0603
18
BG2
17
BOOST2
SOIC8
FDS6990AS
3
C123
1000PF
0805
C121
27PF
0402
SW2
12
SENSE2+
LTC3727EUH-1
VQFN32
C136
0.1UF
0402
3
C126
0.1UF
0402
11
SENSE2-
3
U13
6
15
7
14
TG2
13
RUN/SS2
4
2
5
8
CT4
150UF
D
U13
1
LABEL "3.3V"
FDS6990AS
SOIC8
[email protected]
L2
8UH
IND008
R114
0.015
0815
3.3V
TP7
LABEL "VDDINT"
VDDINT_SHUNT TP10
C137
0.01UF
0402
3V_BP
VROUT
U28
R207
0
0402
L1
10UH
IND001
1
5
2
6
3
7
4
8
4
R115
0
0603
LABEL "GND"
3V_BP
D5
ZHCS1000
SOT23D
ANALOG
DEVICES
VDDEXT_SHUNT
CT5
68UF
D
TP2
TP3
TP4
TP5
TP6
R118
0
0603
FDS9431A
SOIC8
Size
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF537 EZ-KIT LITE
POWER
Title
C125
0.1UF
0603
20 Cotton Road
Rev
A0188-2004
2.2A
Sheet
5-24-2007_9:44
D
11
of
11
I
INDEX
A
C
AD1854 digital-to-analog converters (DACs),
1-14
AD1871 analog-to-digital converters (ADCs),
1-14, 2-12
ADC master/slave modes, 2-13
AMP_LEFT_IN signals, 2-16, 2-17
AMP_RIGHT_IN signals, 2-16, 2-17
~AMS3-0 (flash select) pins, 1-8, 1-11, 2-3,
2-12
analog audio, See audio
architecture, of this EZ-KIT Lite, 2-2
ASYNC (asynchronous memory control)
external memory banks 0-3, 1-8
register, 1-12
audio
circuit signals, 2-16, 2-17
codecs, See AD1854, AD1871
connectors (J9-10), 2-23
enable switch (SW7), 2-12
input configuration switch (SW8), 2-17
interface, xiii, 1-14, 2-4
CAN
connectors (J5 and J11)
enable switch (SW2), 2-9
interface, xi, 1-12
signals, 1-12, 2-5, 2-10
transceiver devices, xi, 1-12
CCLK register, 1-10
clock
frequency, 1-9
in (CLK IN) signals, 2-3
loopback signals, 2-13
out (CLK OUT) signals, 2-3
codecs, See AD1854, AD1871
COL signals, 2-6
configuration, of this EZ-KIT Lite, 1-4
connectors
diagram of locations, 2-22
J1-3 (expansion), 2-3, 2-8, 2-24
J4 (Ethernet), 2-23
J5 and J11 (CAN), 2-23
J6 (RS-232), 2-24
J7 (power), 2-24
J9-10 (audio), 2-23
P10 (TWI), 2-27
P11 (timers), 2-27
P12 (UART1), 2-27
P6 (SPORT0), 1-14, 2-4, 2-25
P7 (SPORT1), 2-26
P8 (PPI), 2-26
P9 (SPI), 2-4, 2-26
ZP4 (JTAG), 2-8, 2-25
B
background telemetry channel (BTC), 1-16
bill of materials, A-1
board schematic (ADSP-BF537), B-1
boot
modes, 2-13
mode select switch (SW16), 2-13
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
I-1
INDEX
contents, of this EZ-KIT Lite package, 1-3
Controller Area Network, See CAN
core voltage, 2-2
CTS signals, 2-11
customer support, xv
DAC1-0 signals, 2-17
data acquisition (DAQ) device, 1-13
DB9 (UART) connector, xiii, 2-7
default configuration, of this EZ-KIT Lite, 1-4
DIP switch (SW5), 1-4, 1-15
DMAR1-0 signals, 2-4
DR0PRI signals, 2-12
Ethernet
cables, 1-3
connector (J4), 2-23
interface, xi, 1-12, 2-6
peripherals, 1-12
select switch (SW3), 2-10
ETXD3-0 signals, 2-6
ETXEN signals, 2-6
example programs, 1-15
expansion interface
connections, 1-11, 1-14, 2-3, 2-4, 2-7, 2-12
connectors (J1-3), 2-7, 2-24
voltage select jumper (JP5), 2-14
external bus interface unit (EBIU), 2-3
external memory, 1-8, 2-3, 2-8
E
F
EBIU_SDBCTL register, 1-10
EBIU_SDGCTL register, 1-10
EBIU_SDRRC register, 1-10, 1-11
EBUI control signals, 2-8
Educational Laboratory Virtual
Instrumentation Suite interface, See ELVIS
ELVIS
interface, xii, 1-13, 2-16
select jumper (JP8), 2-18
signals, 2-5
voltage select jumper (JP6), 2-18
EN (enable control input) signals, 1-12, 2-5,
2-10
ERR signals, 1-12, 2-5, 2-10
ERXCLK signals, 2-7
ERXD3-0 signals, 2-6
ERXDV signals, 2-7
ERXER signals, 2-7
features, of this EZ-KIT Lite, xi
flag pins, See programmable flags (PFs)
flash memory
address range switch (SW6), 1-11
boot mode, 2-13
connections, 1-11, 2-3
enable (SW6) switch, 2-12
frame sync signals, 1-14
frequency, 1-9
FS loopback signals, 2-13
FUNCT_OUT signals, 2-17
D
G
general-purpose IO pins, 1-15, 2-4, 2-9, 2-11,
2-21
GND signals, 2-8
H
Help, online, xx
I-2
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
INDEX
I
IEEE 802.3-2002 standard, 1-13
installation, of this EZ-KIT Lite, 1-4
interfaces, See audio, CAN, ELVIS, Ethernet,
expansion, SDRAM
internal memory
core/system MMRs, 1-9
data banks A, B SRAM, 1-9
data banks A, B SRAM/CACHE, 1-9
instruction banks A, B SRAM, 1-9
instruction SRAM/CACHE, 1-9
reserved, 1-9
scratch pad SRAM, 1-9
via JTAG, 2-8
internal regulator, 2-2
IO voltage, 2-2
license restrictions, x, 1-7
M
MAC address, xi, 1-8, 1-11, 1-12
Media Access Controller, See MAC
Media Instruction Set Computing (MISC), ix
memory
map, of this EZ-KIT Lite, 1-8
select pins, See ~AMS3-0, ~SMS0
Micro Signal Architecture (MSA), ix
MII_CRS signals, 2-7
MII_PHYINT signals, 2-6
MII_TXCLK signals, 2-6
N
notation conventions, xxii
J
JTAG
connector (ZP4), 2-25
emulation port, 2-8
jumpers
diagram of locations, 2-9
JP3 (power), 2-14
JP5 (expansion voltage), 2-14
JP6 (ELVIS voltage), 2-18
JP8 (ELVIS select), 2-18
JP9 (UART), 2-16
L
LabVIEW virtual instruments, xii, 1-13
LEDs
diagram of locations, 2-19
LED1-6 (PF6-11), 1-15, 2-5, 2-21
LED7 (power), 2-20
LED8 (reset), 2-20
ZLED3 (USB monitor), 1-4, 2-21
LEFT_IN signals, 2-17
LEFT_OUT signals, 2-16
O
oscilloscope configuration switch (SW1), 2-16
P
package contents, 1-3
PB1-4 (SW13-10) push buttons, 2-11
PF0 signals, 2-11
PG7-6 signals, 2-11
PH15-0 signals, 2-6
PJ10-6 signals, 2-12
power
connector (J7), 2-24
LED (LED7), 2-20
regulator circuit, 2-14
select jumper (JP3), 2-14
supply, 1-3
Power-over-Ethernet (PoE), 1-13, 2-14
PPF1 signals, 2-11
PPI4_CLK signals, 2-5
PPI connector (P8), 2-26
PPI_D15-0 signals, 2-5
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
I-3
INDEX
PPI_FS3-1 signals, 2-5
programmable flags (PFs)
PF0-1 (UART), 2-4, 2-8
PF12 (audio), 2-5, 2-8
PF13-15 (CAN), 1-12, 2-5, 2-8
PF2-5 (IO), 1-15, 2-4, 2-8, 2-11, 2-20
PF6-11 (IO), 1-15, 2-5, 2-8, 2-21
push buttons
See also switches by name (SWx)
diagram of locations, 2-19
SDRAM
connections, 2-3
default settings, 1-10
interface, 1-9
memory map, 1-8
optimum settings, 1-9, 1-10
serial clock (SCL) signals, 1-9
serial peripheral interface, See SPI
~SMS0 (SDRAM select) pin, 1-8, 2-3
SPI
connector (P9), 2-26
interface, 2-4
R
SPI_MOS1-0 signals, 2-5
real-time clock (RTC), 2-3
SPI_SCK signals, 2-5
Reduced Instruction Set Computing (RISC), ix SPI_SSEL1 signals, 2-5
registration, of this product, 1-3
SPI_SSEL6-4 signals, 2-5
regulators, 2-2
SPI_SS signals, 2-5
reset
SPORT0
audio interface, 2-5
connector (P6), 2-25
LEDs (LED8), 2-20
interface, xiii, 1-14, 2-4, 2-8
processor, 2-8
SPORT1
push button (SW9), 2-19
connector (P7), 2-26
restriction, of the evaluation license, 1-7
interface, 2-8
RFS0 signals, 2-12
SRAM, 1-8
RIGHT_IN signals, 2-17
See also internal memory
RIGHT_OUT signals, 2-16
startup, of this EZ-KIT Lite, 1-4
RJ-45 connectors, 1-13
STB (standby control input) signals, 1-12, 2-5,
RMII_MDINT signals, 2-6
2-10
RMII_REF_CLK signals, 2-6
stereo input/output channels, 1-14
RS-232 connectors (J6), xiii, 2-24
SW10-13 (PF2-5) push buttons, 2-5, 2-20
RTS signals, 2-11
SW16 (boot mode select) switch, 2-13
RXD (receive data output) signals, 1-12, 2-10
SW1 (audio/oscilloscope) switch, 2-16
RX signals, 2-4, 2-11
SW2 (CAN enable) switch, 1-12, 2-9
SW3 (Ethernet) switch, 2-10
SW4 (UART) switch, 2-11
S
schematic, of ADSP-BF537 EZ-KIT Lite, B-1 SW5 (push button enable) DIP switch, 1-15,
2-11, 2-20
SCLK signals, 1-10
SW6 (flash enable) switch, 1-11, 2-12
SW7 (audio enable) switch, 1-14, 2-12
SW8 (audio input) switch, 2-17
I-4
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
INDEX
SW9 (reset) push button, 2-19
switches
See also switches by name (SWx)
diagram of locations, 2-9
synchronous dynamic random access memory,
See SDRAM
system
architecture, of this EZ-KIT Lite, 2-2
clock frequency, 1-9
clock (SCLK) signals, 1-10
T
TACI6 signals, 2-4
TACLK0 signals, 2-5
TACLK7-5 signals, 2-7
Target Options dialog box, 1-9
TFS0 signals, 2-13
timers connector (P11), 2-27
TMR6-0 signals, 2-5
TMRCLK signals, 2-5
TSCLK0 signals, 2-12
TWI connector (P10), 2-27
two-wire interface (TWI), 1-14, 2-27
TXD (transmit data input) signals, 1-12
TX signals, 2-4, 2-11
U
UART
enable switch (SW4), 2-11
interface, 2-7, 2-8
loop jumper (JP9), 2-16
UART0 signals, 2-4, 2-6
UART1
connector (P12), 2-27
signals, 2-4
universal asynchronous receiver transmitter, See
UART
USB
bus power, 2-6, 2-14
cable, 1-3
interface, 2-8, 2-25
monitor LED (ZLED3), 2-21
USB-LAN EZ-Extender, 1-13, 2-14
user LEDs (LED1-6), 2-21
V
very-long instruction word (VLIW), ix
VisualDSP++
documentation, xxi
environment, 1-4
online Help, xx
voltage regulators, 2-2
ADSP-BF537 EZ-KIT Lite Evaluation System Manual
I-5