NL17SH32 Single 2-Input OR Gate The NL17SH32 is an advanced high speed CMOS 2−input OR gate fabricated with silicon gate CMOS technology. The internal circuit is composed of multiple stages, including a buffer output which provides high noise immunity and stable output. The NL17SH32 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This allows the NL17SH32 to be used to interface 5 V circuits to 3 V circuits. http://onsemi.com MARKING DIAGRAM Features • • • • • • High Speed: tPD = 3.7 ns (Typ) at VCC = 5 V Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C SOT−953 CASE 527AE Power Down Protection Provided on Inputs Balanced Propagation Delays F M Pin and Function Compatible with Other Standard Logic Families FM 1 = Specific Device Code = Month Code These are Pb−Free Devices PIN ASSIGNMENT 1 IN A GND 2 IN B 3 VCC 5 1 IN A 2 GND 3 IN B 4 OUT Y 5 VCC FUNCTION TABLE Inputs 4 Figure 1. Pinout (Top View) IN A IN B ≥1 April, 2014 − Rev. 2 A B Y L L H H L H L H L H H H OUT Y ORDERING INFORMATION Figure 2. Logic Symbol © Semiconductor Components Industries, LLC, 2014 Output OUT Y See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. 1 Publication Order Number: NL17SH32/D NL17SH32 MAXIMUM RATINGS Symbol Parameter VCC DC Supply Voltage VIN DC Input Voltage VOUT DC Output Voltage Value Unit −0.5 to +7.0 V −0.5 to +7.0 V −0.5 to VCC +0.5 V IIK DC Input Diode Current −20 mA IOK DC Output Diode Current ±20 mA IOUT DC Output Sink Current ±25 mA ICC DC Supply Current per Supply Pin 50 mA −65 to +150 °C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction Temperature Under Bias +150 °C PD Power Dissipation in Still Air 50 mW TSTG Storage Temperature Range MSL Moisture Sensitivity FR Flammability Rating ILATCHUP Level 1 Oxygen Index: 28 to 34 Latchup Performance UL 94 V−0 @ 0.125 in ±100 Above VCC and Below GND at 125°C (Note 1) mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Min Max Unit VCC DC Supply Voltage 2.0 5.5 V VIN DC Input Voltage 0.0 5.5 V 0.0 VCC V Operating Temperature Range −55 +125 °C 0 0 100 20 ns/V VCC = 3.3 V ± 0.3 V VCC = 5.0 V ± 0.5 V Input Rise and Fall Time Time, Years 80 1,032,200 117.8 90 419,300 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 TJ = 80 ° C Time, Hours TJ = 90 ° C Junction Temperature °C FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 100 ° C Device Junction Temperature versus Time to 0.1% Bond Failures TJ = 130 ° C NORMALIZED FAILURE RATE tr , tf DC Output Voltage TJ = 110° C TA TJ = 120° C VOUT Characteristics 1 1 10 100 TIME, YEARS Figure 3. Failure Rate vs. Time Junction Temperature http://onsemi.com 2 1000 NL17SH32 DC ELECTRICAL CHARACTERISTICS Symbol Parameter Test Conditions Min 1.5 2.1 3.15 3.85 VIH Minimum High−Level Input Voltage 2.0 3.0 4.5 5.5 VIL Maximum Low−Level Input Voltage 2.0 3.0 4.5 5.5 VOH Minimum High−Level Output Voltage VIN = VIH or VIL VOL Maximum Low−Level Output Voltage VIN = VIH or VIL TA v 855C TA = 255C VCC (V) Typ Max Min 1.5 2.1 3.15 3.85 0.5 0.9 1.35 1.65 VIN = VIH or VIL IOH = *50 mA 2.0 3.0 4.5 1.9 2.9 4.4 VIN = VIH or VIL IOH = *4 mA IOH = *8 mA 3.0 4.5 2.58 3.94 VIN = VIH or VIL IOL = 50 mA 2.0 3.0 4.5 VIN = VIH or VIL IOL = 4 mA IOL = 8 mA Max 2.0 3.0 4.5 0.0 0.0 0.0 *555C to 1255C Min Max 1.5 2.1 3.15 3.85 0.5 0.9 1.35 1.65 V 0.5 0.9 1.35 1.65 1.9 2.9 4.4 1.9 2.9 4.4 2.48 3.80 2.34 3.66 Unit V V 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 3.0 4.5 0.36 0.36 0.44 0.44 0.52 0.52 V IIN Maximum Input Leakage Current VIN = 5.5 V or GND 0 to 5.5 $0.1 $1.0 $1.0 mA ICC Maximum Quiescent Supply Current VIN = VCC or GND 5.5 1.0 10 40 mA ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ AC ELECTRICAL CHARACTERISTICS Cload = 50 pF, Input tr = tf = 3.0 ns TA ≤ 85°C TA = 25°C Symbol tPLH, tPHL CIN Parameter Maximum Propagation Delay, Input A or B to Y Min Test Conditions Typ Max Min Max −55 ≤ TA ≤ 125°C Min Max Unit ns VCC = 3.3 ± 0.3 V CL = 15 pF CL = 50 pF 4.8 6.1 7.9 11.4 9.5 13.0 11.5 15.5 VCC = 5.0 ± 0.5 V CL = 15 pF CL = 50 pF 3.7 4.4 5.5 7.5 6.5 8.5 8.0 10.0 5.5 10 10 10 Maximum Input Capacitance pF Typical @ 25°C, VCC = 5.0 V CPD 11 Power Dissipation Capacitance (Note 2) pF 2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. http://onsemi.com 3 NL17SH32 Input A or B 50% 50% VCC GND tPLH tPHL VOH Output Y 50% VCC VOL Figure 4. Switching Waveforms INPUT OUTPUT CL* *Includes all probe and jig capacitance. A 1−MHz square input wave is recommended for propagation delay tests. Figure 5. Test Circuit ORDERING INFORMATION Device NL17SH32P5T5G Package Shipping† SOT−953 (Pb−Free) 8000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 4 NL17SH32 PACKAGE DIMENSIONS SOT−953 CASE 527AE ISSUE E X D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF THE BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. A Y 5 4 PIN ONE INDICATOR HE E 1 2 3 DIM A b C D E e HE L L2 L3 C TOP VIEW SIDE VIEW e L 5X 5X L3 MILLIMETERS MIN NOM MAX 0.34 0.37 0.40 0.10 0.15 0.20 0.07 0.12 0.17 0.95 1.00 1.05 0.75 0.80 0.85 0.35 BSC 0.95 1.00 1.05 0.175 REF 0.05 0.10 0.15 −−− −−− 0.15 SOLDERING FOOTPRINT* 5X 0.35 5X 0.20 5X L2 5X BOTTOM VIEW b PACKAGE OUTLINE 0.08 X Y 1.20 1 0.35 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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