DC1907A - Schematic

5
4
3
PROG-
C40
4.7uF
1206
8
-
3
2
4
3.3V
E5
R1
2
4
6
8
T1
R2 100
9
8
10
7
11
6
14
3
11
12
3.3V 1.2V
300
C26
100pF
R3
150
1
IO_L01P_7/VRN7
IO_L01N_7/VRN7
GND
IO_L21P_7
IO_L21N_7
VCCO_7
VCCAUX
IO_L23P_7
IO_L23N_7
GND
IO_L40P_7
IO_L40N_7/VREF_7
IO_L40P_7/VREF_6
IO_L40N_6
IO_L40P_7
IO_L24N_6/VREF_6
IO
VCCINT
VCCO_6
GND
IO
IO_L01P_6/VRN_6
IO_L01N_6/VRP_6
M1
M0
2
400
+
4
5
6
R19
40K
6
-
1
3.3V 10K
R20
/OUT
3
GND OUT
EG-2101
6
5
4
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
R39
100
R40 50 2.5V
R41 510
1
2
10
11
12
13
14
15
16
17
35
36
37
38
39
40
41
42
1
2
3
4
5
6
3
1A
1Y
GND VCC
2A
2Y
6 CS_B
1k
SCK_L
3.3V
R21 R22 R23 R24
DNS DNS DNS DNS
1
2
3
4
5
6
2.5V 3.3V
4
3
VCC
PRTR5V0U4D
U14
2
OUT GND
OPT
4
3
GCK0
VCC
OE
OUT GND
3.3V
1
6 MISO_L
2
5
SCK_L 3
4
CS
R55
OPT
C49
3.3V
0.1uF
USB_5V
C
1
OE
U10
C57
1uF
GPI0_F
JP5
R25
OPT
3.3V
C47
OPT
MOSI_L
1
2
U12
100MHZ-OSC
LED1
R44 470
PD0/OC0B/INT0
PB0/SS/PCINT0
PD1/AIN0/INT1
U13
PB1/SCK/PCINT1
PD2/AIN1/INT2
PB2/MOSI/PCINT2
PD3/TXD1/INT3
PB3/MISO/PCINT3
PD4/INT5
PB4/T1/PCINT4
PD5/XCK1/PCINT12
PB5/PCINT5
PD6/INT6/#RTS
PB6/PCINT6
PD7/T0/INT7/#HWB/#CTS
PB7/OC0A/OC1C/PCINT7
PC0
PC1
PC2/PCINT11 AT90USB646-AU
PC3
PC4/PCINT10
PC5/PCINT9/OC1B
PC6/PCINT8/OC1A
PC7/INT4/ICP1/CLKO
RF0
RF1
RF2
RF3
RF4
RF5
RF6
RF7
B
ON
RESET
25
26
27
28
29
30
31
32
R46 470
LED2
TX
LED3
R47 470
ER
5V
61
60
59
58
57
56
55
54
R48
10K
1
R49
330
C54
100nF
2
SW2
BOOT
4 SCK_B
U16
74LVC2G07
SDI
1
2
3
1A
1Y
GND VCC
2A
2Y
6 SDI_B
5V
CUSTOMER NOTICE
R56
1. ALL CAPACITORS AND RESISTORS ARE 0603.
4
R57
5
NOTES: UNLESS OTHERWISE SPECIFIED,
R43 130
5
CS_B
XTAL1
XTAL2
33
34
43
9
18
19
1
2
CS
SCK
GCLK4_P
FPGA_TDI
R18
56
C53 0.1uF
SDI_B
U15
74LVC2G07
JP7
GCLK4_N
D
CS
C55 0.1uF
PE0
PE1
PE2
PE3
PE4
PE5
RE6
RE7
GPIO_M
JP9
C42
0.47uF
SCK
3.3V 1.2V
5
4
2
U2
LT1719CS8
20
19
18
17
16
15
14
13
12
11
PROG-
LOGIC
ANALYZER
JP13
GCK1
C52
20pF
VCCJ
VCCO
VCC
TD0
NC
NC
NC
CEONC
GND
3
2
1
R37 130
VCC
VOUT_N
VTH1
OE
-
7
MOSI_L
C56 0.1uF
20
JP8
M_PROG
R35
R32
40K 3.3V 10K
VTH2
1
A
400
4
5
6
R30
RESET
2
4
6
1
2
3
4
5
6
MISO_L
DONE
22 R51
R45
330
1
3
5
1
8
+
3.3V 1.2V
DO
NC
CLK
TDI
TMS
TCK
CFOE/RST
NC
CE-
C43 0.1uF
2
5V
2
400
SDI
GCKL0
24
23
C50
100nF
3.3V
C45
0.1uF
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
CCLK
22 R50
X1
HC-49US
SCK_B
3
2.5V
R34 510
C51
20pF
1
R27
10K
IO_L01N_2/VRP_2
IO_L01P_2/VRN_2
GND
IO_L21N_2
IO_L21P_2
VCCO_2
VCCINT
IO_L24AN_2
IO_L24AP_2
GND
IO_L40N_2
IO_L40P_2/VREF_2
IO_L40N_3/VREF_3
IO_L40P_3
IO_L24N_3
IO_L24P_3
IO
VCCAUX
VCCO_3
GND
IO
IO_L01N_3/VRP_3
IO_L01P_3/VRN_3
CLK
DONE
DONE
F_PROG
JP12
R54
0
DIN
1
R28
R38 50
R42
33k
RESET
SW1
3
2
1
R26
40K
OPTIONAL CIRCUIT
D-
D+
U1
LT1719CS8
JP4
E7
C48
0.1uF
VOUT_P
VTH1 VTH1
U7B
LT1819IMS8
-
400
JP6
R36
0
U11
7
4
5V
1
2
3
4
5V
DD+
GND
1
2
5
6
USB_5V
USB
CON-USB-5V
J4
5V
DATE
CUYLER L. 03-22-12
R13
4.7K U6
XCF02SVOG20C
1
2
CCLK 3
4
5
6
7
8
9
10
DIN
3
GCKL1
3.3V
3
5
VTH2 VTH2
GND
R10
10K
2
8
B
R33 0
C41
0.1uF
4
E1
R15
R17
+
7
IN-
BUFF.
IN-
3.3V
3
E6
2.5V
1
8
1
3
5
7
C44
0.1uF
R29 0
3
R9
40K
3.3V
IN-
2
EPF8119F
C35
100pF
R11
4.7K
FPGA_TDO
U8
XC3S50-5VQG100C
R31 0
JP2
1
11
12
VTH1
2
16
2
4
6
8
J6
RJ45
IN
VTH2
15
R7
150 R8 300
56
56
3.3V
1
3
5
7
R5 DNS
R6 100
APPROVED
7
8
E4
IN+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
2.5V 3.3V
+
GCLK4_P
FPGA_TDI
UCAP
VBUS
U4
LT3021
FPGA_TCK
62
4
GND2
R16
R14
FPGA_TMS
C46
0.1uF
1
IN+
BUFF.
IN+
2.5V 3.3V
AREF
GND
R12
330
3.3V
GCLK4_N
E3
U7A
LT1819IMS8
J5
RJ45
OUT
3.3V 1.2V
2
3
3.3V
C
R4
75
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
6
3RD PROTOTYPE
2.5V
21
52
64
3
C39
4.7uF
1206
D1
BAT46
DESCRIPTION
3
3.3V
C25
1uF
IN
OUT
/SHDN SENSE
REV
__
1
1.2V
8
5
E2
ECO
44
45
46
47
48
49
50
51
C24
2.2uF
2.5V
OUT
VCC
VCC
AVCC
UVCC
1
C23
22uF
1210
IN
UGND
GND
GND
GND
3
1.2V
C27 C29 C33
C28 C30 C32
0.01uF
6
22
53
63
4
2
C13 C15
C12 C14
0.01uF
D+
D-
4
OUT
GND
GND
IN
C31
10uF
1210
2
GND
1
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
2
3
U3
LT1118
3.3V
2
4
1
GND
5V
2.5V
C1 C3 C5 C7 C9 C11
C2 C4 C6 C8 C10
0.01uF
TDI
PROG_B
HSWAP_EN
LO_L01N_0/VRP_0
IO_L01P_0/VRN_0
GND
VCCO_0
VCCINT
IO_L31N_0
IO_L31P_0/VREF_0
IO_L32N_0/GCLK7
IO_L32P_0/GCLKK6
IO_L32N_1/GCLK5
IO_L32P_1/GCLK4
IO_L31N_1/VREF_1
IO_L31P_1
VCCAUX
VCCO_1
GND
IO
IO_L01N_1/VRP_1
IO_L01P_1/VRN
TMS
TCK
TDO
VIN
4.5V - 5.5V
U5
LT1085
3
1
D
EXT
2
3
3
1
3.3V
USB_5V
2
M2
IO_L01P_5/CS_B
IO_L01N_5/RDWR_B
GND
IO_L28P_5/D7
VCCO_5
IO_L28N_5/D6
VCCAUX
IO_L31P_5/D5
IO_L31N_5/D4
IO_L32P_5/GCLK2
IO_L32N_5/GCLK3
IO_L32P_4/GCLK0
IO_L32N_4/GCLK1
IO_L31P_4/DOUT/BUSY
GND
IO_L31N_4/INIT_B
IO_L30P_4/D3
IO_L30P_4/D2
VCCINT
VCCO_4
IO_L27P_4/D1
IO_L27N_4/DIN/D0
IO_L01P_4/VRN_4
IO_L01N_4/VRP_4
1
USB
J1
KLDHCX-0202X
2
REVISION HISTORY
JP1
1k
5V
R58 1k
APPROVALS
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APP ENG.
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
TECHNOLOGY
AK
CUYLER L. TITLE:
4
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
3
2
N/A
SCALE = NONE
SCHEMATIC
isoSPI SERIAL ANALYZER
SIZE
5
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
DATE:
IC NO.
SUPPORT BOARD FOR isoSPI
DEMO CIRCUIT 1907A
Wednesday, March 28, 2012
SHEET 1
1
REV.
3
OF 1
A
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