INTEGRATED CIRCUITS DATA SHEET SAA5244A Integrated VIP and teletext decoder (IVT1.1) Product specification File under Integrated Circuits, IC02 March 1992 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A FEATURES • Complete teletext decoder including page memory in a single 40-pin DIL package • Single +5 V power supply • Digital data slicer and display clock phase-locked loop reduces peripheral components to a minimum • Both video and scan related synchronization modes are supported DESCRIPTION The Integrated VIP and Teletext (IVT1.1) is a teletext decoder (contained within a single-chip package) for decoding 625-line based World System Teletext transmissions. The teletext decoder hardware is based on a reduced function version of the device SAA5246 (IVT1.0). The Video Input Processor (VIP) section of the device uses mixed analog and digital designs for the data slicer and the display clock phase-locked loop functions. As a result the number of external components is greatly reduced and no critical or adjustable components are required. A single page static RAM is incorporated in the device thereby giving a genuine single-chip teletext decoder device. • On board single page memory including extension packets for FASTEXT • Single page acquisition system • RGB interface to standard colour decoder ICs, push-pull output drive • Data capture performance similar to SAA5231 (VIP2) • Simple software control via I2C-bus • Option for five national languages • 32 supplementary characters for on-screen displays • Optional storage of packet 24 in the display memory • Page links in packets 27 and 8/30 are Hamming decoded • Separate text and video signal quality detectors, 625/525 video status and language version all readable via I2C-bus • Automatic ODD/EVEN output control with manual override • Control of display PLL free-run and rolling header via I2C-bus • VCS to SCS mode for stable 525 line status display ORDERING INFORMATION PACKAGE EXTENDED TYPE NUMBER PINS PIN POSITION MATERIAL CODE SAA5244AP 40 DIL plastic SOT129(1) SAA5244AGP 44 QFP plastic SOT205A(2) Notes 1. SOT129-1; 1996 December 16. 2. SOT205-1; 1996 December 16. March 1992 2 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT VDD positive supply voltage 4.5 5 5.5 V IDD supply current − 74 148 mA Vsyn sync amplitude 0.1 0.3 0.6 V Vvid video amplitude 0.7 1 1.4 V fXTAL crystal frequency − 27 − MHz Tamb operating ambient temperature range −20 − 70 °C March 1992 3 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) Y handbook, full pagewidth BLAN 23 19 SAA5244A COR RGBREF RGB ODD / EVEN 21 18 15-17 22 DISPLAY PAGE MEMORY DATA SLICER AND CLOCK REGENERATOR TELETEXT ACQUISITION AND DECODING 25 2 I C-BUS INTERFACE 24 SDA SCL DCVBS V SS REF OSCOUT OSCIN 5 SAA5244A ANALOG TO DIGITAL CONVERTER TIMING CHAIN CRYSTAL OSCILLATOR INPUT CLAMP AND SYNC SEPARATOR VDD 10 VDD 14 20 VSS 6 2 3 4 OSCGND 7 9 8 DISPLAY CLOCK PHASE LOCKED LOOP 11 13 12 BLACK IREF CVBS POL VCR / FFB STTV / LFB Fig.1 Block diagram for SOT129 (DIL40) package. March 1992 1 4 MLA228 - 1 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A PINNING SYMBOL SOT129 SOT205A DESCRIPTION VDD 1 18 +5 V supply OSCOUT 2 19 27 MHz crystal oscillator output OSCIN 3 20 27 MHz crystal oscillator input OSCGND 4 21 0 V crystal oscillator ground VSS 5 22 0 V ground REF− − − negative reference voltage for the ADC. The pin should be connected to 0 V REF+ 6 23 positive reference voltage for the ADC. The pin should be connected to +5 V BLACK 7 24 video black level storage pin, connected to ground via a 100 nF capacitor CVBS 8 25 composite video input pin. A positive-going 1 V (peak-to-peak) input is required, connected via a 100 nF capacitor IREF 9 26 reference current input pin, connected to ground via a 27 kΩ resistor VDD 10 27 +5 V supply POL 11 28 STTV/LFB/FFB polarity selection pin STTV/LFB 12 29 sync to TV output pin/line flyback input pin. Function controlled by an internal register bit (scan sync mode) VCR/FFB 13 32 PLL time constant switch/field flyback input pin. Function controlled by an internal register bit (scan sync mode) VSS 14 33 0 V ground R 15 34 dot rate character output of the RED colour information G 16 35 dot rate character output of the GREEN colour information B 17 36 dot rate character output of the BLUE colour information RGBREF 18 37 input DC voltage to define the output high level on the RGB pins BLAN 19 38 dot rate fast blanking output VSS 20 39 0 V ground COR 21 40 programmable output to provide contrast reduction of the TV picture for mixed text and picture displays or when viewing newsflash/subtitle pages; open drain output ODD/EVEN 22 41 25 Hz output synchronized with the CVBS input’s field sync pulses to produce a non-interlaced display by adjustment of the vertical deflection currents Y 23 42 dot rate character output of teletext foreground colour information open drain output SCL 24 43 serial clock input for the I2C-bus. It can still be driven during power-down of the device SDA 25 44 serial data port for the I2C-bus; open drain output. It can still be driven during power-down of the device n.c. − 4 to 7 30, 31 not connected i.c. 26 to 40 1 to 3 8 to 17 March 1992 internally connected. Must be left open-circuit in application 5 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A handbook, halfpage VDD 1 40 OSCOUT 2 39 OSCIN 3 38 OSCGND 4 37 VSS 5 36 REF 6 35 BLACK 7 34 CVBS 8 33 IREF 9 32 VDD 10 i.c. 31 SAA5244A POL 11 30 STTV / LFB 12 29 VCR / FFB 13 28 VSS 14 27 R 15 26 G 16 25 SDA B 17 24 SCL RGBREF 18 23 Y BLAN 19 22 ODD / EVEN VSS 20 21 COR MLA035 - 3 Fig.2 Pin configuration; SOT129 (DIL40). March 1992 6 Philips Semiconductors Product specification i.c. n.c. 34 R 35 G 36 B 37 RGBREF 38 BLAN 39 V SS SAA5244A 40 COR 41 ODD / EVEN 42 Y index corner 44 handbook, full pagewidth 43 SCL SDA Integrated VIP and teletext decoder (IVT1.1) 1 33 VSS 2 32 VCR / FFB 3 31 n.c. 4 30 n.c. 5 29 STTV / LFB 6 28 POL SAA5244A 7 27 VDD 8 26 IREF 9 25 CVBS 10 24 BLACK 11 23 REF V SS 22 OSCIN 20 OSCGND 21 OSCOUT 19 V DD 18 17 16 15 14 i.c. 13 12 i.c. Fig.3 Pin configuration; SOT205A (QFPL44). March 1992 7 MLA227 - 2 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER MIN. MAX. UNIT VDD supply voltage (all supplies) −0.3 6.5 V VI input voltage (any input) −0.3 VDD+0.5 V VO output voltage (any output) −0.3 VDD+0.5 V IO output current (each output) − ±10 mA IIOK DC input or output diode current − ±20 mA Tamb operating ambient temperature range −20 70 °C Tstg storage temperature range −55 125 °C Vstat electrostatic handling human body model (note 1) −2000 2000 V Note 1. The human body model ESD simulation is equivalent to discharging a 100 pF capacitor through a 1.5 kΩ resistor; this produces a single discharge transient. Reference Philips Semiconductors test method UZW-B0/FQ-A302 (compatible with MIL-STD method 3015.7). Failure Rate The failure rate at Tamb = 55 °C will be a maximum of 1000 FITS (1 FIT = 1 x 10−9 failures per hour). March 1992 8 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A CHARACTERISTICS VDD = 5 V ± 10%; Tamb = −20 to +70 °C, unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VDD supply voltage range (VDD−VSS) 4.5 5 5.5 V IDD total supply current − 74 148 mA Vsyn sync amplitude 0.1 0.3 0.6 V tsyn delay from CVBS to TCS output from STTV buffer (nominal video, average of leading/trailing edge) −150 0 150 ns tsyd change in sync delay between all black and all white video input at nominal levels 0 − 25 ns Vvid(p-p) video input amplitude (peak-to-peak) 0.7 1 1.4 V display PLL catching range ±7 − − % Zsrc source impedance − − 250 Ω CI input capacitance − − 10 pF resistor to ground − 27 − kΩ VIL input voltage LOW −0.3 − 0.8 V VIH input voltage HIGH 2.0 − VDD+0.5 V ILI input leakage current −10 − 10 µA CI input capacitance − − 10 pF VIL input voltage LOW −0.3 − 0.8 V VIH input voltage HIGH 2.0 − VDD+0.5 V ILI input leakage current VI = 0 to VDD −10 − 10 µA II input current note 1 −1 − 1 mA tLFB delay between LFB front edge and input video line sync − 250 − ns VIL input voltage LOW −0.3 − 0.8 V VIH input voltage HIGH 2.0 − VDD+.5 V ILI input leakage current VI = 0 to VDD −10 − 10 µA II input current note 1 −1 − 1 mA Inputs CVBS IREF Rg POL VI = 0 to VDD LFB VCR/FFB March 1992 9 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SYMBOL PARAMETER SAA5244A CONDITIONS MIN. TYP. MAX. UNIT Inputs RGBREF (NOTE 2) −0.3 − VDD+0.5 V −10 − 10 µA DC current − − 10 mA VI input voltage ILI input leakage current IDC VI = 0 to VDD SCL VIL input voltage LOW −0.3 − 1.5 V VIH input voltage HIGH 3.0 − VDD+0.5 V ILI input leakage current VI = 0 to VDD −10 − 10 µA fSCL clock frequency 0 − 100 kHz tr input rise time 10% to 90% − − 2 µs tf input fall time 90% to 10% − − 2 µs CI input capacitance − − 10 pF Inputs/outputs CRYSTAL OSCILLATOR (OSCIN; OSCOUT) fXTAL crystal frequency − 27 − MHz Gv small signal voltage gain 3.5 − − − Gm mutual conductance 1.5 − − mA/V Cl input capacitance − − 10 pF CFB feedback capacitance − − 5 pF − 100 − nF −10 − 10 µA f = 100 kHz BLACK Cblk storage capacitor to ground ILI input leakage current VI = 0 to VDD SDA VIL input voltage LOW −0.3 − 1.5 V VIH input voltage HIGH 3.0 − VDD+0.5 V −10 − 10 µA − − 10 pF ILI input leakage current Cl input capacitance tr input rise time 10% to 90% − − 2 µs tf input fall time 90% to 10% − − 2 µs VOL output voltage LOW IOL = 3 mA 0 − 0.5 V tf output fall time 3 to 1 V − − 200 ns CL load capacitance − − 400 pF March 1992 VI = 0 to VDD 10 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SYMBOL PARAMETER SAA5244A CONDITIONS MIN. TYP. MAX. UNIT Outputs STTV Gstt gain of STTV relative to video input 0.9 1.0 1.1 Vtcs TCS amplitude 0.2 0.3 0.45 V VDCs DC shift between TCS output and nominal video output − − 0.15 V IO output drive current − − 3.0 mA CL load capacitance − − 100 pF R, G AND B VOL output voltage LOW IOL = 2 mA 0 − 0.2 V VOH output voltage HIGH IOH = −1.6 mA; RGBREF ≤ VDD−2 V RGBREF −0.25 V RGBREF RGBREF +0.25 V V Zo output impedance − − 200 Ω CL load capacitance − − 50 pF IDC DC current − − −3.3 mA tr output rise time 10% to 90% − − 20 ns tf output fall time 90% to 10% − − 20 ns VOL output voltage LOW IOL = 1.6 mA 0 − 0.4 V VOH output voltage HIGH IOH = −0.2 mA; VDD = 4.5 V 1.1 − − V VOH output voltage HIGH IOH = 0 mA; VDD = 5.5 V − − 2.8 V VOH allowed voltage at pin with external pull-up − − VDD V CL load capacitance − − 50 pF tr output rise time 10% to 90% − − 20 ns tf output fall time 90% to 10% − − 20 ns VOL output voltage LOW IOL = 1.6 mA 0 − 0.4 V VOH output voltage HIGH IOH = −1.6 mA VDD−0.4 − VDD V BLAN ODD/EVEN CL load capacitance − − 120 pF tr output rise time 0.6 to 2.2 V − − 50 ns tf output fall time 2.2 to 0.6 V − − 50 ns March 1992 11 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SYMBOL PARAMETER SAA5244A CONDITIONS MIN. TYP. MAX. UNIT Outputs COR AND Y (OPEN DRAIN) VOH pull-up voltage at pin VOL output voltage LOW IOL = 5 mA − − VDD V 0 − 1.0 V CL load capacitance − − 25 pF tf output fall time load resistor of 1.2 kΩ to VDD; measured between VDD −0.5 and 1.5 V − − 50 ns ILO output leakage current VI = 0 to VDD −10 − 10 µA TSK skew delay between display outputs R, G, B, COR, Y and BLAN − − 20 ns tLOW clock LOW period 4 − − µs tHIGH clock HIGH period 4 − − µs Timing I2C-BUS tSU;DAT data set-up time 250 − − ns tHD;DAT data hold time 170 − − ns tSU;STO set-up time from clock HIGH to STOP 4 − − µs tBUF START set-up time following a STOP 4 − − µs tHD;STA START hold time 4 − − µs tSU;STA START set-up time following clock LOW-to-HIGH transition 4 − − µs Notes to the characteristics 1. This current is the maximum allowed into the inputs when line and field flyback signals are connected to these inputs. Series current limiting resistors must be used to limit the input currents to ± 1 mA. 2. RGBREF is the positive supply for the RGB output pins and it must be able to source the IOH current from the R, G and B pins. The leakage specification on RGBREF only applies when there is no current load on the RGB pins. March 1992 12 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... LSP (Line Sync Pulse) 0 2.33 32 64 µs 34.33 EP (Equalizing Pulse) 0 27.33 32 59.33 64 µs BP (Broad Pulse) [1] 13 621 (308) 622 (309) 623 (310) 624 (311) 625 (312) 309 310 311 312 313 308 309 310 311 312 1 2 3 315 (2) 316 (3) 4 5 6 Philips Semiconductors 64 µs 4.66 Integrated VIP and teletext decoder (IVT1.1) March 1992 0 7 TCS interlaced 314 (1) 317 (4) 318 (5) 319 (6) 320 (7) TCS interlaced 1 2 3 4 5 6 7 TCS non-interlaced MLA037 - 2 Fig.4 Composite sync waveforms. Product specification LSP, EP and BP are combined to give TCS as shown below. All timings measured from falling edge of LSP. Line numbers placed in the middle of the line. Equivalent count numbers in brackets. SAA5244A [1] [2] handbook, full pagewidth [2] Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A handbook, full pagewidth LSP (TCS) 0 64 µs 4.66 40 µs R, G, B, Y (1) display period 0 16.67 (a) LINE RATE 56.67 µs lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced) R, G, B, Y (1) display period (b) FIELD RATE 41 0 312 291 line numbers MLA662 - 1 (1) also BLAN in character and box blanking Fig.5 Display output timing (a) line rate (b) field rate. handbook, full pagewidth SDA t LOW t BUF tf SCL t HD;STA tr t HD;DAT t HIGH t SU;DAT SDA MBC764 t SU;STA Fig.6 I2C-bus timing. March 1992 14 t SU;STO This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 621 (308) 622 (309) 623 (310) 624 (311) 625 (312) 1 2 3 4 5 6 7 TCS interlaced ODD/EVEN output (normal sync mode) 2 µs ODD/EVEN output (normal sync mode when VCS to SCS mode active) 48 µs ODD/EVEN output (slave sync mode) 31 µs Philips Semiconductors Integrated VIP and teletext decoder (IVT1.1) March 1992 FIRST FIELD START (EVEN) 15 SECOND FIELD START (ODD) 309 310 311 312 313 314 (1) 315 (2) 316 (3) 317 (4) 318 (5) 319 (6) 320 (7) TCS interlaced ODD/EVEN output (normal sync mode) ODD/EVEN output (normal sync mode when VCS to SCS mode active) 16 µs MBA073 - 4 Line numbers placed in the middle of the line. Equivalent count numbers in brackets. Fig.7 ODD/EVEN timing. Product specification 31 µs SAA5244A ODD/EVEN output (slave sync mode) 2 µs Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A APPLICATION INFORMATION handbook, full pagewidth V DD 1 40 39 OSCOUT C4 1 nF L1 4.7 µH C3 C2 15 p 10 p OSCIN OSCGND VSS VDD VSS C7 100 nF BLACK 35 33 7 32 8 IREF 34 6 100 nF R17 27 kΩ 36 4 REF+ CVBS VSS 3 5 100 nF VSS C8 100 nF 38 37 100 nF R1 3.3 kΩ X1 27 MHz, 3rd Overtone 2 C1 9 SAA5244A i.c. 31 30 10 V DD POL V DDD LK2 11 STTV / LFB 12 28 VCR / FFB 13 27 14 25 LK1 VSS (1) R 15 G 16 B 17 R9 R10 (1) VSS 29 RGBREF 18 (1) 25 SDA 24 SCL 23 BLAN 19 22 VSS 20 21 Y ODD / EVEN COR 2.7 k Ω 2.7 kΩ MLA054 - 5 VDD (1) Value dependent on application. Fig.8 Application diagram. March 1992 16 VDD Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A SAA5244A page memory organization The organization of the page memory is shown in Fig.9. The device provides an additional row as compared with first generation decoders; this brings the display format up to 40 characters by 25 rows. Rows 0 to 23 form the teletext page; row 24 is available for software generated status messages and FLOF/FASTEXT prompt information. 7 characters for status 7 fixed character written by IVT hardware alphanumerics white for normal alphanumerics green when looking for display page 8 characters always rolling (time) 24 8 1 24 characters from page header rolling when display page looked for MAIN PAGE DISPLAY AREA 14 bytes free for use by microcontroller 0 1 2 3 4 5 to 20 21 22 23 24 25 PACKET X / 22 PACKET X / 23 PACKET X / 24 STORED HERE IF R0D7 = 1 10 14 10 bytes for received page information ROW MBA274 Fig.9 Basic page memory organization. Row 0: Row 0 is for the page header. The first seven columns (0 to 6) are free for status messages. The eighth is an alphanumeric white or green control character, written automatically by SAA5244A to give a green rolling header when a page is being looked for. The last eight characters are for rolling time. ROW Row 25: PACKET X / 24 if R0D7 = 0 0 PACKET X / 27 / 0 1 PACKETS 8 / 30 / 0 to 15 2 MBA275 - 2 The first 10 bytes of row 25 contain control data relating to the received page as shown in Table 1. The remaining 14 bytes are free for use by the microcomputer. Fig.10 Organization of the extension memory. March 1992 17 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) Table 1 SAA5244A Row 25 received control data format D0 PU0 PT0 MU0 MT0 HU0 HT0 C7 C11 MAG0 0 D1 PU1 PT1 MU1 MT1 HU1 HT1 C8 C12 MAG1 0 D2 PU2 PT2 MU2 MT2 HU2 C5 C9 C13 MAG2 0 D3 PU3 PT3 MU3 C4 HU3 C6 C10 C14 0 0 D4 HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER FOUND 0 D5 0 0 0 0 0 0 0 0 0 PBLF D6 0 0 0 0 0 0 0 0 0 0 D7 0 0 0 0 0 0 0 0 0 0 Column 0 1 2 3 4 5 6 7 8 9 Where: Page number MAG magazine PU page units PT page tens PBLF page being looked for FOUND LOW for page has been found HAM.ER Hamming error in corresponding byte Page sub-code MU minutes units MT minutes tens HU hours units HT hours tens C4-C14 transmitted control bits. March 1992 18 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A Register maps SAA5244A mode registers R0 to R11 are shown in Table 2. R0 to R10 are WRITE only; R11 is READ/WRITE. Register map (R3), for page requests, is shown in detail in Table 3. Table 2 Register map REGISTER D7 D6 D5 D4 D3 D2 D1 D0 Adv. control 0 X24 POS FREE RUN PLL AUTO ODD/ EVEN DISABLE HDR ROLL − DISABLE ODD/ EVEN − R11/R11B SELECT Mode 1 VCS TO SCS − ACQ ON/OFF − DEW/ FULL FIELD TCS ON T1 T0 Page request address 2 − − − − TB START START START COLUMN COLUMN COLUMN SC2 SC1 SC0 Page request data 3 − − − PRD4 PRD3 PRD2 PRD1 PRD0 − − − − − − − − Display control (normal) 5 BKGND OUT BKGND IN COR OUT COR IN TEXT OUT TEXT IN PON OUT PON IN Display control (newsflash /subtitle) 6 BKGND OUT BKGND IN COR OUT COR IN TEXT OUT TEXT IN PON OUT PON IN Display mode 7 STATUS TOP CURSOR REVEAL ON ON BOTTOM DOUBLE HALF HEIGHT BOX 24 BOX 1-23 BOX 0 − − − − − − − − Cursor row 9 SUPPL. BLAST CLEAR MEM. A0 R4 R3 R2 R1 R0 Cursor column 10 SUPPL. ROW 24 SUPPL. ROW 0 C5 C4 C3 C2 C1 C0 Cursor data 11 − D6 D5 D4 D3 D2 D1 D0 Device status 11B 625/525 SYNC ROM VER R4 ROM VER R3 ROM VER R2 ROM VER R1 ROM VER R0 TEXT VCS SIGNAL SIGNAL QUALITY QUALITY Notes to Table 2 1. ‘− ‘ indicates these bits are inactive and must be written to logic 0 for future compatibility. 2. All bits in registers R0 to R10 are cleared to logic 0 on power-up except bits D0 to D1 of registers R1, R5 and R6 which are set to logic 1. 3. All memory is cleared to ‘space’ (00100000) on power-up, except row 0 column 7 chapter 0, which is ‘alpha’ white (00000111) as the acquisition circuit is enabled but the page is on hold. 4. TB must be set to logic 0 for normal operation. 5. The I2C slave address is 0010001 March 1992 19 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A REGISTER DESCRIPTION R0 ADVANCED CONTROL - auto increments to Register 1 R11/R11B SELECT Selects reading of R11 or R11B DISABLE ODD/EVEN Forces ODD/EVEN output LOW when logic 1 DISABLE HDR ROLL Disables green rolling header and time AUTO ODD/EVEN When set forces ODD/EVEN low if any TV picture displayed, if DISABLE ODD/EVEN = 0 FREE RUN PLL Will force the PLL to free run in all conditions X24 POS Automatic display of FASTEXT prompt row when logic 1 R1 MODE - auto increments to Register 2 T0, T1 Interlace/non-interlace 312/313 line control (see Table 4) TCS ON Text composite sync or direct sync select DEW/FULL FIELD Field-flyback or full channel mode ACQ ON/OFF Acquisition circuits turned off when logic 1 VCS TO SCS When logic 1 enables display of messages with 60 Hz input signal R2 PAGE REQUEST ADDRESS - auto increments to Register 3 COL SC0 - SC2 Point to start column for page request data (see Table 3) TB Must be logic 0 for normal operation R3 PAGE REQUEST DATA - does not auto increment (see Table 3) R5 NORMAL DISPLAY CONTROL - auto increments to Register 6 R6 NEWSFLASH/SUBTITLE DISPLAY CONTROL - auto increments to Register 7 PON Picture on TEXT Text on COR Contrast reduction on BKGND Background colour on These functions have IN and OUT referring to inside and outside the boxing function respectively. R7 DISPLAY MODE - does not auto increment BOX ON 0 Boxing function allowed on Row 0 BOX ON 1-23 Boxing function allowed on Row 1-23 BOX ON 24 Boxing function allowed on Row 24 DOUBLE HEIGHT To display double height text BOTTOM HALF To select bottom half of page when DOUBLE HEIGHT = 1 REVEAL ON To reveal concealed text CURSOR ON To display cursor STATUS TOP Row 25 displayed above or below the main text March 1992 20 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A R9 CURSOR ROW - auto increments to Register 10 R0 to R4 Active row for data written to or read from memory via the I2C-bus A0 Selects display memory page (when = 0) or extension packet memory (when = 1) CLEAR MEM. When set to 1, clears the display memory. This bit is automatically reset SUPPL. BLAST When set to 1, column 4b and 5b (of Table 6) are mapped into 4 and 5 respectively, replacing blast-through alphanumerics in graphics mode R10 CURSOR COLUMN - auto increments to Register 11 or 11B C0 to C5 Active column for data written to or read from memory via the I2C-bus SUPPL. ROW 0 When set to 1, column 4b and 5b (of Table 6) are mapped into columns 6 and 7 respectively, just for row 0 columns 0 to 7 SUPPL. ROW 24 When set to 1, column 4b and 5b (of Table 6) are mapped into columns 6 and 7 respectively just for row 24 R11 CURSOR DATA - does not auto increment D0 to D6 Data read from/written to memory via I2C, at location pointed to by R9 and R10. This location automatically increments each time R11 is accessed R11B DEVICE STATUS - does not auto increment VCS SIGNAL QUALITY Indicates that the video signal quality is good and PLL is phase locked to input video when = 1 TEXT SIGNAL QUALITY If a good teletext signal is being received when = 1 ROM VER R0 to R4 Indicated language/ROM variant. For Western European = 01000 625/525 SYNC If the input video is a 525 line signal when = 1 March 1992 21 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) Table 3 SAA5244A Register map for page requests (R3) START COLUMN 0 PRD4 PRD3 PRD2 PRD1 PRD0 Do care Magazine 1 HOLD MAG2 MAG1 MAG0 PT3 PT2 PT1 PT0 PU3 PU2 PU1 PU0 X X HT1 HT0 HU3 HU2 HU1 HU0 X MT2 MT1 MT0 MU3 MU2 MU1 MU0 Do care Page tens 2 Do care Page units 3 Do care Hours tens 4 Do care Hours units 5 Do care Minutes tens 6 Do care Minutes units Notes to Table 3 1. Abbreviations are as for Table 1 except for DO CARE bits. 2. When the DO CARE bit is set to logic 1 this means the corresponding digit is to be taken into account for page requests. If the DO CARE bit is set to logic 0 the digit is ignored. This allows, for example, ‘normal’ or ‘timed page’ selection. 3. If HOLD is set LOW, the page is held and not updated. 4. Columns auto-increment on successive I2C-bus transmission bytes. Table 4 Interlace/non-interlace 312/313 line control (T0 and T1) T1 T0 RESULT 0 0 interlaced 312.5/312.5 lines 0 1 non-interlaced 312/313 lines (note 1) 1 0 non-interlaced 312/312 lines (note 1) 1 1 scan-locked Note to Table 4 1. Reverts to interlaced mode if a newsflash or subtitle is being displayed. March 1992 22 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) Table 5 SAA5244A Crystal characteristics SYMBOL PARAMETER MIN. TYP. MAX. UNIT Crystal (27 MHz, 3rd overtone) C1 series capacitance − 1.7 − pF C0 parallel capacitance − 5.2 − pF CL load capacitance − 20 − pF Rr resonant resistance − − 50 Ω R1 series resistance − 20 − Ω Xa ageing − − ±5 10−6/yr Xj adjustment tolerance − − ±25 10−6 Xd drift − − ±25 10−6 handbook, full pagewidth 1 SAA5244A 2 1 nF 3.3 kΩ 4.7 µH 15 p 10 p 100 nF CRYSTAL OSCILLATOR 3 27 MHz 4 MLA036 - 5 Fig.11 Crystal oscillator application diagram. CLOCK SYSTEMS Crystal oscillator The crystal is a conventional 2-pin design operating at 27 MHz. It is capable of oscillating with both fundamental and third overtone mode crystals. External components should be used to suppress the fundamental output of the third overtone, as shown in Fig.11. The crystal characteristics are given in Table 5. March 1992 23 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A national option characters as indicated in Table 8 with reference to their table position in the basic character matrix illustrated in Table 7. The SAA5244A automatically decodes transmission bits C12 to C14. Table 6 illustrates the character matrices. Character sets The WST specification allows the selection of national character sets via the page header transmission bits, C12 to C14. The basic 96 character sets differ only in 13 MLA663 handbook, full pagewidth alphanumerics and graphics 'space' character 0000010 alphanumerics character 1011010 alphanumerics or blast-through alphanumerics character 0001001 alphanumerics character 1111111 contiguous graphics character 0110111 separated graphics character 0110111 separated graphics character 1111111 contiguous graphics character 1111111 = background colour Fig.12 Character format. March 1992 24 display = colour Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244P/A character data input decoding b7 B I T S 0 0 b6 0 b5 0 0 1 0 b4 b3 b2 b1 column r o w 0 1 0 1 graphics black 0 0 0 0 0 alpha numerics black 0 0 0 1 1 alpha numerics red graphics red 0 0 1 0 2 alpha numerics green graphics green 0 0 1 1 3 alpha numerics yellow graphics yellow 0 1 0 0 4 alpha numerics blue graphics blue 0 1 0 1 5 alpha numerics magenta graphics magenta 0 1 1 0 6 alpha numerics cyan graphics cyan 0 1 1 1 7 alpha numerics white graphics white 1 0 0 0 8 flash conceal display 1 0 0 1 9 steady contiguous graphics 1 0 1 0 10 end box separated graphics 1 0 1 1 11 start box ESC 1 1 0 0 12 normal hight black back ground 1 1 0 1 13 double height new back ground 1 1 1 0 14 SO hold graphics 1 1 1 1 15 SI release graphics 0 0 0 2 0 1 1 2a 1 3 1 1 1 0 1 3a 0 4 1 4b 1 1 5 1 1 0 5b 0 6 6a book, full pagewidth Table 6 SAA5244A 1 7 AVAILABLE AS NATIONAL OPTIONS ONLY 7a MBA266 - 1 Notes to Table 6 - For character version number (01000) see Register 11B 1. * These control characters are reserved for compatibility with other data codes. 2. ** These control characters are presumed before each row begins. 3. + Columns 4b and 5b can only be accessed when supplementary character bits are set (see Registers 9 and 10). 4. Control characters shown in columns 0 and 1 are normally displayed as spaces. 5. Characters may be referred to by column and row, For example 2/5 refers to %. March 1992 25 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A 6. Black represents displayed colour. White represents background. 7. Character rectangle shown as follows: 8. The SAA5244A national option characters are illustrated in Table 8. 9. Characters 4b/11, 4b/12, 5b/10, 5b/11 and 5b/12 are special characters for combining with character 4b/10. 10. National option characters will be developed according to the setting of control bits C12 to C14. These will be mapped into the basic code table into positions shown in Table 8. 11. Columns 4b and 5b are mapped into 4 and 5 respectively (replacing blast-through alphanumerics in the graphics mode) when enabled by R9 bit D7 set to 1. 12. Columns 4b and 5b are mapped into columns 6 and 7 respectively when enabled by R10 bit D6 (row 0 columns 0 to 7) and R10 bit D7 (row 24) set to 1. 13. Columns 2a, 3a, 6a and 7a are displayed in graphics mode. March 1992 26 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 3/8 4/0 4/8 5/0 5/8 6/0 NC 6/8 7/0 7/8 NC 2/1 2/9 3/1 3/9 4/1 4/9 5/1 5/9 6/1 6/9 7/1 7/9 2/2 2/10 3/2 3/10 4/2 4/10 5/2 5/10 6/2 6/10 7/2 7/10 2/3 2/11 3/3 3/11 4/3 4/11 5/3 5/11 6/3 6/11 7/3 7/11 NC NC NC Philips Semiconductors 3/0 SAA5244A Basic character matrix 2/8 Integrated VIP and teletext decoder (IVT1.1) Table 7 March 1992 2/0 27 2/4 2/12 3/4 3/12 4/4 4/12 5/4 NC 2/5 5/12 6/4 6/12 7/4 NC 2/13 3/5 3/13 4/5 4/13 5/5 5/13 NC 6/5 6/13 7/5 NC 2/6 2/14 3/6 3/14 4/6 4/14 5/6 5/14 2/15 3/7 3/15 4/7 4/15 5/7 5/15 7/13 NC 6/6 7/6 NC 2/7 7/12 7/14 NC 6/7 6/15 7/7 7/15 handbook, full pagewidth Product specification Where: NC = national option character position. MLA630 SAA5244A NC Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) Table 8 SAA5244A SAA5244A national option character set ndbook, full pagewidth PHCB (1) CHARACTER POSITION (COLUMN / ROW) LANGUAGE C12 C13 C14 2 / 3 ENGLISH 0 0 0 GERMAN 0 0 1 SWEDISH 0 1 0 ITALIAN 0 1 1 FRENCH 1 0 0 2/4 4/0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6/0 7 / 11 7 / 12 7 / 13 7 / 14 MLA664 (1) PHCB are the Page Header Control Bits. Other combinations default to English. March 1992 28 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A PACKAGE OUTLINES seating plane DIP40: plastic dual in-line package; 40 leads (600 mil) SOT129-1 ME D A2 L A A1 c e Z w M b1 (e 1) b MH 21 40 pin 1 index E 1 20 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c mm 4.7 0.51 4.0 1.70 1.14 0.53 0.38 0.36 0.23 52.50 51.50 inches 0.19 0.020 0.16 0.067 0.045 0.021 0.015 0.014 0.009 2.067 2.028 D (1) e e1 L ME MH w Z (1) max. 14.1 13.7 2.54 15.24 3.60 3.05 15.80 15.24 17.42 15.90 0.254 2.25 0.56 0.54 0.10 0.60 0.14 0.12 0.62 0.60 0.69 0.63 0.01 0.089 E (1) Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT129-1 051G08 MO-015AJ March 1992 EIAJ EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-01-14 29 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A QFP44: plastic quad flat package; 44 leads (lead length 2.35 mm); body 14 x 14 x 2.2 mm SOT205-1 c y X 33 A 23 34 22 ZE e E HE A A2 (A 3) A1 wM θ bp Lp pin 1 index 44 L 12 detail X 1 11 ZD e v M A wM bp D B HD v M B 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp v w y mm 2.60 0.25 0.05 2.3 2.1 0.25 0.50 0.35 0.25 0.14 14.1 13.9 14.1 13.9 1 19.2 18.2 19.2 18.2 2.35 2.0 1.2 0.3 0.15 0.1 Z D (1) Z E (1) 2.4 1.8 2.4 1.8 θ o 7 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC SOT205-1 133E01A March 1992 JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 95-02-04 97-08-01 30 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary from 50 to 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheat for 45 minutes at 45 °C. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). WAVE SOLDERING Wave soldering is not recommended for QFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. DIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. If wave soldering cannot be avoided, the following conditions must be observed: The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. • The footprint must be at an angle of 45° to the board direction and must incorporate solder thieves downstream and at the side corners. • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. Even with these conditions, do not consider wave soldering the following packages: QFP52 (SOT379-1), QFP100 (SOT317-1), QFP100 (SOT317-2), QFP100 (SOT382-1) or QFP160 (SOT322-1). REPAIRING SOLDERED JOINTS During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. QFP REFLOW SOLDERING A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Reflow soldering techniques are suitable for all QFP packages. REPAIRING SOLDERED JOINTS The choice of heating method may be influenced by larger plastic QFP packages (44 leads, or more). If infrared or vapour phase heating is used and the large packages are not absolutely dry (less than 0.1% moisture content by weight), vaporization of the small amount of moisture in them can cause cracking of the plastic body. For more information, refer to the Drypack chapter in our “Quality Reference Handbook” (order code 9397 750 00192). March 1992 Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. 31 Philips Semiconductors Product specification Integrated VIP and teletext decoder (IVT1.1) SAA5244A DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. March 1992 32