INTEGRATED CIRCUITS 74F647 Octal transceiver/register, non-inverting (open-collector) 74F649 Octal transceiver/register, inverting (open-collector) Product specification IC15 Data Handbook 1992 Feb 28 Philips Semiconductors Product specification Octal transceivers/registers (open-collector) 74F647/74F649 74F647 Octal Transceiver/Register, Non-inverting (Open Collector) 74F649 Octal Transceiver/Register, Inverting (Open Collector) data when the Output Enable, OE is active Low. In the isolation mode (Output Enable, OE = High), data from Bus A may be stored in the B register and/or data from Bus B may be stored in the A register. FEATURES • High impedance NPN base inputs for reduced loading (20µA in High and Low states) • Independent registers for A and B buses • Multiplexed real-time and stored data • Choice of non-inverting and inverting data paths • Open Collector outputs • 300 mil wide 24-pin Slim Dip package When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B, may be driven at a time. The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74F647 and 74F649. TYPICAL fmax TYPICAL SUPPLY CURRENT (TOTAL) 74F647 65MHz 125mA 74F649 65MHz 125mA TYPE DESCRIPTION The 74F647 and 74F649 Transceivers/Registers consist of bus transceiver circuits with open-collector outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a High logic level. Output Enable (OE) and DIR pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register or both. ORDERING INFORMATION The select (SAB, SBA) controls can multiplex stored and real-time (transparent mode) data. The DIR determines which bus will receive PIN CONFIGURATION – 74F647 CPAB 1 PKG DWG # 24-pin plastic Slim DIP (300mil) N74F647N, N74F649N SOT222-1 24-pin plastic SOL N74F647D, N74F649D SOT137-1 PIN CONFIGURATION – 74F649 24 VCC CPAB 1 24 VCC SAB 2 23 CPBA SAB 2 23 CPBA DIR 22 SBA DIR 22 SBA 3 3 A0 4 21 OE A0 4 21 OE A1 5 20 B0 A1 5 20 B0 A2 6 19 B1 A2 6 19 B1 A3 7 18 B2 A3 7 18 B2 A4 8 17 B3 A4 8 17 B3 A5 9 16 B4 A5 9 16 B4 A6 10 15 B5 A6 10 15 B5 A7 11 14 B6 A7 11 14 B6 GND 12 13 B7 GND 12 13 B7 SF01196 1992 Feb 28 COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C DESCRIPTION SF01196 2 853-0876 05853 Philips Semiconductors Product specification Octal transceivers/registers (open-collector) LOGIC SYMBOL – 74F647 4 5 A0 1 2 3 CPAB SAB DIR 23 22 21 CPBA SBA OE A1 B0 VCC=Pin 24 GND=Pin 12 6 A2 B1 20 7 B2 19 18 A3 B3 17 LOGIC SYMBOL – 74F649 8 9 A4 B4 16 10 A5 A6 B5 B6 15 14 11 5 6 7 8 9 10 11 A0 A1 A2 A3 A4 A5 A6 A7 B0 B1 B2 B3 B4 B5 B6 B7 20 19 18 17 16 15 14 13 1 2 3 23 CPAB SAB DIR CPBA 22 21 SBA OE B7 13 VCC=Pin 24 GND=Pin 12 LOGIC SYMBOL – 74F647 21 G3 3 3EN1(BA) 3EN1(BA) 3EN2(AB) 3EN2(AB) 23 23 C4 22 C4 22 G5 1 G5 1 C6 2 C6 2 G7 G7 ≥ 1 4 20 4D 5 6D 7 1 7 ≥ 1 4 1 5 1 5 19 18 17 16 15 14 10 13 11 19 9 14 10 7 8 15 9 1 ≥1 2 7 16 8 7 6 17 7 6D 5 18 6 13 11 SF01199 SF01200 REAL TIME BUS TRANSFER REAL TIME BUS TRANSFER STORAGE FROM TRANSFER STORED DATA BUS B TO BUS A BUS A TO BUS B A, B, OR A AND B TO A OR B BUS A L 20 4D 5 1 1 ≥1 2 5 OE SF01198 LOGIC SYMBOL – 74F648 G3 3 4 A7 SF01197 21 74F647/74F649 BUS B DIR CPAB CPBA L X 1992 Feb 28 X BUS A SAB SBA OE X L L BUS B DIR CPAB CPBA H X X BUS A BUS B SAB SBA OE L X X X X X H X 3 DIR CPAB CPBA X X BUS A BUS B DIR CPAB CPBA SAB SBA OE SAB SBA X X L L X H or L X H X X L H H or L X H X X X SF01201 Philips Semiconductors Product specification Octal transceivers/registers (open-collector) 74F647/74F649 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS DESCRIPTION 74F(U.L.) HIGH/LOW LOAD VALUE HIGH/LOW A0 - A7 A inputs 1.0/0.033 20µA/20µA B0 - B7 B inputs 1.0/0.033 20µA/20µA CPAB A-to-B clock input 1.0/0.033 20µA/20µA CPBA B-to-A clock input 1.0/0.033 20µA/20µA SAB A-to-B select input 1.0/0.033 20µA/20µA SBA B-to-A select input 1.0/0.033 20µA/20µA DIR Data flow Directional control enable input 1.0/0.066 20µA/20µA OE Output Enable input 1.0/0.066 20µA/20µA A0 - A7 A outputs OC/106.7 OC/64mA B0 - B7 B outputs OC/106.7 NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state. OC = Open Collector OC/64mA FUNCTION TABLE INPUTS H L X ↑ * DATA I/O OPERATING MODE OE DIR CPAB CPBA SAB SBA A0-A7 B0-B7 X X ↑ X X X Input Unspecified* Store A, B unspecified* Store A, B unspecified* Unspecified* Input Store B, A unspecified* Store B, A unspecified* Store A and B data Isolation, hold storage Real time B data to A bus Stored B data to A bus X X X ↑ X X H H X X ↑ H or L ↑ H or L X X X X Input Input Store A and B data Isolation, hold storage L L L L X X X H or L X X L H Output Input Real time B data to A bus Stored B data to A bus L L = = = = = H H or L X L X Input Output Real time A data to B bus Real time A data to B bus H X X H X Stored A data to B bus Stored A data to B bus High voltage level Low voltage level Don’t care Low-to-High clock transition The data output function may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock. LOGIC DIAGRAM – 74F647 LOGIC DIAGRAM – 74F649 OE 21 OE 21 DIR CPBA SBA CPAB SAB 3 23 22 1 2 DIR CPBA SBA CPAB SAB 3 23 22 1 2 1 of 8 Channels 1 of 8 Channels 1D 1D C1 C1 4 A0 A0 20 B0 B0 C1 C1 1992 Feb 28 20 1D 1D To 7 other channels 4 To 7 other channels SF01202 4 SF01203 Philips Semiconductors Product specification Octal transceivers/registers (open-collector) 74F647/74F649 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL PARAMETER RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to +VCC V IOUT Current applied to output in Low output state Tamb Operating free-air temperature range Tstg Storage temperature 128 mA 0 to +70 °C –65 to +150 °C RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER UNIT MIN NOM MAX 5.0 5.5 VCC Supply voltage 4.5 V VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA VOH High-level output voltage 4.5 V IOL Low-level output current 64 mA Tamb Operating free-air temperature range 70 °C V 0 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL IOH High-level output current VOL O Low level output voltage Low-level VI Input clamp voltage II Input In ut current at maximum input voltage IIH High-level input current IIL Low-level input current ICC Supply current (total) LIMITS TEST CONDITIONS1 PARAMETER MIN TYP2 VCC = MIN, VIL = MAX, VIH = MIN, VOH = MAX VCC = MIN, VIL = MAX VIH = MIN, UNIT MAX 250 µA IOL = 48mA ±10%VCC 0.38 0.55 V IOL = 64mA ±5%VCC 0.42 0.55 V –0.73 –1.2 V VCC = MIN, II = IIK Others VCC = 0.0, VI = 7.0V 100 µA An, Bn VCC = 5.5V, VI = 5.5V 1 mA VCC = MAX, VI = 2.7V 20 µA VCC = MAX, VI = 0.5V ICCH VCC = MAX –20 µA 145 mA 145 200 mA NOTES: 1. For conditions shown as MIN or Max, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 1992 Feb 28 ICCL 105 5 Philips Semiconductors Product specification Octal transceivers/registers (open-collector) 74F647/74F649 AC ELECTRICAL CHARACTERISTICS LIMITS S O SYMBOL Tamb = +25°C VCC = +5.0V CL = 50pF, RL = 500Ω S CO O TEST CONDITION PARAMETER MIN TYP Tamb = 0°C to +70°C VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω MAX MIN UNIT MAX fMAX Maximum clock frequency Waveform 1 50 65 tPLH tPHL Propagation delay CPAB to Bn or CPBA or An Waveform 1 7.0 5.5 12.0 8.5 15.0 11.0 7.0 5.5 40 16.5 12.0 MHz ns ns tPLH tPHL Propagation delay An to Bn or Bn to An Waveform 2 Waveform 3 7.5 4.0 10.5 7.0 13.5 9.5 7.5 4.0 16.0 10.5 ns ns tPLH tPHL Propagation delay SBA to An or SAB to Bn Waveform 2 Waveform 3 7.5 4.0 11.5 7.0 14.5 9.5 7.5 4.0 17.0 10.5 ns ns tPLH tPHL Propagation delay OE to An or Bn Waveform 2 Waveform 3 9.0 6.5 13.0 10.0 16.0 12.5 9.0 6.5 18.5 13.5 ns ns tPLH tPHL Propagation delay DIR to An or Bn Waveform 2 Waveform 3 9.0 7.0 13.0 15.0 16.0 18.0 9.0 7.0 18.5 20.0 ns ns AC SETUP REQUIREMENTS LIMITS SYMBOL PARAMETER Tamb = +25°C VCC = +5.0V CL = 50pF, RL = 500Ω TEST CONDITION MIN ts(H) ts(L) Setup time, High or Low An to CPBA or Bn to CPAB ts(H) ts(L) tw(H) tw(L) TYP Tamb = 0°C to +70°C VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω MAX MIN UNIT MAX Waveform 4 4.0 4.0 5.0 5.0 ns ns Hold time, High or Low An to CPBA or Bn to CPAB Waveform 4 0 0 0 0 ns ns Pulse width, High or Low CPAB or CPBA Waveform 1 4.5 6.0 4.5 6.5 ns ns AC WAVEFORMS For all waveforms, VM = 1.5V The shaded areas indicate when the input is permitted to change for predictable output performance. An or Bn 1/fMAX CPBA or CPAB VM VM tW(H) An or Bn tPLH VM Bn or An VM tPLH VM VM An or Bn SF00395 Waveform 2. Propagation Delay, An to Bn or Bn to An and SBA to An or SAB to Bn SF01161 Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency 1992 Feb 28 SBA or SAB VM tPHL VM tW(L) tPHL VM 6 Philips Semiconductors Product specification Octal transceivers/registers (open-collector) 74F647/74F649 AC WAVEFORMS (Continued) For all waveforms, VM = 1.5V The shaded areas indicate when the input is permitted to change for predictable output performance. An or Bn VM SBA or SAB VM tPLH Bn or An An or Bn VM tPHL VM VM ts(H) An or Bn VM CPBA or CPAB th(H) VM VM VM ts(L) th(H) VM SF00396 SF01165 Waveform 3. Propagation Delay, An to Bn or Bn to An and SBA to An or SAB to Bn Waveform 4. Data Setup and Hold Times TYPICAL PROPAGATION DELAYS VERSUS LOAD FOR OPEN COLLECTOR OUTPUTS 18 16 14 tPLH 12 10 PROPAGATION DELAY (ns) tPHL 8 6 4 2 0 0 100 200 300 400 500 600 LOAD RESISTOR () SF01208 NOTE: When using open-collector part, the value of the pull-up resistor greatly affects the value of the tPLH. For example, changing the pull-up resistor value from 500 to 100 will improve the tPLH up to 50% with only slight increase in the tPHL. However, if the pull-up resistor is changed, the user must take certain that the total IOL current through the resistor and the total IIL’s of the receivers do not exceed the IOL maximum specification. 1992 Feb 28 7 Philips Semiconductors Product specification Octal transceivers/registers (open-collector) 74F647/74F649 TEST CIRCUIT AND WAVEFORMS VCC 7.0V VIN RL VOUT PULSE GENERATOR tw 90% NEGATIVE PULSE VM CL AMP (V) VM 10% D.U.T. RT 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V RL AMP (V) 90% 90% Test Circuit for Open Collector Outputs POSITIVE PULSE VM VM 10% TEST Open Collector All other SWITCH closed open DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 10% tw SWITCH POSITION 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00195 1992 Feb 28 8 Philips Semiconductors Product specification Transceivers/registers 74F647, 74F649 DIP24: plastic dual in-line package; 24 leads (300 mil) 1992 Feb 28 9 SOT222-1 Philips Semiconductors Product specification Transceivers/registers 74F647, 74F649 SO24: plastic small outline package; 24 leads; body width 7.5 mm 1992 Feb 28 10 SOT137-1 Philips Semiconductors Product specification Transceivers/registers 74F647, 74F649 NOTES 1992 Feb 28 11 Philips Semiconductors Product specification Transceivers/registers 74F647, 74F649 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 12 Date of release: 10-98 9397-750-05152