Data Sheet No.PD60221 IRS2011(S)PbF HIGH AND LOW SIDE DRIVER Features • • • • • • • • • • • Floating channel designed for bootstrap operation Fully operational up to +200 V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 V to 20 V Independent low-side and high-side channels Input logic HIN/LIN active high Undervoltage lockout for both channels 3.3 V and 5 V input logic compatible CMOS Schmitt-triggered inputs with pull-down Matched propagation delay for both channels RoHS compliant Applications • Audio Class D amplifiers • High power DC-DC SMPS converters • DC motor drive Product Summary VOFFSET 200 V max. IO+/- 1.0 A /1.0 A typ. VOUT 10 V - 20 V ton/off 60 ns typ. Delay Matching 20 ns max. Packages Description The IRS2011 is a high power, high speed power MOSFET driver with independent high and low-side referenced output IRS2011S IRS2011 channels, ideal for Audio Class D and DC-DC converter appli8-Lead SOIC 8-Lead PDIP cations. Logic inputs are compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an Nchannel power MOSFET in the high-side configuration which operates up to 200 V. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. Typical Connection 5 8 4 1 (Refer to Lead Assignments for correct configuration). This diagram shows electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1 IRS2011(S)PbF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition VB High-side floating supply voltage VS Min. Max. -0.3 220 (Note 1) VB + 0.3 High-side floating supply offset voltage VB - 20 V HO High-side floating output voltage VS - 0.3 V CC Low-side fixed supply voltage -0.3 20 (Note 1) VLO Low-side output voltage -0.3 VCC +0.3 V IN Logic input voltage (HIN & LIN) -0.3 VCC +0.3 dV s/dt PD RTHJA Allowable offset supply voltage transient (Fig. 2) Package power dissipation @ TA = +25 °C Thermal resistance, junction to ambient Units VB + 0.3 — 50 (8-lead DIP) — 1.0 (8-lead SOIC) — 0.625 (8-lead DIP) — 125 (8-lead SOIC) — 200 150 TJ Junction temperature — TS Storage temperature -55 150 TL Lead temperature (soldering, 10 seconds) — 300 V V/ns W °C/W °C Note 1: All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply. Recommended Operating Conditions For proper operation the device should be used within the recommended conditions. The VS and COM offset ratings are tested with all supplies biased at a 15 V differential. Symbol Definition Min. Max. VB High-side floating supply absolute voltage VS + 10 VS + 20 VS High-side floating supply offset voltage Note 2 200 V HO High-side floating output voltage VS VB V CC Low-side fixed supply voltage 10 20 VLO Low-side output voltage 0 V CC V IN Logic input voltage (HIN & LIN) TA Ambient temperature COM 5.5 -40 125 Units V °C Note 2: Logic operational for VS of -5 V to +200 V. Logic state held for VS of -5 V to -VBS. www.irf.com 2 IRS2011(S)PbF Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 15 V, CL = 1000 pF, TA = 25 °C unless otherwise specified. Figure 1 shows the timing definitions. Symbol Definition Min. Typ. Max. Units Test Conditions ton Turn-on propagation delay — 60 80 VS = 0V t off Turn-off propagation delay — 60 80 VS = 200V tr Turn-on rise time — 25 40 tf Turn-off fall time — 15 35 DM1 Turn-on delay matching | ton (H) - ton (L) | — — 20 DM2 Turn-off delay matching | toff (H) — — 20 - toff (L) | ns Static Electrical Characteristics VBIAS (VCC, VBS) = 15 V, and TA = 25 °C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to COM and are applicable to all logic input leads: HIN and LIN. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Definition Min. Typ. Max. Units Test Conditions V IH Logic “1” input voltage 2.5 — — V IL Logic “0” input voltage — — 0.7 V OH High level output voltage, VBIAS - VO Low level output voltage, VO — — 1.4 — — 0.1 IO = 20 mA ILK Offset supply leakage current — — 50 VB=VS = 200 V VOL VCC = 10 V - 20 V V IO = 0 A IQBS Quiescent VBS supply current — 120 210 IQCC Quiescent VCC supply current — 200 300 IIN+ Logic “1” input bias current — 3 10 VIN = 3.3 V IIN- Logic “0” input bias current VBS supply undervoltage positive going threshold VBS supply undervoltage negative going threshold VCC supply undervoltage positive going threshold VCC supply undervoltage negative going threshold — — 5.0 VIN = 0 V 8.3 9.0 9.7 7.5 8.2 8.9 8.3 9.0 9.7 7.5 8.2 8.9 VBSUV+ VBSUVVCCUV+ VCCUVIO+ Output high short circuit pulsed current — 1.0 — IO- Output low short circuit pulsed current — 1.0 — µA V A www.irf.com VIN = 0 V or 3.3 V VO = 0 V, PW = 10 µs VO = 15 V, PW = 10 µs 3 IRS2011(S)PbF Functional Block Diagram VB 3V S-TRIGGER LOW VOLTAGE LEVEL SHIFT HIN BUFFER HIGH VOLTAGE LEVEL SHIFT CIRCUIT UV DETECT UV Q S HO R VS VCC 3V S-TRIGGER LIN UV DETECT LOW VOLTAGE LEVEL SHIFT LO DELAY COM Lead Definitions Symbol Description HIN LIN VB HO VS VCC LO COM Logic input for high-side gate driver output (HO), in phase Logic input for low-side gate driver output (LO), in phase High-side floating supply High-side gate drive output High-side floating supply return Low-side supply Low-side gate drive output Low-side return Lead Assignments 5 HIN VS 4 5 HIN VS 4 6 LIN HO 3 6 LIN HO 3 7 COM VB 2 7 COM VB 2 8 LO VCC 1 8 LO 8-Lead SOIC VCC 1 8-Lead PDIP IRS2011S IRS2011 Part Number www.irf.com 4 IRS2011(S)PbF 50% 50% HIN / LIN trise tfall 90% 90% ton(H) toff(H) 10% 10% HO DM2 DM1 90% toff(L) ton(L) LO 10% Figure 1. Timing Diagram www.irf.com 5 500 Turn-O n Propagation Delay (ns) Turn-O n Propagation Delay (ns) IRS2011(S)PbF 400 300 200 100 Max. Typ. 0 -50 -25 0 25 50 75 100 500 400 300 200 100 Max. Typ. 0 10 125 12 500 400 300 200 Max. Typ. -25 0 25 50 75 100 125 Temperature ( oC) Figure 3A. Turn-Off Propagation Delay vs. Temperature www.irf.com 18 20 Figure 2B. Turn-On Propagation Delay vs. Supply Voltage Turn-O ff Propagation Delay (ns) Turn-O ff Propagation Delay (ns) Figure 2A. Turn-On Propagation Delay vs. Temperature 0 -50 16 V BIAS Supply Voltage (V) Temperature ( oC) 100 14 500 400 300 200 100 Max. Typ. 0 10 12 14 16 18 20 V BIAS Supply Voltage (V) Figure 3B. Turn-Off Propagation Delay vs. Supply Voltage 6 100 100 80 80 Turn-O n Rise Time (n s) Turn-O n Rise Time (ns) IRS2011(S)PbF 60 40 20 Max. Typ. 0 -50 60 40 20 Max. Typ. 0 -25 0 25 50 Temperature 75 100 125 10 18 20 50 Turn-O ff Fall Tim e (ns) Turn-O ff Fall Tim e (ns) 16 Figure 4B. Turn-On Rise Time vs. Supply Voltage 50 40 Max. 20 10 14 V BIAS Supply Voltage (V) Fiure 4A. Turn-On Rise Time vs.Temperature 30 12 (oC) Typ. 0 -50 40 Max. 30 20 Typ. 10 0 -25 0 25 50 75 100 Temperature (oC) Figure 5A. Turn-Off Fall Time vs. Temperature www.irf.com 125 10 12 14 16 18 20 V BIAS Supply Voltage (V) Figure 5B. Turn-Off Fall Time vs. Supply Voltage 7 50 40 30 Max. 20 10 0 -50 -25 0 25 50 75 100 125 Turn-On Turn-offDelay DelayMatching MatchingTime Time(ns) (ns Turn-On Turn-onDelay DelayMatching MatchingTime Time(ns) (ns IRS2011(S)PbF 50 40 30 Max. 20 10 0 -50 -25 Turn-Off Turn-off Delay Delay Matching MatchingTime Time(ns) (ns Turn-Off Turn-offDelay DelayMatching MatchingTime Time(ns) (ns 50 40 30 Max. 20 10 0 25 50 Temperature 75 100 (oC) Figure 7A. Turn-off Turn-Off Delay DelayMatching MatchingTime Time Figure 7A. vs. Temperature Temperature vs. www.irf.com 50 75 100 125 Figure 6B.Turn-on Turn-OnDelay DelayMatching MatchingTime Time Figure 6B. vs.Supply SupplyVoltage Voltage vs. Figure6A. 6A.Turn-on Turn-On Delay Matching Time Figure Delay Matching Time vs. Temperature vs. Temperature -25 25 V CC Supply Voltage (V) Temperature (oC) 0 -50 0 125 50 40 30 Max. 20 10 0 -50 -25 0 25 50 75 100 125 V CC Supply Voltage (V) Figure 7B. Figure 7B.Turn-off Turn-OffDelay DelayMatching MatchingTime Time vs.Supply SupplyVoltage Voltage vs. 8 IRS2011(S)PbF 5 Logic "1" Input Voltage (V) Logic "1" Input Voltage (V) 5 4 3 2 Min. 1 4 3 Min. 2 1 0 0 -50 -25 0 25 50 75 100 10 125 12 16 18 20 V CC Supply Voltage (V) Temperature (oC) Figure 8B. Logic "1" Input Voltage vs. Supply Voltage Figure 8A. Logic "1" Input Voltage vs. Temperature 5 5 Logic "0" Input Voltage (V) Logic "0" Input Voltage (V) 14 4 3 2 1 Max. 0 -50 4 3 2 1 Max. 0 -25 0 25 50 Temperatre 75 100 (oC) Figure 9A. Logic "0" Input Voltage vs. Temperature www.irf.com 125 10 12 14 16 18 20 V CC Supply Voltage (V) Figure 9B. Logic "0" Input Voltage vs. Supply Voltage 9 IRS2011(S)PbF High L evel Output Vol tage (V) High L evel Output Vo ltage (V) 5.0 4.0 3.0 2.0 Max. 1.0 0.0 -50 -25 0 25 50 75 100 5.0 4.0 3.0 2.0 M ax 1.0 0.0 125 10 12 Temperature (oC) 16 18 20 V BAIS Supply Voltage (V) Figure 10A. High Level Output Voltage vs. Te mperature (Io = 0 mA) Figure 10B. High Level Output Voltage vs. Su pply Voltage (Io = 0 mA) 0.5 0.5 Low Level O utput Voltage (V) Low Level O utput Voltage (V) 14 0.4 0.4 0.3 0.3 0.2 0.2 Max. 0.1 0.0 -50 Max. 0.1 -25 0 25 50 75 100 Temperature (oC) Figure 11A. Low Level Output vs.Temperature www.irf.com 125 0.0 10 12 14 16 18 20 V CC Supply Voltage (V) Figure 11B. Low Level Output vs. Supply Voltage 10 500 400 300 200 100 Max. 0 -50 -25 0 25 50 75 100 125 O ffset Supply Leak age Current (µ A) O ffs et Supply Leakage Current (µA) IRS2011(S)PbF 500 400 300 200 Max. 100 0 50 100 Temperature (oC) 200 250 300 V B Boost Voltage (V) Figure 12A. Offset Supply Leakage Current vs. Temperature Figure 12B. Offset Supply Leakage Current vs. Supply Voltage 600 V BS Supply Current (µA) V BS Supply Current ( µA) 600 500 400 300 200 100 0 -50 150 500 400 300 200 Max. Typ. 100 0 -25 0 25 50 75 100 Temperature (oC) Figure 13A. V BS Supply Current vs. Temperature www.irf.com 125 10 12 14 16 18 20 V BS Supply Voltage (V) Figure 13B. V BS Supply Current vs. Supply Voltage 11 IRS2011(S)PbF 600 V CC Supply Current (µA) V CC Supply Current (µA) 600 480 360 Max. 240 Typ. 120 0 -50 360 240 Max. 120 Typ. 0 -25 0 25 50 75 100 125 10 12 14 16 18 Temperature (oC) V CC Supply Voltage (V) Figure 14A. V CC Supply Current vs. Temperature Figure 14B. V CC Supply Current vs. Supply Voltage 100 20 100 Logic "1" Input Current (µA) Logic "1" Input Current (µA) 480 80 60 40 20 Max. Typ. 0 -50 80 60 40 20 Max. Typ. 0 -25 0 25 50 Temperature 75 100 (oC) Figure 15A. Logic "1" Input Current vs. Temperature www.irf.com 125 10 12 14 16 18 20 V CC Supply Voltage (V) Figure 15B. Logic "1" Input Current vs. Supply Voltage 12 6 5 Logic "0" Input Bias Current (µA) Lo gic "0" Input Bias Current (µA) IRS2011(S)PbF Max 4 3 2 1 0 -50 -25 0 25 50 75 100 6 Max 5 4 3 2 1 0 125 10 12 14 Temperature (°C) 10.8 UV Threshold (-) (V) 10.8 UV Threshold (+) (V) 12 Max. 9.6 Typ. 8.4 Min. 7.2 0 25 50 75 100 125 Temperature (oC) Figure 17. VCC and VBS Undervoltage Threshold (+) vs. Temperature www.irf.com 20 Supply Voltage (V) 12 -25 18 Figure 16B. Logic "0" Input Bias Current vs. Voltage Figure 16A. Logic "0" Input Bias Current vs. Temperature 6 -50 16 9.6 Max. 8.4 Typ. 7.2 6 -50 Min. -25 0 25 50 75 100 125 Temperature (oC) Figure 18. V CC and V BS Undervoltage Threshold (-) vs. Temperature 13 IRS2011(S)PbF 5 O utput Source Current (A) O utput Source Current (A) 5 4 3 2 1 Typ. 0 -50 -25 0 25 50 75 100 125 4 3 2 Typ. 1 0 10 12 Temperature (oC) 16 18 20 V BIAS Supply Voltage (V) Figure 19A. Output Source Current vs. Temperature Figure 19B. Output Source Current vs. Supply Voltage 5 5 O utput Sink Current (A) O utput Sink Current (A) 14 4 3 2 1 Typ. 0 -50 4 3 2 1 Typ. 0 -25 0 25 50 75 100 Temperature (oC) Figure 20A. Output Sink Current vs. Temperature www.irf.com 125 10 12 14 16 18 20 Supply Voltage (V) Figure 20B. Output Sink Current vs. Supply Voltage 14 Maximum VS Negative Offset (V) IRS2011(S)PbF 0 -3 -6 -9 -12 -15 10 12 14 16 18 20 V BS Floating Supply Voltage (V) 65 65 55 55 Temperature (oC) o Temperature Temperature( (oC) C) Figure 21. Maxim um V S Negative Offset vs V BS Floating Supply Voltage 45 35 25 15 45 35 25 15 1 10 100 1000 1 Frequency (kHz) Figure 22. IRS2011S vs. Frequency (IRFBC20) Rgate=33 Ω , V CC=12 V 10 100 1000 Frequency (kHz) Figure 23. IRS2011S vs. Frequency (IRFBC30) Rgate=22 Ω , V CC=12 V www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 15 65 65 55 55 Temperature (oC) Temperature (C) Temperature (oC) IRS2011(S)PbF 45 35 25 45 35 25 15 15 1 10 100 1 1000 10 Frequency (kHz) Figure 24. IRS2011s vs. Frequency (IRFBC40) 100 1000 Frequency (kHz) Figure 25. IRS2011S vs. Frequency (IRFB23N15D) Rgate=10 Ω , V CC=12 V Figure 24. IRS2011S vs. Frequency (IRFBC40) Rgate=15 Ω , V CC=12 V Temperature (oC) 65 55 45 35 25 15 1 10 100 1000 Frequency (kHz) Figure 26. IRS2011S vs. Frequency (IRFB4212) Rgate=10 Ω , V CC=12 V www.irf.com PDF created with pdfFactory trial version www.pdffactory.com 16 IRS2011(S)PbF Case outlines D DIM B 5 A FOOTPRINT 8 7 6 5 6 H E 0.25 [.010] 1 2 3 A 4 6.46 [.255] 6X e 3X 1.27 [.050] 8X 1.78 [.070] MILLIMETERS MAX MIN .0532 .0688 1.35 1.75 A1 .0040 .0098 0.10 0.25 b .013 .020 0.33 0.51 c .0075 .0098 0.19 0.25 D .189 .1968 4.80 5.00 .1574 3.80 4.00 A 8X 0.72 [.028] INCHES MIN E .1497 e .050 BASIC e1 MAX 1.27 BASIC .025 BASIC 0.635 BASIC H .2284 .2440 5.80 6.20 K .0099 .0196 0.25 0.50 L .016 .050 0.40 1.27 y 0° 8° 0° 8° K x 45° e1 A C y 0.10 [.004] 8X b 0.25 [.010] 8X L A1 C A B NOTES: 1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010]. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE. 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. 8-Lead SOIC 8-Lead PDIP www.irf.com 8X c 7 01-6027 01-0021 11 (MS-012AA) 01-6014 01-3003 01 (MS-001AB) 17 IRS2011(S)PbF LOAD ED TA PE FEED DIRECTION Tape & Reel 8-lead SOIC A B H D F C N OT E : CO NTROLLING D IMENSION IN M M E G C A R R I E R T A P E D IM E N S I O N F O R 8 S O I C N M etr ic Im p e r ia l Co d e M in M ax M in M ax A 7 .9 0 8 .1 0 0 . 31 1 0 .3 1 8 B 3 .9 0 4 .1 0 0 . 15 3 0 .1 6 1 C 11 .7 0 1 2. 30 0 .4 6 0 .4 8 4 D 5 .4 5 5 .5 5 0 . 21 4 0 .2 1 8 E 6 .3 0 6 .5 0 0 . 24 8 0 .2 5 5 F 5 .1 0 5 .3 0 0 . 20 0 0 .2 0 8 G 1 .5 0 n/ a 0 . 05 9 n/ a H 1 .5 0 1 .6 0 0 . 05 9 0 .0 6 2 F D C B A E G H R E E L D IM E N S I O N S F O R 8 S O IC N M etr ic Im p e r ia l Co d e M in M ax M in M ax A 32 9. 6 0 3 3 0 .2 5 1 2 .9 7 6 1 3 .0 0 1 B 20 .9 5 2 1. 45 0 . 82 4 0 .8 4 4 C 12 .8 0 1 3. 20 0 . 50 3 0 .5 1 9 D 1 .9 5 2 .4 5 0 . 76 7 0 .0 9 6 E 98 .0 0 1 0 2 .0 0 3 . 85 8 4 .0 1 5 F n /a 1 8. 40 n /a 0 .7 2 4 G 14 .5 0 1 7. 10 0 . 57 0 0 .6 7 3 H 12 .4 0 1 4. 40 0 . 48 8 0 .5 6 6 www.irf.com 18 IRS2011(S)PbF LEADFREE PART MARKING INFORMATION Part number Date code IRxxxxxx S YWW? Pin 1 Identifier ? P MARKING CODE Lead Free Released Non-Lead Free Released IR logo ?XXXX Lot Code (Prod mode - 4 digit SPN code) Assembly site code Per SCOP 200-002 ORDER INFORMATION 8-Lead PDIP IRS2011PbF 8-Lead SOIC IRS2011SPbF 8-Lead SOIC Tape & Reel IRS2011STRPbF SOIC-8 package is MSL2 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found on IR's Web Site http://www.irf.com/ WORLD HEADQUARTERS: 233 Kansas Street, El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 12/4/2006 www.irf.com 19