ATMEL AT27C256R-70PI

Features
• Fast Read Access Time – 45 ns
• Low-Power CMOS Operation
•
•
•
•
•
•
•
•
– 100 µA Max Standby
– 20 mA Max Active at 5 MHz
JEDEC Standard Packages
– 28-lead PDIP
– 32-lead PLCC
– 28-lead TSOP and SOIC
5V ± 10% Supply
High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Rapid Programming Algorithm – 100 µs/Byte (Typical)
CMOS and TTL Compatible Inputs and Outputs
Integrated Product Identification Code
Industrial and Automotive Temperature Ranges
Green (Pb/Halide-free) Packaging Option
256K (32K x 8)
OTP EPROM
AT27C256R
1. Description
The AT27C256R is a low-power, high-performance 262,144-bit one-time programmable read-only memory (OTP EPROM) organized 32K by 8 bits. It requires only one 5V
power supply in normal read mode operation. Any byte can be accessed in less than
45 ns, eliminating the need for speed reducing WAIT states on high-performance
microprocessor systems.
Atmel’s scaled CMOS technology provides low-active power consumption, and fast
programming. Power consumption is typically only 8 mA in Active Mode and less than
10 µA in Standby.
The AT27C256R is available in a choice of industry-standard JEDEC-approved one
time programmable (OTP) plastic DIP, PLCC, SOIC, and TSOP packages. All devices
feature two-line control (CE, OE) to give designers the flexibility to prevent bus
contention.
With 32K byte storage capability, the AT27C256R allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media.
Atmel’s AT27C256R has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program
the part and guarantees reliable programming. Programming time is typically only
100 µs/byte. The Integrated Product Identification Code electronically identifies the
device and manufacturer. This feature is used by industry-standard programming
equipment to select the proper programming algorithms and voltages.
0014M–EPROM–12/07
2. Pin Configurations
Pin Name
Function
A0 - A14
Addresses
O0 - O7
Outputs
CE
Chip Enable
OE
Output Enable
NC
No Connect
2.1
28-lead PDIP/SOIC Top View
VPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
A14
A13
A8
A9
A11
OE
A10
CE
O7
O6
O5
O4
O3
28-lead TSOP Top View – Type 1
OE
A11
A9
A8
A13
A14
VCC
VPP
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE
O7
O6
O5
O4
O3
GND
O2
O1
O0
A0
A1
A2
32-lead PLCC Top View
29
28
27
26
25
24
23
22
21
14
15
16
17
18
19
20
5
6
7
8
9
10
11
12
13
A8
A9
A11
NC
OE
A10
CE
O7
O6
O1
O2
GND
NC
O3
O4
O5
A6
A5
A4
A3
A2
A1
A0
NC
O0
4
3
2
1
32
31
30
A7
A12
VPP
NC
VCC
A14
A13
2.2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
2.3
Note:
2
PLCC Package Pins 1 and 17 are Don’t Connect.
AT27C256R
0014M–EPROM–12/07
AT27C256R
3. System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the VCC and Ground terminals of the device, as close
to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the VCC and Ground terminals. This capacitor should be positioned as
close as possible to the point where the power supply is connected to the array.
4. Block Diagram
5. Absolute Maximum Ratings*
Temperature Under Bias................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V(1)
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V(1)
*NOTICE:
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at these or any other
conditions beyond those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
VPP Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V(1)
Note:
1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
VCC + 0.75V dc which may overshoot to +7.0 volts for pulses of less than 20 ns.
3
0014M–EPROM–12/07
6. Operating Modes
Mode/Pin
CE
OE
Ai
VPP
Outputs
Read
VIL
VIL
Ai
VCC
DOUT
(1)
X
VCC
High Z
X(1)
VCC
High Z
VIH
Ai
VPP
DIN
X
VIL
Ai
VPP
DOUT
Optional PGM Verify
VIL
VIL
Ai
VCC
DOUT
PGM Inhibit(2)
VIH
VIH
X(1)
VPP
High Z
VCC
Identification Code
Output Disable
VIL
Standby
VIH
Rapid Program
(2)
VIH
X(1)
VIL
(2)
(1)
PGM Verify
(2)
(3)
Product Identification(4)
Notes:
VIL
VIL
A9 = VH
A0 = VIH or VIL
A1 - A14 = VIL
1. X can be VIL or VIH.
2. Refer to Programming Characteristics.
3. VH = 12.0 ± 0.5V.
4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled
low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.
7. DC and AC Operating Conditions for Read Operation
AT27C256R
Operating Temp. (Case)
Ind.
-45
-70
-40° C - 85° C
-40° C - 85° C
Auto.
VCC Supply
-40° C - 125° C
5V ± 10%
5V ± 10%
8. DC and Operating Characteristics for Read Operation
Symbol
Parameter
Condition
ILI
Input Load Current
VIN = 0V to VCC
ILO
Output Leakage Current
IPP1
(2)
VPP(1)
Read/Standby Current
Max
Units
Ind.
±1
µA
Auto.
±5
µA
Ind.
±5
µA
Auto.
±10
µA
VPP = VCC
10
µA
ISB1 (CMOS), CE = VCC ± 0.3V
100
µA
ISB2 (TTL), CE = 2.0 to VCC + 0.5V
1
mA
f = 5 MHz, IOUT = 0 mA, E = VIL
20
mA
VOUT = 0V to VCC
Min
ISB
VCC(1) Standby Current
ICC
VCC Active Current
VIL
Input Low Voltage
-0.6
0.8
V
VIH
Input High Voltage
2.0
VCC + 0.5
V
VOL
Output Low Voltage
IOL = 2.1 mA
0.4
V
VOH
Output High Voltage
IOH = -400 µA
Notes:
2.4
V
1. VCC must be applied simultaneously with or before VPP, and removed simultaneously with or after VPP..
2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP.
4
AT27C256R
0014M–EPROM–12/07
AT27C256R
.
9. AC Characteristics for Read Operation
AT27C256R
-45
Symbol
Parameter
Condition
tACC(1)
Address to Output Delay
CE = OE = VIL
tCE(1)
CE to Output Delay
tOE(1)
OE to Output Delay
tDF(1)
OE or CE High to Output
Float, Whichever Occurred First
tOH
Output Hold from Address, CE or OE,
Whichever Occurred First
Note:
Min
-70
Max
Max
Units
45
70
ns
OE = VIL
45
70
ns
CE = VIL
20
30
ns
20
25
ns
7
Min
7
ns
1. See AC Waveforms for Read Operation.
10. AC Waveforms for Read Operation(1)
Notes:
1. Timing measurement reference level is 1.5V for -45 devices. Input AC drive levels are VIL = 0.0V and VIH = 3.0V. Timing measurement reference levels for all other speed grades are VOL = 0.8V and VOH = 2.0V. Input AC drive levels are VIL = 0.45V
and VIH = 2.4V.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
5
0014M–EPROM–12/07
11. Input Test Waveforms and Measurement Levels
For -45 devices only:
tR, tF < 5 ns (10% to 90%)
For -70 devices:
tR, tF < 20 ns (10% to 90%)
12. Output Test Load
Note:
1. CL = 100 pF including jig capacitance, except for the -45 devices, where CL = 30 pF.
13. Pin Capacitance
f = 1 MHz, T = 25°C(1)
Symbol
Typ
Max
Units
Conditions
CIN
4
6
pF
VIN = 0V
COUT
8
12
pF
VOUT = 0V
Note:
6
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
AT27C256R
0014M–EPROM–12/07
AT27C256R
14. Programming Waveforms(1)
Notes:
1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH.
2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer.
3. When programming the AT27C256R a 0.1 µF capacitor is required across VPP and ground to suppress spurious voltage
transients.
15. DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Limits
Symbol
Parameter
Test Conditions
ILI
Input Load Current
VIN = VIL,VIH
VIL
Input Low Level
VIH
Input High Level
VOL
Output Low Volt
IOL = 2.1 mA
VOH
Output High Volt
IOH = -400 µA
ICC2
VCC Supply Current (Program and Verify)
IPP2
VPP Current
VID
A9 Product Identification Voltage
Min
Max
Units
±10
µA
-0.6
0.8
V
2.0
VCC + 1
V
0.4
V
2.4
CE = VIL
11.5
V
25
mA
25
mA
12.5
V
7
0014M–EPROM–12/07
16. AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Limits
Test Conditions(1)
Symbol
Parameter
tAS
Address Setup Time
tOES
OE Setup Time
tDS
Data Setup Time
tAH
Address Hold Time
tDH
Data Hold Time
tDFP
Input Rise and Fall Times
(10% to 90%) 20 ns
Input Pulse Levels
0.45V to 2.4V
OE High to Output Float Delay
(2)
VPP Setup Time
tVCS
VCC Setup Time
tPW
CE Program Pulse Width(3)
Max
µs
2
µs
2
µs
0
µs
2
µs
tOE
Data Valid from OE
tPRT
VPP Pulse Rise Time During Programming
130
ns
2
µs
2
µs
95
Output Timing Reference Level
0.8V to 2.0V
(2)
Units
2
0
Input Timing Reference Level
0.8V to 2.0V
tVPS
Notes:
Min
105
µs
150
ns
50
ns
1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP.
2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer
driven – see timing diagram.
3. Program Pulse width tolerance is 100 µsec ± 5%.
17. Atmel’s AT27C256R Integrated Product Identification Code
Pins
A0
O7
O6
O5
O4
O3
O2
O1
O0
Hex
Data
Manufacturer
0
0
0
0
1
1
1
1
0
1E
Device Type
1
1
0
0
0
1
1
0
0
8C
Codes
8
AT27C256R
0014M–EPROM–12/07
AT27C256R
18. Rapid Programming Algorithm
A 100 µs CE pulse width is used to program. The address is set to the first location. VCC is
raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100 µs
CE pulse without verification. Then a verification/reprogramming loop is executed for each
address. In the event a byte fails to pass verification, up to 10 successive 100 µs pulses are
applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been
applied, the part is considered failed. After the byte verifies properly, the next address is
selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All bytes
are read again and compared with the original data to determine if the device passes or fails.
9
0014M–EPROM–12/07
19. Ordering Information
19.1
Standard Package
ICC (mA)
tACC
(ns)
Active
Standby
Ordering Code
Package
45
20
0.1
AT27C256R-45JI
AT27C256R-45PI
AT27C256R-45RI
AT27C256R-45TI
32J
28P6
28R(1)
28T
Industrial
(-40° C to 85° C)
70
20
0.1
AT27C256R-70JI
AT27C256R-70PI
AT27C256R-70RI
AT27C256R-70TI
32J
28P6
28R(1)
28T
Industrial
(-40° C to 85° C)
20
0.1
AT27C256R-70JA
AT27C256R-70PA
AT27C256R-70RA
32J
28P6
28R(1)
Automotive
(-40° C to 125° C)
Ordering Code
Package
Operation Range
Note:
19.2
Operation Range
Not recommended for new designs. Use Green package option.
Green Package (Pb/Halide-free)
ICC (mA)
tACC
(ns)
Active
Standby
45
20
0.1
AT27C256R-45JU
AT27C256R-45PU
AT27C256R-45RU
AT27C256R-45TU
32J
28P6
28R(1)
28T
Industrial
(-40° C to 85° C)
70
20
0.1
AT27C256R-70JU
AT27C256R-70PU
AT27C256R-70RU
AT27C256R-70TU
32J
28P6
28R(1)
28T
Industrial
(-40° C to 85° C)
Note:
1. The 28-pin SOIC package is not recommended for new designs.
Package Type
32J
32-lead, Plastic J-Leaded Chip Carrier (PLCC)
28P6
28-lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
28R
28-lead, 0.330" Wide, Plastic Gull Wing Small Outline (SOIC)
28T
28-lead, Thin Small Outline Package (TSOP)
10
AT27C256R
0014M–EPROM–12/07
AT27C256R
20. Packaging Information
20.1
32J – PLCC
1.14(0.045) X 45˚
PIN NO. 1
IDENTIFIER
1.14(0.045) X 45˚
0.318(0.0125)
0.191(0.0075)
E1
E2
B1
E
B
e
A2
D1
A1
D
A
0.51(0.020)MAX
45˚ MAX (3X)
COMMON DIMENSIONS
(Unit of Measure = mm)
D2
Notes:
1. This package conforms to JEDEC reference MS-016, Variation AE.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254 mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
3. Lead coplanarity is 0.004" (0.102 mm) maximum.
SYMBOL
MIN
NOM
MAX
A
3.175
–
3.556
A1
1.524
–
2.413
A2
0.381
–
–
D
12.319
–
12.573
D1
11.354
–
11.506
D2
9.906
–
10.922
E
14.859
–
15.113
E1
13.894
–
14.046
E2
12.471
–
13.487
B
0.660
–
0.813
B1
0.330
–
0.533
e
NOTE
Note 2
Note 2
1.270 TYP
10/04/01
R
2325 Orchard Parkway
San Jose, CA 95131
TITLE
32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC)
DRAWING NO.
REV.
32J
B
11
0014M–EPROM–12/07
20.2
28P6 – PDIP
D
PIN
1
E1
A
SEATING PLANE
A1
L
B
B1
e
E
0º ~ 15º
C
COMMON DIMENSIONS
(Unit of Measure = mm)
REF
MIN
NOM
MAX
A
–
–
4.826
A1
0.381
–
–
D
36.703
–
37.338
E
15.240
–
15.875
E1
13.462
–
13.970
B
0.356
–
0.559
B1
1.041
–
1.651
L
3.048
–
3.556
C
0.203
–
0.381
eB
15.494
–
17.526
SYMBOL
eB
Notes:
1. This package conforms to JEDEC reference MS-011, Variation AB.
2. Dimensions D and E1 do not include mold Flash or Protrusion.
Mold Flash or Protrusion shall not exceed 0.25 mm (0.010").
e
NOTE
Note 2
Note 2
2.540 TYP
09/28/01
R
12
2325 Orchard Parkway
San Jose, CA 95131
TITLE
28P6, 28-lead (0.600"/15.24 mm Wide) Plastic Dual
Inline Package (PDIP)
DRAWING NO.
28P6
REV.
B
AT27C256R
0014M–EPROM–12/07
AT27C256R
20.3
28R – SOIC
B
E
E1
PIN 1
e
D
A
A1
COMMON DIMENSIONS
(Unit of Measure = mm)
0º ~ 8º
C
L
Note: 1. Dimensions D and E1 do not include mold Flash
or protrusion. Mold Flash or protrusion shall not exceed
0.25 mm (0.010").
SYMBOL
MIN
NOM
MAX
A
2.39
–
2.79
A1
0.050
–
0.356
D
18.00
–
18.50
E
11.70
–
12.50
E1
8.59
–
8.79
B
0.356
–
0.508
C
0.203
–
0.305
L
0.94
–
1.27
e
NOTE
Note 1
Note 1
1.27 TYP
5/18/2004
R
2325 Orchard Parkway
San Jose, CA 95131
TITLE
28R, 28-lead, 0.330" Body Width,
Plastic Gull Wing Small Outline (SOIC)
DRAWING NO.
REV.
28R
C
13
0014M–EPROM–12/07
20.4
28T – TSOP
PIN 1
0º ~ 5º
c
Pin 1 Identifier Area
D1 D
L
b
e
L1
A2
E
A
GAGE PLANE
SEATING PLANE
COMMON DIMENSIONS
(Unit of Measure = mm)
A1
MIN
NOM
MAX
A
–
–
1.20
A1
0.05
–
0.15
A2
0.90
1.00
1.05
D
13.20
13.40
13.60
D1
11.70
11.80
11.90
Note 2
E
7.90
8.00
8.10
Note 2
L
0.50
0.60
0.70
SYMBOL
Notes:
1. This package conforms to JEDEC reference MO-183.
2. Dimensions D1 and E do not include mold protrusion. Allowable
protrusion on E is 0.15 mm per side and on D1 is 0.25 mm per side.
3. Lead coplanarity is 0.10 mm maximum.
L1
NOTE
0.25 BASIC
b
0.17
0.22
0.27
c
0.10
–
0.21
e
0.55 BASIC
12/06/02
R
14
2325 Orchard Parkway
San Jose, CA 95131
TITLE
28T, 28-lead (8 x 13.4 mm) Plastic Thin Small Outline
Package, Type I (TSOP)
DRAWING NO.
REV.
28T
C
AT27C256R
0014M–EPROM–12/07
Headquarters
International
Atmel Corporation
2325 Orchard Parkway
San Jose, CA 95131
USA
Tel: 1(408) 441-0311
Fax: 1(408) 487-2600
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Technical Support
eprom@atmel.com
Sales Contact
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0014M–EPROM–12/07