19-2779; Rev 0; 6/03 MAX3873A Evaluation Kit Features ♦ SMA Connections for All System I/Os ♦ Test Point for Monitoring Loss-of-Lock (LOL) ♦ Single 3.3V Power-Supply Operation ♦ Fully Assembled and Tested Ordering Information PART TEMP RANGE MAX3873AEVKIT -40°C to +85°C IC PACKAGE 20 QFN-EP* (4mm x 4mm) *EP = Exposed pad. Component List DESIGNATION QTY C1–C6, C10–C22 19 DESCRIPTION 0.1µF ±10% ceramic capacitors (0402) C7 1 0.022µF ±10% ceramic capacitor (0402) C8 1 33µF ±20% tantalum capacitor C9 1 2.2µF ±10% ceramic capacitor (1206) C23–C26 0 Not installed D1 1 Red LED J1–J6 6 SMA connectors (edge-mount) J9–J12 0 Not installed JU1–JU5, JU9, JU11 0 Not installed JU6–JU8, JU10 4 3-pin headers (0.1in centers) JU6–JU8, JU10 4 Shunts L1–L4 4 56nH inductors R1 1 392Ω ±1% resistor (0402) VCC, GND 2 Test points U1 1 MAX3873AEGP (20-pin QFN) 4mm x 4mm None 1 MAX3873A evaluation kit None 1 MAX3873A data sheet Detailed Description The MAX3873A EV kit is fully assembled and factory tested. It enables testing of all MAX3873A functions. Test Equipment Required • 3.3V power supply with 300mA current capability • Signal-source, 2.7Gbps minimum capability • Jitter analyzer capable of 2.7Gbps performance • Oscilloscope with at least 3GHz performance Connections The serial data inputs (SDI+, SDI-) have on-board ACcoupling capacitors. All the MAX3873A data and clock outputs (SDO+, SDO-, SCLKO+, SCLKO-) are internally terminated to 50Ω and have on-board AC-coupling capacitors. Configured in this way, these outputs can be directly connected to the 50Ω inputs of a highspeed oscilloscope for analysis. Setup 1) Select either 2.488Gbps or 2.67Gbps with JU10 (RATESET). 2) Enable/Disable FASTRACK capture mode with JU6 (FASTRACK). 3) Enable/Disable Clock output with JU8 (SCLKEN). 4) Select amplitude of CML outputs to high/medium/low with JU7 (MODE). 5) Connect a 2.488Gbps/2.67Gbps PRBS NRZ signal to (SDI+, SDI-) inputs with 50Ω cables. 6) Connect the (SDO+, SDO-, SCLKO+, SCLKO-) outputs to a 50Ω high-speed oscilloscope. Terminate unused outputs with 50Ω. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 Evaluates: MAX3873A General Description The MAX3873A evaluation kit (EV kit) simplifies evaluation of the MAX3873A, a low-power 2.488Gbps/2.67Gbps clock recovery and data retiming IC. The EV kit enables testing of all the MAX3873A functions. SMA connectors are provided for the differential CML-compatible data and clock outputs. The differential data and clock outputs have on-board AC-coupling capacitors to allow direct connection to a high-speed oscilloscope. The MAX3873A EV kit is configured for 3.3V operation and consumes up to 150mA. Jitter analysis and product performance can also be observed by appropriately interfacing the EV kit with a bit-error-rate tester (BERT) and a jitter analyzer. frequency design techniques, including minimizing ground inductances and using controlled-impedance transmission lines on the data and clock signals. Layout Considerations The MAX3873A’s performance can be greatly affected by circuit board layout and design. Use good high- Jumpers and Test Points NAME TYPE DESCRIPTION VCC GND JU6 3-pin header JU7 3-pin header Enables quick phase lock Enabled Disabled N/A Sets amplitude of CML outputs Medium Low High JU8 3-pin header Enables clock output Enabled Disabled N/A JU10 3-pin header Sets VCO frequency 2.67Gbps 2.488Gbps N/A L1 56nH J7 VCC C8 33µF J8 GND L2 56nH C9 2.2µF L3 56nH L4 56nH OPEN VCC_TTL C10 0.1µF C11 0.1µF C12 0.1µF VCC_TTL VCC_BUF JU2 OPEN JU3 OPEN JU4 OPEN C13 0.1µF C14 0.1µF VCC_ANA C15 0.1µF VCC_VCD D1 C16 0.1µF R1 392Ω C7 0.022µF JU11 OPEN JU1 OPEN VCC_TTL 3 C2 0.1µF 4 5 J9 SMA OPEN J11 SMA OPEN C23 OPEN C25 OPEN VCC_TTL C24 OPEN C26 OPEN J10 SMA OPEN JU9 C21 OPEN 0.1µF LOL GND FIL- FIL+ SDO+ SDO- VCC U1 SDI+ MAX3873A VCC_BUF SCLKO+ SDIVCC 6 CALSTRIP 16 7 VCC_TTL JU5 C17 OPEN 0.1µF 8 9 SCLKEN J2 SMA 2 C1 0.1µF 17 MODE J1 SMA VCC_ANA 18 VCC_VCO C22 0.1µF RATESET 19 FASTRACK 1 GND 20 JU10 VCC Evaluates: MAX3873A MAX3873A Evaluation Kit C3 0.1µF 14 C4 0.1µF JU6 C19 0.1µF 12 C5 0.1µF C6 0.1µF 10 JU7 C20 0.1µF VCC_TTL JU8 J12 SMA OPEN Figure 1. MAX3873 EV Kit Schematic 2 J4 SMA 13 VCC_VCO C18 0.1µF J3 SMA VCC_BUF SCLKO- 11 VCC_TTL VCC_TTL 15 _______________________________________________________________________________________ J5 SMA J6 SMA MAX3873A Evaluation Kit Evaluates: MAX3873A 1.0" 1.0" Figure 2. MAX3873A EV Kit Component Placement Guide— Component Side Figure 3. MAX3873A EV Kit PC Board Layout—Component Side 1.0" Figure 4. MAX3873A EV Kit PC Board Layout—Ground Plane _______________________________________________________________________________________ 3 Evaluates: MAX3873A MAX3873A Evaluation Kit 1.0" Figure 5. MAX3873A EV Kit PC Board Layout—Power Plane 1.0" Figure 6. MAX3873A EV Kit PC Board Layout—Solder Side Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 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