XC6121/XC6122 XC6123/XC6124 Series ETR0209-010 Voltage Detector with Watchdog Function and ON/OFF Control (VDF=1.6V~5.0V) ■GENERAL DESCRIPTION The XC6121/XC6122/XC6123/XC6124 series are groups of high-precision, low current consumption voltage detectors with watchdog functions incorporating CMOS process technology. The series consist of a reference voltage source, delay circuit, comparator, and output driver. With the built-in delay circuit, the XC6121/XC6122/XC6123/XC6124 series’ ICs do not require any external components to output signals with release delay time. The output type is VDFL low when detected. With the XC6121/XC6122/XC6123/XC6124 series’ ICs, the EN/ENB pin can control ON and OFF of the watchdog functions. By setting the EN/ENB pin to low or high level, the watchdog function can be OFF while the voltage detector remains operation. Since the EN/ENB pin of the XC6122 and XC6124 series is internally pulled up to the VIN pin or pulled down to the VSS pin, the ICs can be used with the EN/ENB pin left open, when the watchdog functions is used. The detect voltages are internally fixed 1.6V ~ 5.0V in increments of 0.1V, using laser trimming technology. Six watchdog timeout period settings are available in a range from 50ms to 1.6s. Five release delay time settings are available in a range from 3.13ms to 400ms. ■APPLICATIONS ■FEATURES ●Microprocessor watchdog monitoring and reset circuits ●Memory battery backup circuits ●System power-on reset circuits ●Power failure detection Detect Voltage Range : 1.6V ~ 5.0V, +2% (0.1V increments) : VDFL x 5% (TYP.) : 1.0V ~ 6.0V Hysteresis Width Operating Voltage Range Detect Voltage Temperature Characteristics : +100ppm/OC (TYP.) Output Configuration : N-channel open drain Watchdog Pin : Watchdog input If watchdog input maintains ‘H’ or ‘L’ within the watchdog timeout period, a reset signal is output from the RESETB pin. EN/ENB Pin : When the EN/ENB pin voltage is set to low or high level, the watchdog function is forced off. Release Delay Time : 400ms, 200ms, 100ms, 50ms, 3.13ms (TYP.) Watchdog Timeout Period : 1.6s, 800ms, 400ms, 200ms, 100ms, 50ms (TYP.) Package : SOT-25, USP-6C ■TYPICAL APPLICATION CIRCUIT ■TYPICAL PERFORMANCE CHARACTERISTICS ●Supply Current vs. Input Voltage ＸＣ６１２１～ＸＣ６１２４(VDF=２.７Ｖ） 14.0 10.0 Supply Current: I SS (μA) Ta=85℃ 12.0 8.0 Ta=25℃ Ta=-40℃ 6.0 4.0 2.0 0 0 1 2 3 4 Input Voltage: V IN (V) 5 6 1/23 XC6121/XC6122/XC6123/XC6124 Series ■PIN CONFIGURATION USP-6C (BOTTOM VIEW) SOT-25 (TOP VIEW) * The dissipation pad for the USP-6C package should be solder-plated in recommended mount pattern and metal masking so as to enhance mounting strength and heat release. If the pad needs to be connected to other pins, it should be connected to the VSS (No. 5) pin. ■PIN ASSIGNMENT PIN NUMBER 2/23 PIN NAME FUNCTION 4 RESETB Reset Output 2 5 VSS Ground 3 2 EN/ENB Watchdog ON/OFF Control 4 1 WD Watchdog 5 6 VIN Power Input - 3 NC No Connection SOT-25 USP-6C 1 XC6121/XC6122/XC6123/XC6124 Series ■PRODUCT CLASSIFICATION ●Selection Guide RESET OUTPUT SERIES EN/ENB PIN FUNCTION HYSTERESIS (EN/ENB INPUT LOGIC*, VDFL (RESETB) VDFH (RESET) XC6121 N-channel open drain - XC6122 N-channel open drain - Available: EN with Pull-Up Resistor XC6123 N-channel open drain - VDFL x 5% (TYP.) ENB with No Pull-Down Resistor XC6124 N-channel open drain - PULL-UP OR DOWN RESISTOR) EN with No Pull-Up Resistor ENB with Pull-Down Resistor * EN input logic: The watchdog function turns on when the EN pin becomes high level. * ENB input logic: The watchdog function turns on when the ENB pin becomes low level. ●Ordering Information XC6121①②③④⑤⑥-⑦(*1): N-channel Open Drain Output (RESETB), EN Pin: No Pull-Up Resistor XC6122①②③④⑤⑥-⑦(*1): N-channel Open Drain Output (RESETB), EN Pin: Pull-Up Resistor XC6123①②③④⑤⑥-⑦(*1): N-channel Open Drain Output (RESETB), ENB Pin: No Pull-Down Resistor XC6124①②③④⑤⑥-⑦(*1): N-channel Open Drain Output (RESETB), ENB Pin: Pull-Down Resistor DESIGNATOR DESCRIPTION SYMBOL A ① ② ③④ ⑤⑥-⑦ Release Delay Time Watchdog Timeout Period Detect Voltage Taping Type (*2) 3.13ms (TYP.) C 50ms (TYP.) D 100ms (TYP.) E 200ms (TYP.) F 400ms (TYP.) 2 50ms (TYP.) 3 100ms (TYP.) 4 200ms (TYP.) 5 400ms (TYP.) 6 1.6s (TYP.) 7 800ms (TYP.) 16 ~ 50 MR Packages DESCRIPTION MR-G ER Detect voltage ex.) 4.5V: ③⇒4, ④⇒5 SOT-25 SOT-25 (Halogen & Antimony free) USP-6C * Please set the release delay time shorter than or equal to the watchdog timeout period. ex.) XC6121D327MR or XC6121D627MR (*1) (*2) The “-G” suffix indicates that the products are Halogen and Antimony free as well as being fully RoHS compliant. The device orientation is fixed in its embossed tape pocket. For reverse orientation, please contact your local Torex sales office or representative. (Standard orientation: ⑤R-⑦, Reverse orientation: ⑤L-⑦) 3/23 XC6121/XC6122/XC6123/XC6124 Series ■BLOCK DIAGRAMS ●XC6121 Series N-ch Open Drain Output ●XC6122 Series N-ch Open Drain Output 4/23 XC6121/XC6122/XC6123/XC6124 Series ■BLOCK DIAGRAMS (Continued) ●XC6123 Series N-ch Open Drain Output ●XC6124 Series N-ch Open Drain Output 5/23 XC6121/XC6122/XC6123/XC6124 Series ■ABSOLUTE MAXIMUM RATINGS Ta = 25OC PARAMETER SYMBOL RATINGS Input Voltage VIN EN/ENB VSS -0.3 ~ 7.0 VSS-0.3∼VIN+0.3≦7.0 Output Current WD IOUT VSS -0.3 ~ 7.0 20 VSS -0.3 ~ 7.0 Output Voltage Power Dissipation RESETB SOT-25 USP-6C Operational Temperature Range Storage Temperature Range 6/23 Pd 250 100 Topr Tstg -40 ~ +85 -55 ~ +125 UNITS V V V mA V mW C C O O XC6121/XC6122/XC6123/XC6124 Series ■ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL Detect Voltage VDFL Hysteresis Width VHYS Supply Current (*1) ISS Operating Voltage VIN Output Current IRBOUT Temperature Characteristics △Topr・VDFL CONDITIONS MIN. TYP. VDFL(T) VDFL(T) EN=VSS,ENB=VIN × 0.98 VDFL VDFL × 0.02 × 0.05 VIN=VDFL(T)×0.9V 5 the WD Pin: VIN=VDFL(T)×1.1V 10 OPEN 12 VIN=6.0V 1.0 VIN=1.0V 0.15 0.5 VIN=2.0V (VDFL(T)> 2.0V) 2.0 2.5 N-ch. VDS = 0.5V VIN=3.0V (VDFL(T) >3.0V) 3.0 3.5 VIN=4.0V (VDFL(T) >4.0V) 3.5 4.0 △VDFL / -40OC < Topr < 85 OC Release Delay Time (VDFL<1.8V) tDR Time until VIN is increased from 1.0V to 2.0V and attains to the release time level, and the Reset output pin releases. Release Delay Time (VDFL>1.9V) tDR Time until VIN is increased from 1.0V to (VDFL x 1.1V) and attains to the release time level, and the Reset output pin releases. Detect Delay Time VDFL Leak Current Watchdog Timeout Period (VDFL<1.8V) Watchdog Timeout Period (VDFL>1.9V) Ta = 25 OC MAX. VDFL(T) × 1.02 VDFL × 0.08 11 16 18 6.0 - UNITS CIRCUIT V ① V ① ⎧A ② V ① mA ③ ppm/ OC ① ms ④ ms ④ - +100 - 2.00 37 75 150 300 2.00 37 75 150 300 3.13 50 100 200 400 3.13 50 100 200 400 5.00 63 125 250 500 5.00 63 125 250 500 tDF Time until VIN is decreased from 6.0V to 1.0V and attains to the detect voltage level, and the Reset output pin detects while the WD pin left open. - 5.5 33 ⎧s ④ ILEAK VIN=6.0V, RESETB=6.0V - 0.01 0.1 ⎧A ③ 37 75 150 300 600 1200 37 75 150 300 600 1200 50 100 200 400 800 1600 50 100 200 400 800 1600 63 125 250 500 1000 2000 63 125 250 500 1000 2000 ms ⑤ ms ⑤ tWD Time until VIN increases form 1.0V to 2.0V and the Reset output pin is released to go into the detection state. (WD=VSS) tWD Time until VIN increases from 1.0V to (VDFLx1.1V) and the Reset output pin is released to go into the detection state. (WD=VSS) 7/23 XC6121/XC6122/XC6123/XC6124 Series ■ELECTRICAL CHARACTERISTICS (Continued) PARAMETER SYMBOL Watchdog Minimum Pulse Width TWDIN Watchdog VWDH High Level Voltage Watchdog VWDL Low Level Voltage Watchdog RWD Pull-down Resistance EN/ENB VENH/VENBH High Level Voltage EN/ENB VENL/VENBL Low Level Voltage EN Pull-up REN (*2) Resistance ENB Pull-down RENB Resistance (*3) Ta = 25 OC CONDITIONS VIN=6.0V, Apply pulse from 6.0V to 0V to the WD pin. MIN. TYP. MAX. UNITS CIRCUIT 300 - - ns ⑥ VIN=VDFL x 1.1V ~ 6.0V VIN x 0.7 - 6 V ⑥ VIN=VDFL x 1.1V ~ 6.0V 0 - VIN x 0.3 V ⑥ VWD=6V, RWD=VWD/IWD 300 600 1000 kΩ ⑦ VIN=VDFL x 1.1V ~ 6.0V 1.3 - VIN V ⑧ VIN=VDFL x 1.1V ~ 6.0V 0 - 0.35 V ⑧ 1.0 1.6 2.4 MΩ ⑨ VIN=6.0V, EN=0V, REN=VIN / IEN VIN=6.0V, ENB=6V, RENB=VIN / IENB NOTE: *: In case where no EN/ENB pin’s condition written in the test condition field, EN=VIN and ENB=VSS. **: VDFL(T)=Setting detect voltage value *1: The condition when the watchdog pin is ON. The EN/ENB pin is CMOS input. For the XC6122 (pull-up resistor) and XC6124 (pull-down resistor), supply current increases in the following values when the watchdog function is OFF. XC6122 Series：（VIN-VEHL）/1.6MΩ（TYP） XC6124 Series：VEHBH/1.6MΩ（TYP） *2: For the XC6122 series only. *3: For the XC6124 series only. 8/23 XC6121/XC6122/XC6123/XC6124 Series ■OPERATIONAL EXPLANATION The XC6121/6122/6123/6124 series compare, using the error amplifier, the voltage of the internal voltage reference source with the voltage divided by R1, R2 and R3 connected to the VIN pin. The resulting output signal from the error amplifier activates the watchdog logic, delay circuit and the output driver. When the VIN pin voltage gradually falls and finally reaches the detect voltage, the RESETB pin output goes from high to low in the case of the VDFL type ICs. <RESETB / RESET Pin Output Signal> * VDFL (RESETB) type - output signal: Low when detected. The RESETB pin output goes from high to low whenever the VIN pin voltage falls below the detect voltage. The RESETB pin remains low for the release delay time (tDR) after the VIN pin voltage reaches the release voltage. If neither rising nor falling signals are applied to the WD pin within the watchdog timeout period, the RESETB pin output remains low for the release delay time (tDR), and thereafter the RESET pin outputs high level signal. <Hysteresis> When the internal comparator output is high, the NMOS transistor connected in parallel to R3 is turned ON, activating the hysteresis circuit. The difference between the release and detect voltages represents the hysteresis width, as shown by the following calculations: VDFL (detect voltage) = (R1+R2+R3) x Vref / (R2+R3) VDR (release voltage) = (R1+R2) x Vref / (R2) VHYS (hysteresis width) =VDR-VDFL (V) VDR > VDFL * Please refer to the block diagrams for R1, R2, R3 and Vref. * Hysteresis width is selectable from VDFL x 0.05V (TYP.). <Watchdog (WD) Pin> The series use a watchdog timer to detect malfunction or “runaway” of the microprocessor. If neither rising nor falling signals are applied from the microprocessor within the watchdog timeout period, the RESETB pin output maintains the detection state for the release delay time (tDR), and thereafter the RESETB pin outputs low to high signal. The watchdog pin is pulled down to the VSS internally. When the watchdog pin is not connected, A reset signal comes out after the watchdog timeout period. Six watchdog timeout period settings (tWD) are available in 1.6s, 800ms, 400ms, 200ms, 100ms, and 50ms. <EN Pin> In case where the watchdog function is not used, When the EN pin input driven to low level, only the watchdog function is forced off while the detect voltage circuit remains operation. For using the watchdog function, the EN pin should be used in high level. Even after the input voltage and the EN pin voltage are driven back high, the RESETB pin output maintains the detection state for the release delay time (TDR). (Refer to the TIMING CHART 1-①.) The watchdog function recovers immediately when the input voltage becomes higher than the release voltage and the EN pin voltage driven from low to high level. (Refer to the TIMING CHART 1-②.) A diode, which is an input protection element, is connected between the EN pin and VIN pin. Therefore, if the EN pin is applied voltage that exceeds VIN, the current will flow to VIN through the diode. For avoiding any damage to the IC, please use this IC within the stated maximum ratings (VSS -0.3 ~ VIN +0.3) on the EN pin. <ENB Pin> In case where the watchdog function is not used, when the ENB pin input driven to high level, only the watchdog function is forced off while the detect voltage circuit remains operation. For using the watchdog function, the ENB pin should be used in low level. Even after the input voltage and the ENB pin voltage are driven back low, the RESETB pin output maintains the detection state for the release delay time (tDR). (Refer to the TIMING CHART 2-①.) The watchdog function recovers immediately when the input voltage becomes higher than the release voltage and the ENB pin voltage driven from high to low level. (Refer to the TIMING CHART 2-②.) A diode, which is an input protection element, is connected between the ENB pin and VIN pin. Therefore, if the ENB pin is applied voltage that exceeds VIN, the current will flow to VIN through the diode. For avoiding any damage to the IC, please use this IC within the stated maximum ratings (VSS -0.3 ~ VIN +0.3) on the ENB pin. <Release Delay Time> Release delay time (tDR) is the time that elapses from when the VIN pin reaches the release voltage, or when the watchdog timeout period expires with no rising signal applied to the WD pin, until the RESETB pin output is released from the detection state. Five release delay time (tDR) watchdog timeout period settings are available in 400ms, 200ms, 100ms, 50ms, and 3.13ms. <Detect Delay Time> Detect Delay Time (tDF) is the time that elapses from when the VIN pin voltage falls to the detect voltage until the RESETB pin output goes into the detection state. 9/23 XC6121/XC6122/XC6123/XC6124 Series ■TIMING CHARTS 1. XC6121/XC6122 Series (EN products) ●N-ch Open Drain Output (Rpull=100kΩ) Hysteresis Width ●tDF (N-ch Open Drain Output, Rpull=100kΩ) 10/23 XC6121/XC6122/XC6123/XC6124 Series ■TIMING CHARTS (Continued) 2. XC6123/XC6124 Series (ENB products) ●N-ch Open Drain Output (Rpull=100kΩ) Hysteresis Width ●tDF (N-ch Open Drain Output, Rpull=100kΩ) 11/23 XC6121/XC6122/XC6123/XC6124 Series ■NOTES ON USE 1. Please use this IC within the stated maximum ratings. Operation beyond these limits may cause degrading or permanent damage to the device. 2. When a resistor is connected between the VIN pin and the input, the VIN voltage drops while the IC is operating and a malfunction may occur as a result of the IC’s through current. 3. In order to stabilize the IC’s operations, please ensure that the VIN pin’s input frequency’s rise and fall times are more than 1 μ s/V. 4. Noise at the power supply may cause a malfunction of the watchdog operation or the voltage detector. In such case, please strength the line between VIN and the GND pin and connect about 0.22μF of a capacitor between the VIN pin and the GND pin. 5. Protecting against a malfunction while the watchdog time out period, an ignoring time (no reaction time) occurs to the rise and fall times. Referring to the figure below, the ignoring time (no reaction time) lasts for 900μs at maximum. 6. The EN pin of the XC6121 series is not internally pulled up. When using the watchdog function, please drive the EN pin in high level. The EN pin of the XC6122 series is internally pulled up. The watchdog function can be used even the EN pin left open. The ENB pin of the XC6123 series is not internally pulled down. When using the watchdog function, please drive the ENB pin in low level. The ENB pin of the XC6124 series is internally pulled up. The watchdog function can be used even the ENB pin left open. 12/23 XC6121/XC6122/XC6123/XC6124 Series ■PIN LOGIC CONDITIONS PIN NAME LOGIC CONDITIONS H VIN>VDFL+VHYS L VIN<VDFL H L EN/ENB>1.30V EN/ENB<0.35V PIN NAME LOGIC H VIN EN/ENB WD L L→H H→L CONDITIONS The state maintaining WD>VWDH for more than TWD The state maintaining WD<VWDL for more than TWD VWDL→VWDH, 300ns≦TWDIN≦TWD VWDH→VWDL, 300ns≦TWDIN≦TWD NOTE: VDFL: Detect Voltage VHYS: Hysteresis Range VWDH: WD High Level Voltage VWDL: WD Low Level Voltage TWDIN: WD Pulse Width TWD: WD Timeout Period For the details of each parameter, please see the electrical characteristics. ■FUNCTION CHART VIN H XC6121/XC6122 EN H XC6123/XC6124 ENB L WD RESETB (*2) H L OPEN Repeating detect and release (H→L→H) L⇔H H L L H L *1 H H L NOTE: *1: Including all logics of the WD (WD=H, L, OPEN, H→L, L→H). *2: When the RESETB is High, the circuit is in the release state. When the RESETB is Low, the circuit is in the detection state. *3: VIN=L and EN/ENB=H can not be combined because the rated input voltage of the EN/ENB pin is Vss-0.3V to VIN+0.3V. *4: The RESETB pin becomes indefinite operation while 0.35V<EN/ENB<1.3V. *5: The EN pin of the XC6121 series is not internally pulled up. When using the watchdog function, please drive the EN pin in high level. The EN pin of the XC6122 series is internally pulled up. The watchdog function can be used even the EN pin left open. The ENB pin of the XC6123 series is not internally pulled down. When using the watchdog function, please drive the ENB pin in low level. The ENB pin of the XC6124 series is internally pulled up. The watchdog function can be used even the ENB pin left open. 13/23 XC6121/XC6122/XC6123/XC6124 Series ■TEST CIRCUITS Circuit ① Circuit ② Circuit ③ VDS=0.5V 14/23 XC6121/XC6122/XC6123/XC6124 Series ■TEST CIRCUITS (Continued) Circuit ④ Circuit ⑤ Circuit ⑥ 15/23 XC6121/XC6122/XC6123/XC6124 Series ■TEST CIRCUITS (Continued) Circuit ⑦ Circuit ⑧ Note: The above reference is about the EN logic operation. Circuit ⑨ Note: XC6122 series has EN pin, XC6124 Series has ENB pin. 16/23 XC6121/XC6122/XC6123/XC6124 Series ■TYPICAL PERFORMANCE CHARACTERISTICS （1.）Supply Current vs. Input Voltage XＣ６１２１～ＸＣ６１２４(VDF=１.６Ｖ） ＸＣ６１２１～ＸＣ６１２４(VDF=２.７Ｖ） 14.0 Ta=85℃ Ta=85℃ (μA) 12.0 10.0 Supply Current: I Supply Current: I 8.0 Ta=-40℃ 6.0 12.0 10.0 SS Ta=25℃ SS (μA) 14.0 4.0 2.0 0 8.0 Ta=25℃ Ta=-40℃ 6.0 4.0 2.0 0 0 1 2 3 4 Input Voltage: V IN (V) 5 6 0 1 2 3 4 Input Voltage: V IN (V) 5 6 ＸＣ６１２１～ＸＣ６１２４(VDF=５.０Ｖ） Ta=85℃ 12.0 10.0 Supply Current: I SS (μA) 14.0 Ta=25℃ 8.0 6.0 Ta=-40℃ 4.0 2.0 0 0 1 2 3 4 Input Voltage: V IN (V) 5 6 （2.）Detect, Release Voltage vs. Ambient Temperature ＸＣ６１２１～ＸＣ６１２４(VDF=２.７Ｖ） (V) 2.90 DF ,V DR V DR 1.65 Detect, Release Voltage: V Detect, Release Voltage: V DF ,V DR (V) ＸＣ６１２１～ＸＣ６１２４(VDF=１.６Ｖ） 1.70 1.60 V DF 1.55 V DR 2.80 2.70 V DF 2.60 -50 -25 0 25 50 75 Ambient Temperature: Ta (℃) 100 -50 -25 0 25 50 75 Ambient Temperature: Ta (℃) 100 17/23 XC6121/XC6122/XC6123/XC6124 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) （2.）Detect, Release Voltage vs. Ambient Temperature (Continued) Detect, Release Voltage: V DF ,V DR (V) ＸＣ６１２１～ＸＣ６１２４(VDF=５.０Ｖ） 5.30 V DR 5.20 5.10 5.00 V DF 4.90 -50 -25 0 25 50 75 Ambient Temperature: Ta (℃) 100 （4.）Driver Output Current vs. Input Voltage （3.）Nch Driver Output Current vs. VDS ＸＣ６１２１～ＸＣ６１２４ ＸＣ６１２１～ＸＣ６１２４ 6.0 30 (mA) 25 20 OUT V IN =5.0V VIN =4.0V Output Current: I (mA) OUT Output Current: I Ta=-40℃ V DS=0.5V Ta=25℃ 15 VIN =3.0V 10 VIN =2.0V 5 5.0 Ta=25℃ 4.0 Ta=85℃ 3.0 2.0 1.0 VIN =1.0V 0 0.0 0 1 2 3 V DS (V) 4 5 6 0 1 2 3 4 Input Voltage: V IN (V) 5 6 （5.）Release Delay Time vs. Ambient Temperature （例 ＸＣ６１２１～ＸＣ６１２４ ＸＣ６１２１～ＸＣ６１２４ 300 3000 DR （ms） 250 200 Release Delay Time T Release Delay Time T DR （ms） TDR=100mｓ 150 100 50 0 2000 1500 1000 500 0 -50 18/23 TDR=1600mｓ 2500 -25 0 25 50 75 Ambient Temperature: Ta (℃) 100 -50 -25 0 25 50 75 Ambient Temperature: Ta (℃) 100 XC6121/XC6122/XC6123/XC6124 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) （6.）Watchdog Timeout Period vs. Ambient Temperature ＸＣ６１２１～ＸＣ６１２４ ＸＣ６１２１～ＸＣ６１２４ 3000 300 T WD=1600mｓ WD (ms) WDTimeout Timeout Period Piriod TTWD WD （ms） WD (ms) WDTimeout Timeout Period Piriod TTWD WD （ms） TWD=100mｓ 250 200 150 100 50 2500 2000 1500 1000 500 0 0 -50 -25 0 25 50 75 Ambient Temperature: Ta (℃) 120 WD Timeout Timeout Period WD （ms） WD PeriodTTWD (ms) DR （ms） Release Delay Time T Ta=25℃ T DR=3.13mｓ 3.6 3.4 3.2 3.0 2.8 2.6 Ta=25℃ T WD=100mｓ 115 110 105 100 95 90 0 1 2 3 4 5 Input Voltage: V IN (V) 6 7 （9.）Watchdog Low Level Threshould vs. Ambient Temperature 0 ＸＣ６１２１～ＸＣ６１２４ WDL(V) WDH (V) WD Highlevel Threshold V 4.0 3.0 V IN =6.0V 2.0 V IN =3.0V 1.0 V IN =1.76V 0.0 2 3 4 5 Input Voltage: V IN (V) 6 7 ＸＣ６１２１～ＸＣ６１２４ 6.0 5.0 1 （10.）Watchdog High Level Threshould vs. Ambient Temperature 6.0 WD LowLevel Threshold V 100 ＸＣ６１２１～ＸＣ６１２４ （例 ＸＣ６１２１～ＸＣ６１２４ 4.0 3.8 -25 0 25 50 75 Ambient Temperature: Ta (℃) （8.）Watchdog Timeout Period vs. Input Voltage （7.）Release Delay Time vs. Input Voltage （例 -50 100 5.0 V IN =6.0V 4.0 3.0 V IN =3.0V 2.0 1.0 V IN =1.76V 0.0 -50 -25 0 25 50 75 Ambient Temperature: Ta (℃) 100 -50 -25 0 25 50 75 Ambient Temperature: Ta (℃) 100 19/23 XC6121/XC6122/XC6123/XC6124 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) WDpull-down Resistance R WD （ｋΩ) （11.）Watchdog Pull-Down Resistance vs. Ambient Temperature ＸＣ６１２１～ＸＣ６１２４ 1100 1000 900 800 700 600 500 400 300 -50 -25 0 25 50 75 Ambient Temperature: Ta (℃) 100 （12.）EN Pull-Up Resistance vs. Ambient Temperature （13.）ENB Pull-Down Resistance vs. Ambient Temperature ＸＣ６１２1～ＸＣ６１２２ （MΩ) 2.4 ENBpull-down Resistance R （MΩ) EN EN pull-up Resistance R 2.4 3.0 ENB ＸＣ６１２３～ＸＣ６１２４ 3.0 1.8 1.2 0.6 0.0 -50 -25 0 25 50 75 Ambient Temperature: Ta (℃) 1.8 1.2 0.6 0.0 -50 100 （14.）EN Ligh Level Voltage vs. Ambient Temperature ＸＣ６１２1～ＸＣ６１２２ ENH (V) V IN =6.0V 0.70 V IN =3.0V 0.60 V IN =1.76V 0.50 -50 -25 0 25 50 75 Ambient Temperature: Ta (℃) 100 EN Highlevel Threshold V E NL (V) EN LowLevel Threshold V 0.80 20/23 ＸＣ６１２１～ＸＣ６１２２ 1.10 0.90 100 （15.）EN High Level Voltage vs. Ambient Temperature 1.10 1.00 -25 0 25 50 75 Ambient Temperature: Ta (℃) 1.00 0.90 V IN =6.0V 0.80 V IN =3.0V 0.70 V IN =1.76V 0.60 0.50 -50 -25 0 25 50 75 Ambient Temperature: Ta (℃) 100 XC6121/XC6122/XC6123/XC6124 Series ■TYPICAL PERFORMANCE CHARACTERISTICS (Continued) （16.）ENB Low Level Voltage vs. Ambient Temperature （17.）ENB High Level Voltage vs. Ambient Temperature ＸＣ６１２３～ＸＣ６１２４ ENBH (V) 0.90 V IN =6.0V 0.70 V IN =3.0V 0.60 V IN =1.76V 0.50 ENB Highlevel Threshold V ENBL (V) ENB LowLevel Threshold V 1.00 0.80 ＸＣ６１２３～ＸＣ６１２４ 1.10 1.10 1.00 0.90 V IN =6.0V 0.80 V IN =3.0V 0.70 V IN =1.76V 0.60 0.50 -50 -25 0 25 50 75 Ambient Temperature: Ta (℃) 100 -50 -25 0 25 50 75 Ambient Temperature: Ta (℃) 100 21/23 XC6121/XC6122/XC6123/XC6124 Series ■ PACKAGING INFORMATION ●SOT-25 ●USP-6C Reference Pattern Layout 22/23 ●USP-6C ●USP-6C Reference Metal Mask Design XC6121/XC6122/XC6123/XC6124 Series 1. The products and product specifications contained herein are subject to change without notice to improve performance characteristics. Consult us, or our representatives before use, to confirm that the information in this datasheet is up to date. 2. We assume no responsibility for any infringement of patents, patent rights, or other rights arising from the use of any information and circuitry in this datasheet. 3. Please ensure suitable shipping controls (including fail-safe designs and aging protection) are in force for equipment employing products listed in this datasheet. 4. The products in this datasheet are not developed, designed, or approved for use with such equipment whose failure of malfunction can be reasonably expected to directly endanger the life of, or cause significant injury to, the user. (e.g. Atomic energy; aerospace; transport; combustion and associated safety equipment thereof.) 5. Please use the products listed in this datasheet within the specified ranges. Should you wish to use the products under conditions exceeding the specifications, please consult us or our representatives. 6. We assume no responsibility for damage or loss due to abnormal use. 7. All rights reserved. No part of this datasheet may be copied or reproduced without the prior permission of TOREX SEMICONDUCTOR LTD. 23/23