19-3078; Rev 0; 11/03 MAX1211 Evaluation Kit The MAX1211 evaluation kit (EV kit) is a fully assembled and tested circuit board that contains all the components for evaluating the MAX1211 and MAX1206–MAX1209 12-bit, analog-to-digital converters (ADCs). The MAX1211 accepts differential or single-ended analog input signals. The EV kit allows for evaluation of each ADC with both types of signals from one single-ended analog signal source. The digital output produced by the ADC can be easily captured with a user-provided high-speed logic analyzer or data-acquisition system. The EV kit operates from 2.0V and 3.3V power supplies. It includes circuitry that generates a differential clock signal from an AC signal provided by the user. The EV kit comes with the MAX1211 installed. Contact the factory for free samples of the pin-compatible MAX1206/MAX1207/MAX1208 or MAX1209 to evaluate these parts. Features ♦ Up to 65Msps Sampling Rate with the MAX1211 ♦ Low Voltage and Power Operation ♦ Fully Differential or Single-Ended Signal Input Configuration ♦ Differential or Single-Ended Clock Configuration ♦ On-Board Clock-Shaping Circuit with Variable Duty Cycle ♦ Also Evaluates MAX1206/MAX1207/MAX1208 and MAX1209 ♦ Fully Assembled and Tested Ordering Information Part Selection Table PART SPEED (Msps) APPLICATION MAX1206ETL* 40 Baseband sampling MAX1207ETL* 65 Baseband sampling MAX1208ETL* 80 Baseband sampling MAX1209ETL* 80 IF sampling MAX1211ETL 65 IF sampling PART TEMP RANGE MAX1211EVKIT 0°C to +70°C IC PACKAGE 40 Thin QFN Note: To evaluate the MAX1206/MAX1207/MAX1208 or MAX1209, request a free sample with the MAX1211 EV kit. *Future product—contact factory for availability. Component List DESCRIPTION DESIGNATION QTY 4 22µF ±20%, 10V tantalum capacitors (B case) AVX TAJB226M010 C32, C34, C39, C58 4 4.7µF ±20%, 6.3V X5R ceramic capacitors (0603) TDK C1608X5R0J475M 10 1.0µF ±20%, 10V X5R ceramic capacitors (0603) TDK C1608X5R1A105M C40, C41, C45, C47 0 Not installed (0603) C42, C43, C54 3 0.01µF ±20%, 25V X7R ceramic capacitors (0402) TDK C1005X7R1E103M C59 1 1.0µF ±20%, 6.3V X5R ceramic capacitor (0402) TDK C1005X5R0J105M C60 1 10µF ±20%, 6.3V X5R ceramic capacitor (0805) TDK C2012X5R0J106M D1 1 Dual Schottky diode (SOT23) Zetex BAS70-04 DESIGNATION QTY C1, C2, C7, C55 C3–C6, C8–C12, C56 C13, C15, C17, C21–C29, C33, C44, C50–C53, C57 19 C14, C16, C18, C19, C20, C38, C48, C49 0 C30, C31, C35, C36, C37, C61 6 0.1µF ±20%, 10V X5R ceramic capacitors (0402) TDK C1005X5R1A104M Not installed (0402) 2.2µF ±20%, 6.3V X5R ceramic capacitors (0603) TDK C1608X5R0J225M DESCRIPTION ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 Evaluates: MAX1211, MAX1206–MAX1209 General Description Evaluates: MAX1211, MAX1206–MAX1209 MAX1211 Evaluation Kit Component List (continued) DESIGNATION QTY DESCRIPTION J1 1 Dual-row, 40-pin header JU1, JU4 0 Not installed DESIGNATION QTY TP1–TP5 5 Test points (black) DESCRIPTION CLOCK4 0 Not installed (SMA) 4 SMA PC-mount connectors 1 Maxim MAX1211ETL (TQFN-40) U2 1 Low-voltage 16-bit register (48-pin TSSOP) Texas Instruments SN74AVC16374DGG JU2, JU5, JU6, JU9, JU10, JU11 6 Jumper, 3-pin headers CLOCK, AINP, AINN, ACOM JU7, JU8 2 Jumper, 2-pin headers U1 L1–L4 4 EMI filters Murata NFM41PC204F1H3B R1, R13–R24, R26, R32–R35 0 Not installed (0603) R2, R11, R12 0 Not installed (0402) U3 0 Not installed (5-pin SC70) R3, R4, R7, R8, R9, R30, R31 7 49.9Ω ±0.5% resistors (0603) U4 1 TinyLogic UHS buffer (5-pin SC70) Fairchild NC7SZ125P5 R5, R6 2 1.0kΩ ±5% resistors (0402) U5 0 Not installed (8-pin SO) R10 1 10kΩ potentiometer, 12 turn, 1/4in 1 TinyLogic dual UHS inverter (6-pin SC70) Fairchild NC7WZ04P6 1 51.1Ω ±1% resistor (0603) U6 RA1–RA4 4 220Ω ±5% resistor arrays Panasonic EXB-2HV-221J None 6 Shunts 1 MAX1211 PC board 2 1:1 RF transformers Mini-Circuits ADT1-1WT None T1, T2 T3 1 2:1 RF transformer Mini-Circuits T2-1T-KK81 R27 Component Suppliers SUPPLIER AVX PHONE FAX 843-946-0238 843-626-3123 Fairchild 888-522-5372 — Mini-Circuits 718-934-4500 718-332-4661 WEBSITE www.avxcorp.com www.fairchildsemi.com www.minicircuits.com Murata 770-436-1300 770-436-3030 www.murata.com Panasonic 714-373-7366 714-737-7323 www.panasonic.com TDK 847-803-6100 847-390-4405 www.component.tdk.com Zetex 631-543-7100 631-864-7630 www.zetex.com Note: Please indicate that you are using the MAX1211 when contacting these component suppliers. 2 _______________________________________________________________________________________ MAX1211 Evaluation Kit Recommended Equipment • DC power supplies: Digital (VLDUT) 2.0V, 50mA Logic (VL) 2.0V, 100mA Analog (VDUT) 3.3V, 250mA Clock (VCLK) 3.3V, 200mA • Signal generator with low phase noise and low jitter for clock input (e.g., HP 8662A, HP 8644B) • Signal generator for analog signal input (e.g., HP 8662A, HP 8644B) • Logic analyzer or data-acquisition system (e.g., HP 16500C, TLA621) • Analog bandpass filters (e.g., Allen Avionics, K&L Microwave) for input signal and clock signal • Digital voltmeter Procedure GND pad. 10) Connect a 2.0V, 50mA power supply to VLDUT. Connect the ground terminal of this supply to the GND pad. 11) If evaluating the single-ended clock mode, connect a 3.3V, 200mA power supply to VCLK. Connect the ground terminal of this supply to the corresponding GND pad. If evaluating the differential clock mode, short VCLK to GND. 12) Turn on the 3.3V power supplies. 13) Turn on the 2.0V power supplies. 14) Enable the signal generators. Set the clock signal generator for an output amplitude of 2VP-P or higher (10dBm or higher) and the frequency (f CLK ) to 65MHz. Set the analog input signal generators for an output amplitude of ≤1VP-P and to the desired frequency. The two signal generators should be synchronized to each other. Adjust the input signal level to overcome cable and bandpass filter losses. The MAX1211 EV kit is a fully assembled and tested surface-mount board. Follow the steps below for board operation. Do not turn on power supplies or enable signal generators until all connections are completed: 15) Enable the logic analyzer. 1) Verify that shunts are installed across pins 2-3 of jumpers JU2 (MAX1211 enabled) and JU6 (two's complement digital output), and across pins 1-2 of JU5 (differential clock input) and JU4 (fixed for MAX1211). The MAX1211 EV kit is a fully assembled and tested circuit board that contains all the components necessary to evaluate the performance of the MAX1211 and the MAX1206–MAX1209. Data generated by the MAX1211 is captured on a single 12-bit bus. The EV kit comes with the MAX1211 installed, which can be evaluated with a maximum clock frequency (fCLK) of 65MHz. The MAX1211 accepts differential or single-ended analog input signals and differential or single-ended clock signals. With the proper board configuration (as specified below), the ADC can be evaluated with both types of signals by supplying only one single-ended analog signal to the EV kit. The EV kit is designed as a four-layer PC board to optimize the performance of the MAX1211. For simple operation, the EV kit is specified to have 3.3V and 2.0V power supplies applied to analog and digital power planes, respectively. However, the digital plane can be operated down to 1.7V without compromising the board’s performance. The logic analyzer’s threshold must be adjusted accordingly. 2) Verify that shunts are installed across pins 2-3 of jumpers JU9 and JU10, and across pins 1-2 of JU11. 3) Connect the output of the 65MHz clock generator to the input of the clock bandpass filter. 4) Connect the output of the clock bandpass filter to the CLOCK SMA connector. 5) Connect the output of the analog signal generator to the input of the signal bandpass filter. 6) Connect the output of the signal bandpass filter to the AINP SMA connector. 7) Connect the logic analyzer to the square pin header (J1). See the Output Signal section for bit locations and J1 header designations. The system clock is available on pin J1-3. 16) Collect data using the logic analyzer. Detailed Description 8) Connect a 3.3V, 250mA power supply to VDUT. Connect the ground terminal of this supply to the corresponding GND pad. 9) Connect a 2.0V, 100mA power supply to VL. Connect the ground terminal of this supply to the _______________________________________________________________________________________ 3 Evaluates: MAX1211, MAX1206–MAX1209 Quick Start Evaluates: MAX1211, MAX1206–MAX1209 MAX1211 Evaluation Kit Access to the digital outputs is provided through connector J1. The 40-pin connector easily interfaces directly with a user-provided logic analyzer or data-acquisition system. The DAV output clock signal is available at pin J1-3 (CLK), which can be used to synchronize the output data to the logic analyzer. Power Supplies The MAX1211 EV kit requires separate analog and digital power supplies for best performance. Separate 3.3V power supplies are used to power the analog portion of the MAX1211 (VDUT) and the clock-shaping circuit (VCLK). To evaluate the clock-shaping circuit, 3.3V must be supplied to VCLK. When evaluating the differential clock, reduce interference from the unused clock-shaping circuit by shorting VCLK to GND. Separate 2.0V power supplies are used to power the digital portion of the MAX1211 (VLDUT) and the buffer/driver (VL). The digital portions of the EV kit operate with voltage supplies as low as 1.7V and as high as 3.6V. Clock The MAX1211 allows for either differential or singleended signals to drive the clock inputs. The MAX1211 EV kit supports both methods. In single-ended operation, the signal is applied to the ADC through a buffer (U6). In differential mode, an onboard transformer takes the single-ended analog input and generates a differential analog signal at the ADC’s input pins. MAX1211 Clock Input The MAX1211 is capable of accepting either differential or single-ended clock input signals. Jumper JU5 controls this feature. See Table 1 for jumper settings. Transformer-Coupled Clock A single-ended signal can be converted to a differential signal through transformer T3. In this mode, diode D1 limits the amplitude of the clock signal, thereby overdriving the CLOCK SMA input. This can increase the Table 1. MAX1211 Clock Input Settings (JU5) Clock-Shaping Circuit with Variable Duty Cycle An on-board, variable duty cycle, clock-shaping circuit generates a single-ended clock signal from an AC-coupled sine wave applied to the CLOCK SMA connector. Measure the clock signal at pin 2 of JU7 and adjust potentiometer R10 to obtain the desired duty cycle. See Table 2 for shunt positions. Input Signal The MAX1211 accepts differential or single-ended analog input signals. However, the EV kit requires only a single-ended analog input signal. Because the amplitude of the received signal at the ADC depends on the actual cable loss and bandpass filter loss; account for these losses when configuring the signal input generator. Direct-Connect Single-Ended Input To evaluate the MAX1211 with a single-ended input signal directly connected to the ADC input terminal, modify the EV kit as follows: 1) Remove transformers T1 and T2. 2) Remove resistor R3. 3) Short resistor R20. 4) Install a 0.1µF capacitor at the location designated by R14. 5) Connect the input signal source to AINP. MAX1211 Power-Down Jumper JU2 controls the power-down function of the MAX1211 only. Other ICs on the MAX1211 EV kit continue to draw quiescent current from the power supplies. See Table 3 for power-down jumper settings. Table 2. CLOCK SMA Drive Settings JUMPER SHUNT POSITION JU9 1-2 JU10 1-2 JU11 2-3 SHUNT POSITION MAX1211 CLKTYP PIN MAX1211 CLOCK INPUT JU9* 2-3 1-2* Connected to VLDUT Differential JU10* 2-3 2-3 Connected to GND Single ended JU11* 1-2 *Default configuration: JU5 (1-2). 4 slew rate of the differential signal, thereby reducing clock jitter. See Table 2 for clock-drive jumper settings. Ensure that jumper JU5 (see the MAX1211 Clock Input section) is set correctly. DESCRIPTION Single-ended clock mode (see the Clock-Shaping Circuit with Variable Duty-Cycle section) Differential lock mode; a singleended signal is converted to a differential signal that drives the MAX1211 clock inputs *Default configuration: JU9 (2-3), JU10 (2-3), JU11 (1-2). _______________________________________________________________________________________ MAX1211 Evaluation Kit Output Coding The digital output coding of the MAX1211 can be chosen to be either in two’s complement format or Gray code by configuring jumper JU6. See Table 4 for shunt positions. V R12 = R2 REFOUT -1 VREFIN Output Signal The MAX1211 features a 12-bit, parallel, CMOS-compatible output bus. The outputs of the ADC are fed into a buffer capable of driving large capacitive loads, which may be present at the logic analyzer connection. The outputs of the buffer are connected to a 40-pin header (J1), located on the right side of the EV kit, where the user can connect a logic analyzer or data-acquisition system. See Table 5 for bit locations of header J1. Evaluating the MAX1206–MAX1209 where: R2 = 10kΩ, ±1%. VREFOUT = 2.048V. VREFIN = desired REFIN voltage. Alternatively, resistors R12 and R2 can be opened, and the ADC's full-scale range can be set by applying a stable, low-noise, external voltage reference directly at the REFIN pad. Table 3. Power-Down Settings (JU2) To evaluate the MAX1206/MAX1207/MAX1208 or the MAX1209, remove IC U1 from the EV kit and install a free sample of the desired ADC. Table 4. Output Code Settings (JU6) SHUNT POSITION MAX1211 PD PIN MAX1211 POWER-DOWN STATUS SHUNT POSITION MAX1211 G/T PIN 1-2 Connected to VLDUT Powered down 1-2 Connected to VLDUT Digital output in Gray code 2-3* Connected to GND Normal operation 2-3* Connected to GND Digital output in two's complement *Default configuration: JU2 (2-3). OPERATION *Default configuration: JU6 (2-3). Table 5. Output Bit Locations (J1) CLOCK DOR BIT D11 BIT D10 BIT D9 BIT D8 BIT D7 BIT D6 BIT D5 BIT D4 BIT D3 BIT D2 BIT D1 BIT D0 J1-3 CLK J1-7 J1-11 J1-13 J1-15 J1-17 J1-19 J1-21 J1-23 J1-25 J1-27 J1-29 J1-31 J1-33 _______________________________________________________________________________________ 5 Evaluates: MAX1211, MAX1206–MAX1209 Reference Voltage The MAX1211 requires an input voltage reference at its REFIN pin to set the full-scale analog signal voltage input. The ADC has a stable on-chip voltage reference of 2.048V, which can be accessed at REFOUT. The EV kit was designed to use the on-chip voltage reference by shorting REFIN to REFOUT through resistor R12. The user can externally adjust the reference level, and hence the full-scale range, by cutting the trace-shorting resistor R12 and installing resistors at locations R2 and R12 (located on the board's component side). Calculate the resistor values using the following equation: _______________________________________________________________________________________ VL VLDUT GND 1 1 1 JU4 2 3 VDUT COM REFIN INP C7 22µF 10V C2 22µF 10V C1 22µF 10V C26 0.1µF INN C21 0.1µF C3 1.0µF R2 OPEN 6 3 5 2 TP3 39 38 C60 10µF 1 8 11 40 37 C12 1.0µF C52 0.1µF VL C4 1.0µF VLDUT VDUT R12 SHORT (PC TRACE) C44 0.1µF TP2 C17 0.1µF C29 0.1µF 1 JU2 2 3 VLDUT 3 3 C61 2.2µF C34 4.7µF TP1 C50 0.1µF 1 JU6 2 3 VLDUT C32 4.7µF C51 0.1µF 1 JU5 2 3 VLDUT 2 L3 2 L2 2 3 VDUT GND VCLK 1 REFIN REFOUT INN COM INP REFN REFP VDD CLKTYP G/T PD MAX1211 U1 VLDUT OVDD 2 L4 33 CLKN CLKP DOR D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 N.C. N.C. DAV 17 34 OVDD L1 VDD 12 VDD 13 VDD 14 VDD 15 VDD 36 7 GND 4 GND Figure 1. MAX1211 EV Kit Schematic (Sheet 1 of 2) 35 GND 16 GND 1 Y VCC 33 35 36 11 10 9 16 15 14 13 6 7 8 1 2 3 4 5 6 7 8 28 27 26 25 24 23 22 21 20 19 18 TP5 32 12 5 29 9 10 30 13 4 30 CLKN CLKP 220Ω 9 10 11 12 29 14 3 31 24 1 47 46 44 43 41 40 38 37 27 15 2 32 RA2 26 1OE 2OE 1D1 1D2 1D3 1D4 1D5 1D6 1D7 1D8 2D1 2D2 2D3 2D4 2D5 2D6 2D7 2D8 C5 1.0µF C56 1.0µF 16 220Ω RA1 VL VCLK 1 4 5 C55 22µF 10V JU1 CUT HERE U3 OPEN GND A OE TP4 3 2 1 3 GND A Y VCC U4 NC7SZ125 OE VL 3 2 1 U2 SN74AVC16374 4 GND 10 GND 15 GND 21 GND 1CLK 48 7 VCC 18 VCC 31 VCC 4 5 42 VCC 25 VL 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7 1Q8 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7 C8 1.0µF 13 12 11 10 9 16 15 14 13 12 11 10 9 4 5 6 7 8 1 2 3 4 5 6 7 8 19 17 16 14 13 12 11 9 8 6 5 3 2 C35 2.2µF CLKO 220Ω NC C23 0.1µF 14 3 20 DUT 15 2 22 RA4 16 220Ω RA3 1 C30 2.2µF VLDUT VL 23 CLKO C6 1.0µF 2Q8 2CLK 6 28 GND 34 GND 45 GND 39 GND VDUT NC NC NC C36 2.2µF C24 0.1µF C37 2.2µF J1-2 J1-4 J1-3 J1-1 J1-10 J1-9 J1-6 J1-12 J1-14 J1-16 J1-18 J1-20 J1-22 J1-24 J1-26 J1-28 J1-30 J1-32 J1-34 J1-36 J1-38 J1-40 J1-8 NC NC C15 0.1µF C11 1.0µF J1-5 J1 C31 2.2µF C10 1.0µF J1-7 J1-11 J1-13 J1-15 J1-17 J1-19 J1-21 J1-23 J1-25 J1-27 J1-29 J1-31 J1-33 J1-35 J1-37 J1-39 C13 0.1µF C9 1.0µF C25 0.1µF Evaluates: MAX1211, MAX1206–MAX1209 MAX1211 Evaluation Kit _______________________________________________________________________________________ R23 SHORT AINN C16 OPEN C38 OPEN R24 OPEN 4 3 T1 2 5 RESET CLK VBB CLK 6 R20 OPEN 1 3 4 2 1 R16 OPEN R15 SHORT R19 SHORT R11 OPEN R21 OPEN AINP R1 OPEN C14 OPEN C47 OPEN VEE 5 U5 OPEN 8 VCC Q Q R4 49.9Ω 0.5% R3 49.9Ω 0.5% 6 7 R32 SHORT R17 OPEN C20 OPEN CLKN R18 OPEN C19 OPEN CLKP 3 5 1 JU8 JU7 R13 OPEN T2 R14 OPEN 4 2 6 2 R33 OPEN 1 2 JU11 3 R 3 U6-B 1 2 JU9 3 4 L 3 1 C33 0.1µF C41 SHORT D1 C40 SHORT C59 1.0µF 2 C57 0.1µF ACOM R9 49.9Ω 0.5% R7 49.9Ω 0.5% 6 C58 4.7µF C27 0.1µF 5 U6-A 1 C53 0.1µF ACOM R34 SHORT C43 0.01µF R31 49.9Ω 0.5% R35 SHORT R30 49.9Ω 0.5% R22 SHORT C54 0.01µF R27 51.1Ω 1% R26 OPEN ACOM C39 4.7µF C42 0.01µF C28 0.1µF 1 2 3 COM T3 6 5 4 C45 OPEN 1 JU10 2 3 C49 OPEN C48 OPEN C22 0.1µF INN INP R8 49.9Ω 0.5% CLOCK R10 10kΩ R6 1kΩ R5 1kΩ VCLK Evaluates: MAX1211, MAX1206–MAX1209 CLOCK4 C18 OPEN VCLK VCLK MAX1211 Evaluation Kit Figure 1. MAX1211 EV Kit Schematic (Sheet 2 of 2) 7 Evaluates: MAX1211, MAX1206–MAX1209 MAX1211 Evaluation Kit Figure 2. MAX1211 EV Kit Component Placement Guide—Component Side 8 _______________________________________________________________________________________ MAX1211 Evaluation Kit Evaluates: MAX1211, MAX1206–MAX1209 Figure 3. MAX1211 EV Kit PC Board Layout—Component Side _______________________________________________________________________________________ 9 Evaluates: MAX1211, MAX1206–MAX1209 MAX1211 Evaluation Kit Figure 4. MAX1211 EV Kit PC Board Layout (Inner Layer 2)—Ground Planes 10 ______________________________________________________________________________________ MAX1211 Evaluation Kit Evaluates: MAX1211, MAX1206–MAX1209 Figure 5. MAX1211 EV Kit PC Board Layout (Inner Layer 3)—Power Planes ______________________________________________________________________________________ 11 Evaluates: MAX1211, MAX1206–MAX1209 MAX1211 Evaluation Kit Figure 6. MAX1211 EV Kit PC Board Layout—Solder Side 12 ______________________________________________________________________________________ MAX1211 Evaluation Kit Evaluates: MAX1211, MAX1206–MAX1209 Figure 7. MAX1211 EV Kit Component Placement Guide—Solder Side Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13 © 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.