oH V SC AV ER OM AI SIO PL LA N IA BL S NT E TISPPBL3 *R DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON MICROELECTRONICS SUBSCRIBER LINE INTERFACE CIRCUITS (SLIC) TISPPBL3 Programmable Protector Overvoltage Protection for listed SLICs SLIC †§ D Package (Top View) TISPPBL3 (Tip) ✓ PBL 3762A/2 (Gate) G PBL 3762A/4 ✓ PBL 3764A/4 ✓ PBL 3764A/6 ✓ PBL 3766 ✓ PBL 3766/6 ✓ PBL 3767 ✓ PBL 3767/6 ✓ PBL 3860A/1 ✓ PBL 3860A/6 ✓ PBL 386 10/2 ✓ PBL 386 11/2 ✓ PBL 386 14/2 ✓ A PBL 386 15/2 ✓ A PBL 386 20/2 ✓ PBL 386 21/2 ✓ PBL 386 30/2 ✓ PBL 386 40/2 ✓ PBL 386 50/2 ✓ PBL 386 61/2 ✓ PBL 386 65/2 ✓ PBL 387 10/1 ✓ NC (Ring) K2 2/10 µs 10/700 µs 10/1000 µs GR-1089-CORE ITU-T K.20, K.21, K.45 GR-1089-CORE 8 K1 (Tip) 2 9 A (Ground) 3 6 A (Ground) 4 5 K2 (Ring) MD6XANA Device Symbol K1 K1 G1,G2 K2 K2 Terminals K1, K2 and A correspond to the alternative line designators of T, R and G or A, B and C. The negative protection voltage is controlled by the voltage, VGG, applied to the G terminal. SD6XAEA High Voltage Capability Supports Battery Voltages Down to -150 V Specified 2/10 Impulse Limiting Voltage - Voltage-Time Envelope Guaranteed - Full -40 °C to 85 °C Temperature Range Rated for International Surge Wave Shapes Standard 1 NC - No internal connection Terminal typical application names shown in parenthesis § See Applications Information for earlier SLIC types. Wave Shape K1 ITSP A 100 40 30 Feed-Through Package Connections - Minimizes Inductive Wiring Voltages ............................................ UL Recognized Components How To Order Device Package TISPPBL3 D (8-pin Small-Outline) Carrier For Standard Termination Finish Order As For Lead Free Termination Finish Order As Embossed Tape Reeled TISPPBL3DR TISPPBL3DR-S Tube TISPPBL3D TISPPBL3D-S † Customers are advised to obtain the latest version of the relevant Ericsson Microelectronics SLIC information to verify, before placing orders, that the information being relied on is current. *RoHS Directive 2002/95/EC Jan 27 2003 including Annex Ericsson is a trademark of Telefonaktiebolaget LM Ericsson. OCTOBER 2000 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. TISPPBL3 Programmable Protector Description The TISPPBL3 is a dual forward-conducting buffered p-gate overvoltage protector. It is designed to protect the Ericsson Microelectronics SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. The TISPPBL3 limits voltages that exceed the referenced SLIC supply rail levels. The SLIC line driver section is typically powered by a negative voltage, VBat, in the region of -10 V to -90 V. The protector gate is connected to this negative supply. This references the protection (clipping) voltage to the negative supply voltage. As the protection voltage will track the negative supply voltage, the overvoltage stress on the SLIC is minimized. The TISPPBL3 buffered gate design reduces the loading on the SLIC supply during overvoltages caused by power cross and induction. Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC negative supply rail value. If sufficient current is available from the overvoltage, then the protector will crowbar into a low voltage ground referenced on-state condition. As the overvoltage subsides, the high holding current of the crowbar prevents d.c. latchup. These monolithic protection devices are fabricated in ion-implanted planar vertical power structures for high reliability and in normal system operation they are virtually transparent. The TISPPBL3 has an 8-pin plastic small-outline surface mount package, D suffix, and is a universal substitute for TISPPBL1D and TISPPBL2D devices. Absolute Maximum Ratings, -40 °C ≤ TA ≤ 85 °C (Unless Otherwise Noted) Rating Symbol Repetitive peak off-state voltage, VGK = 0 , -40 °C ≤ TJ ≤ 85 °C Repetitive peak gate-cathode voltage, VKA = 0 , - 40 °C ≤ TJ ≤ 85 °C Value Unit VDRM -170 V VGKRM -160 V Non-repetitive peak on-state pulse current (see Notes 1 and 2) 10/1000 µs (Telcordia GR-1089-CORE Issue 2, with Revision 1, February 1999) 5/310 µs (IT U-T K.20, K.21 & K.45, K.44 open-circuit voltage wave shape 10/700 µs) 30 ITSP 40 2/10 µs (Telcordia GR-1089-CORE Issue 2, with Revision 1, February 1999) A 100 Non-repetitive peak on-state current, 50/60 Hz, TA = 25 °C (see Notes 2 and 3) 100 ms 10 1s 5s 300 s 900 s 4.4 2.1 0.64 0.60 ITSM Non-repetitive peak gate current, 1/2 µs pulse, cathodes commoned (see Note 1) A I GSM 40 A Operating free-air temperature range TA -40 to +85 °C Junction temperature TJ -40 to +150 °C Storage temperature range Tstg -65 to +150 °C NOTES: 1. Initially, the protector must be in thermal equilibrium with -40 °C ≤ TJ ≤ 85 °C. The surge may be repeated after the device returns to its initial conditions. Above 85 °C, derate linearly to zero at 150 °C lead temperature. 2. These non-repetitive rated currents are peak values for either polarity. The rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both terminal pairs may have their rated current values applied simultaneously (in this case the Ground terminal current will be twice the rated current value of an individual terminal pair). 3. Values for VGG = -120 V. For values at other voltages see Figure 4. Above 25 °C, derate linearly to zero at 150 °C lead temperature. Recommended Operating Conditions See Figure 10 C1 Gate decoupling capacitor RSA RSB Series resistance for GR-1089-CORE first-level and second-level surge survival Series resistance for GR-1089-CORE first-level surge survival Series resistance for ITU-T recommendation K.20, K.21 and K.45 for coordination with a 400 V primary protector Min Typ 100 220 40 25 10 Max Unit nF Ω OCTOBER 2000 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. TISPPBL3 Programmable Protector Electrical Characteristics, -40 °C ≤ T A ≤ 85 °C (Unless Otherwise Noted) Parameter Test Conditions Max Unit TJ = -40 °C Min Typ -5 µA TJ = 85 °C -50 µA -120 V Off-state current VD = VDRM, VGK = 0 V(BO) Breakover voltage IT = -100 A, 2/10 generator, VGG = -100 V, Figure 3 test circuit (see Figure 2) t(BR) Breakdown time IT = -100 A, 2/10 generator, V (BR) < VGG, Figure 3 test circuit (see Figure 2 and Note 4) 1 µs VF Forward voltage I F = 5 A, tw = 500 µs 3 V VFRM Peak forward recovery voltage IF = 100 A, 2/10 generator, Figure 3 test circuit (see Figure 2 and Note 4) 8 V tFR Forward recovery time IF = 100 A, 2/10 generator, Figure 3 test circuit (see Figure 2 and Note 4) 1 10000 µs IH Holding current I T = -1 A, di/dt = 1A/ms, V GG = -50 V, ID VF > 5 V VF > 1 V -150 IGKS Gate reverse current VGG = VGK = VGKRM, VKA = 0 IGAT Gate reverse current, on state IT = -0.5 A, t w = 500 µs, VGG = -50 V, TA = 25 °C IGAF Gate reverse current, forward conducting state IF = 1 A, tw = 500 µs, VGG = -50 V, TA = 25 °C mA TJ = -40 °C -5 µA TJ = 85 °C -50 µA -1 mA -10 mA IGT Gate trigger current I T = -5 A, t p(g) ≥ 20 µs, VGG = -50 V, TA = 25 °C 5 mA VGT Gate trigger voltage I T = -5 A, t p(g) ≥ 20 µs, VGG = -50 V, TA = 25 °C 2.5 V VGK(BO) Gate impulse breakover voltage IT = -100 A, 2/10 generator, Figure 3 test circuit (see Figure 2 and Note 4) 20 V CAK Anode-cathode offstate capacitance f = 1 MHz, V d = 1 V, IG = 0, TA = 25 °C (see Note 5) VD = -3 V 110 pF VD = -50 V 60 pF NOTES: 4. The diode forward recovery and the thyristor gate impulse breakover (overshoot) are not strongly dependent of the SLIC supply voltage value (VGG ). 5. These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured device terminals are a.c. connected to the guard terminal of the bridge. Thermal Characteristics Parameter RθJA Junction to free air thermal resistance Test Conditions Ptot = 0.52 W, TA = 85 °C, 5 cm 2, FR4 PCB OCTOBER 2000 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. Min. Typ. Max. Unit 160 °C/W TISPPBL3 Programmable Protector Parameter Measurement Information PRINCIPAL TERMINAL V-I CHARACTERISTIC GATE TRANSFER CHARACTERISTIC +i +iK Quadrant I IFSP (= |I TSP |) Forward Conduction Characteristic IFSM (= |I TSM|) IF IF VF VGK(BO) VGG (Circuit VB ) -v IGT VD +v ID I(BO) +i G IGAF IH IS V(BO) -iG VT VS IGAT IT IT ITSM IG Quadrant III Switching Characteristic IK ITSP -i -iK PM6XAIB Figure 1. Principal Terminal And Gate Transfer Characteristics PROTECTOR MAXIMUM LIMITING VOLTAGE vs TIME 10 MAX VFRM = 8 V 5 1 µs 10 ms VOLTA GE - V 0 VGG Time VGG = VB 1 µs VGG -10 VGG -20 MAX V(BO) = VGG -20 V PM6XALC VGG -3 Figure 2. Transient Limits For TISPPBL3 2/10 Impulse Limiting Voltage OCTOBER 2000 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. TISPPBL3 Programmable Protector Parameter Measurement Information PARAMETER MEASUREMENT INFORMATION IMPULSE RS CURRENT 40 IT, IF Hi ECAT WITH E505 2/10 OUTPUT NETWORK Lo Th4 LIMITING VOLTAGE VK , VF DUT (TISPPBLx) Th5 RS = ONE SECTION OF A BOURNS 4B04B-523-400 OR A 4B04B-524-400 LINE FEED RESISTOR NETWORK IG VB (VGG ) C1 220 nF AI6XBACE Figure 3 TEST CIRCUIT FOR MEASUREMENT OF LIMITING VOLTAGE Thermal Information PEAK NON-RECURRING AC vs CURRENT DURATION I TSM — Peak Non-Recurrent 50 Hz Current — A 20 TI61AF RING AND TIP TERMINALS: Equal ITSM values applied simultaneously GROUND TERMINAL: Current twice ITSM value 15 10 8 7 6 5 4 EIA /JESD51 Environment and PCB, TA = 25 ° 3 VGG = -80 V VGG = - 60 V 2 1.5 1 0.8 0.7 0.6 0.5 0.01 VGG = -100 V VGG = -120 V 0.1 1 10 100 t — Current Duration — s Figure 4 OCTOBER 2000 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. 1000 TISPPBL3 Programmable Protector APPLICATIONS INFORMATION Operation of Gated Protectors The following SLIC circuit definitions are used in this data sheet: VBAT — Package pin label for the battery supply voltage. VBat — Voltage applied to the VBAT pin. VB — Negative power supply voltage applied to the VBAT pin via an isolation diode. This voltage is also the gate reference voltage, VGG, of the TISPPBL3. When the isolation diode, D1, is conducting, then VBat =VB + 0.7. The isolation diode, D1 in Figure 5, is to prevent a damaging current flowing into the SLIC substrate (VBAT pin) if the VBat voltage becomes more negative than the VB supply during a negative overvoltage condition. Each SLIC must have its own isolation diode from the VB voltage supply. (Maytum, M J, Enoksson, J & Rutgers, K, Coordination of overvoltage protection and SLIC capability, International IC - China Conference Proceedings 2000, pp. 87 - 97.) Figure 5 and Figure 6 show how the TISPPBL3 limits overvoltages. The TISPPBL3 thyristor sections limit negative overvoltages and the diode sections limit positive overvoltages. SLIC PROTECTION TISPPBLx Th4 SLIC PROTECTION TISPPBLx Th4 SLIC SLIC IT IF Th5 VB V Bat VB C1 D1 C2 AI6XANB Figure 5. Negative Overvoltage Condition Th5 VBat C1 D1 C2 AI6XAOB Figure 6. Positive Overvoltage Condition Negative overvoltages (Figure 5) are initially clipped close to the SLIC negative supply rail value (VB) by the conduction of the transistor baseemitter and the thyristor gate-cathode junctions. If sufficient current is available from the overvoltage, then the thyristor will crowbar into a low voltage ground referenced on-state condition. As the overvoltage subsides, the high holding current of the crowbar thyristor prevents d.c. latchup. The negative protection voltage will be the sum of the gate supply (VB) and the peak gate (terminal)-cathode voltage (VGK(BO) ). Under a.c. overvoltage conditions VGK(BO) will be less than 3 V. The integrated transistor buffer in the TISPPBL3 greatly reduces the gate positive current (from about 50 mA to 1 mA) and introduces a negative gate current. Figure 1 shows that the TISPPBL3 gate current depends on the current being conducted by the principal terminals. The gate current is positive during clipping (charging the VB supply) and negative when the thyristor is on or the diode is conducting (loading the VB supply). Without the negative gate current and the reduced level of positive gate current, the VB supply could be charged with a current of nearly 100 mA. The VB supply is likely to be electronic and would not be designed to be charged like a battery. As a result, the SLIC could be destroyed by the voltage of V B increasing to a level that exceeded the SLIC’s capability on the VBAT pin. The integrated transistor buffer removes this problem. Fast rising impulses will cause short term overshoots in gate-cathode voltage. The negative protection voltage under impulse conditions will also be increased if there is a long connection between the gate decoupling capacitor, C1, and the gate terminal. During the initial rise of a fast impulse, the gate current (IG ) is the same as the cathode current (IK). Rates of 60 A/µs can cause inductive voltages of 0.6 V in 2.5 cm of printed wiring track. To minimize this inductive voltage increase of protection voltage, the length of the capacitor to gate terminal tracking should be minimized. Inductive voltages in the protector cathode wiring can increase the protection voltage. These voltages can be minimized by routing the SLIC connection through the protector as shown in Figure 5 and Figure 6. Positive overvoltages (Figure 6) are clipped to ground by forward conduction of the diode section in the TISPPBL3. Fast rising impulses will cause short term overshoots in forward voltage (VFRM). OCTOBER 2000 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. TISPPBL3 Programmable Protector APPLICATIONS INFORMATION TISPPBL3 Limiting Voltages Figure 3 shows the basic test circuit used for the measurement of impulse limiting voltage. During the impulse, the high levels of electrical energy and rapid rates of change cause electrical noise to be induced or conducted into the measurement system. It is possible for the electrical noise voltage to be many times the wanted signal voltage. Elaborate wiring and measurement techniques were used to reduce the noise voltage to less than 2 V peak to peak. A Keytek ECAT E-Class series 100 with an E505 surge network was used for testing. The E505 produces a 2/10 voltage impulse. This particular waveform was used as it has the fastest rate of current rise (di/dt) of the rated lightning surge waveforms. This maximizes the measured limiting voltage. Initially, the 2/10 wavefront current rises at 60 A/µs; this rate then reduces as the peak current is approached. A large number of devices from different production runs were measured in the test circuit of Figure 3 over the rated temperature range. Statistical techniques were used to estimate the population 99.997% level (equal to 30 ppm) performance limits. SLIC Protection Requirements This clause discusses the voltage withstand capabilities of the various Ericsson Microelectronics SLIC groups and compares these to the TISPPBL3 protector parameters. The examples provided are intended to provide designers information on how the TISPPBL3 protector and specific SLICs work together. Designers should always follow the circuit design recommendations contained in the latest edition of an SLIC data sheet. Temperature Range Some SLICs are rated for 0 °C to 70 °C operation, others for -40 °C to 85 °C operation. The TISPPBL3 protector is specified for -40 °C to 85 °C operation and covers both temperature ranges. Normal Operation Depending on the SLIC type, the maximum SLIC supply voltage rating (VBat) will be -70 V, -80 V or -85 V. The -160 V rating of the TISPPBL3 gate-cathode (VGKRM) exceeds the highest SLIC voltage rating. To restore normal operation after the TISPPBL3 has switched on, the minimum switch-off current (holding current IH) needed is equal to the maximum SLIC short circuit current to ground (d.c. line current together with the maximum longitudinal current). Maximum TIPX and RINGX Terminal Ratings The withstand levels of an SLIC line drive amplifier TIPX and RINGX can be expressed in terms of maximum voltage for certain time periods. The negative voltage rating can be specified in two ways; relative to ground or relative to the SLIC negative supply voltage (VBat). The TIPX or RINGX voltage withstand levels for the current range of Ericsson SLICs falls into three groups, see Figure 7. The first group, headed by the PBL 3762A/2 SLIC, has a positive polarity d.c. withstand of +2 V. For 10 ms, the output can withstand a voltage of +5 V. For 1 µs, the output can withstand a voltage of +10 V. For 250 ns, the output is able to withstand a voltage of +15 V. In the negative polarity, the output can withstand VBat continuously. For 10 ms, the output can withstand a voltage of VBat - 20 V. For 1 µs, the output can withstand a voltage of VBat - 40 V. For 250 ns, the output is able to withstand a voltage of VBat -70 V. The second group, headed by the PBL 3766 SLIC, has a positive polarity d.c. withstand of +0.5 V. For 10 ms, 1 µs and 250 ns the withstand voltage is the same as the PBL 3762A/2 group. In the negative polarity, the withstand voltage of the PBL 3766 group is the same as the PBL 3762A/2 group. OCTOBER 2000 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. TISPPBL3 Programmable Protector APPLICATIONS INFORMATION Maximum TIPX and RINGX Terminal Ratings (continued) PART NUMBER MAXIMUM VOLTAGE RATINGS d.c. V BAT & +2 V, < 10 ms V BAT -20 V & +5 V, < 1 µs V BAT -40 V & +10 V, < 250 ns V BAT -70 V & +15 V TIPX or RINGX Voltage - V PBL 3762A/2 PBL 3762A/4 PBL 3764A/4 PBL 3764A/6 PBL 3860A/1 PBL 3860A/6 PBL 386 10/2 PBL 386 11/2 PBL 386 14/2 PBL 386 15/2 PBL 386 61/2 PBL 386 65/2 PBL 387 10/1 15 10 5 0 Time 10 ms 1 µs 0.25 µs VBat VBat - 10 VBat - 20 VBat - 30 VBat - 40 VBat - 50 TIPX or RINGX VOLTAGE RATING vs TIME VBat - 60 (NEGATIVE RATING RELATIVE TO VBat ) VBat - 70 AI6XDBAA d.c. V BAT & +0.5 V, < 10 ms V BAT -20 V & +5 V, < 1 µs V BAT -40 V & +10 V, < 250 ns V BAT -70 V & +15 V TIPX or RINGX Voltage - V PBL 3766 PBL 3766/6 PBL 3767 PBL 3767/6 15 10 5 0 Time 10 ms 1 µs 0.25 µs VBat VBat - 10 VBat - 20 VBat - 30 VBat - 40 VBat - 50 TIPX or RINGX VOLTAGE RATING vs TIME VBat - 60 (NEGATIVE RATING RELATIVE TO VBat ) VBat - 70 d.c. -80 V & +2 V, < 10 ms V BAT -10 V & +5 V, < 1 µs V BAT -25 V & +10 V, < 250 ns V BAT -35 V & +15 V TIPX or RINGX Voltage - V PBL 386 20/2 PBL 386 21/2 PBL 386 30/2 PBL 386 40/2 PBL 386 50/2 AI6XDBAB 15 10 5 0 Time 10 ms 1 µs 0.25 µs VBat - VBat - 10 VBat - 20 VBat - 30 VBat - 40 TIPX or RINGX VOLTAGE RATING vs TIME (NEGATIVE IMPULSE RATING RELATIVE TO VBat ) AI6XDBAC Figure 7. TIPX And RINGX Rated Values OCTOBER 2000 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. TISPPBL3 Programmable Protector APPLICATIONS INFORMATION Maximum TIPX and RINGX Terminal Ratings (continued) The third group, headed by the PBL 386 20/2 SLIC, has the same positive polarity withstand as the PBL 3762A/2 group. In the negative polarity, the output can withstand -80 V continuously. For 10 ms, the output can withstand a voltage of VBat - 10 V. For 1 µs, the output can withstand a voltage of VBat - 25 V. For 250 ns, the output is able to withstand a voltage of VBat -35 V. Protection Requirements To Cover All SLICs To protect all SLICs, the TISPPBL3 protector must limit the voltage to the lowest withstand levels of the three SLIC groups shown in Figure 7. Figure 8 shows that this will be the positive polarity rating of the PBL 3766 group and the negative rating of the PBL 386 20/2 group. 40 SLIC GROUP VOLTAGE RATINGS vs TIME 30 20 PBL 3766 GROUP PBL3762A/2 AND PBL386 20/2 GROUPS 10 Voltage - V 0 10 ms Time 1 µs 0.25 µs VBat VBat - 10 VBat - 20 VBat - 30 PBL 386 20/2 GROUP VBat - 40 VBat - 50 VBat - 60 VBat - 70 PBL3762A/2 AND PBL3766 GROUPS AI6XBDD Figure 8. SLIC Voltage Ratings TISPPBL3 Voltage Limiting Performance Figure 9 shows how the TISPPBL3 protection voltages compare to the minimum voltage withstands of Figure 8. The two shaded areas represent the positive and negative maximum limiting voltage levels of the TISPPBL3 from Figure 2. The isolation diode voltage drop displaces the TISPPBL3 negative limiting voltage 1 µs, -20 V pulse area by -0.7 V from VBat. So the actual negative limiting voltage is -20.7 V relative to VBat. This value does not exceed any part of the SLIC minimum negative voltage ratings. Any negative voltage disturbance in the VB supply caused by TISPPBL3 gate current will be tracked in VBat by conduction of the isolation diode D1. So a negative going change in VB does not substantially increase the TIPX and RINGX voltage stress relative to VBat. However, the absolute value of VBat with respect to ground must be kept within the data sheet rating. In the positive polarity, the TISPPBL3 limits the maximum voltage to 8 V in a 1 µs period and between 1 V and 5 V for a 10 ms period. These values do not exceed any of the SLIC minimum positive voltage ratings. The TISPPBL3 supports negative supply voltages (VB) down to -150 V. In addition, there are maximum cathode overshoot voltages of -20 V and +8 V. These conditions require the TISPPBL3 to have an off-state rated voltage, VDRM , of -170 V (-150 + -20 = -170) and a gate-cathode rated voltage, VGKRM, of -160 V (-150 - +8 = -158) over the temperature range. OCTOBER 2000 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. TISPPBL3 Programmable Protector APPLICATIONS INFORMATION TISPPBL3 Voltage Limiting Performance (continued) 40 SLIC MINIMUM VOLTAGE WITHSTAND AND TISPPBL3 VOLTA GE LIMITING vs TIME 30 20 10 TISPPBL3 Voltage - V 0 Time 10 ms 1 µs 0.25 µs VBAT 0.7 V ISOLATION DIODE (D1) VOLTAGE DROP FROM V Bat TISPPBL3 VBAT - 10 VBAT - 20 VBAT - 30 AI6XDF VBAT - 40 Figure 9. SLIC Voltage Ratings And TISPPBL3 Protection Levels Application Circuit Figure 10 shows a typical TISPPBL3 SLIC card protection circuit. The incoming line conductors, R and T, connect to the relay matrix via the series overcurrent protection (RSA and RSB). Fusible resistors, fuses and positive temperature coefficient (PTC) thermistors can be used for overcurrent protection. Normally, the SLIC reference designs recommend using 40 Ω matched fusible resistors, such as the Bourns 2x40 Ω, 2 % tolerance, 0.5 % matched 4B04B-523-400 or the 4B04B-524-400 with a thermal fuse. These resistors will reduce the prospective current from the surge generator for both the TISPPBL3 and the ring/test protector. The TISP7xxxF3 protector has the same protection voltage for any terminal pair. This protector is used when the ring generator configuration may be ground or battery-backed. For dedicated ground-backed ringing generators, the TISP3xxxF3 gives better protection as its inter-conductor protection voltage is twice the conductor to ground value. Relay contacts 3a and 3b connect the line conductors to the SLIC via the TISPPBL3 protector. Closing contacts 3a and 3b connects the TISPPBL3 protector in parallel with the ring/test protector. As the ring/test protector requires much higher voltages than the TISPPBL3 to operate, it will only operate when the contacts 3a and 3b are open. Both protectors will divert the same levels of peak surge current, and their required current ratings should be similar. The TISPPBL3 protector gate reference voltage comes from the SLIC negative supply feed (VB). A local gate capacitor, C1, sources the gate current pulses caused by fast rising impulses. OCTOBER 2000 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. TISPPBL3 Programmable Protector APPLICATIONS INFORMATION SERIES RESISTANCE T WIRE RSB TEST RELAY RING RELAY Th1 RSA (INCLUDES OVER CURRENT PROTECTION) R WIRE RING/TEST PROTECTION SLIC PROTECTION Th4 S3a S1a Th3 SLIC RELAY S2a SLIC Th2 Th5 S3b TISP 3xxxF3 OR 7xxxF3 S1b S2b TISP PBL3 VB TEST EQUIPMENT RING GENERATOR V Bat C1 D1 C2 AI6XAP EB Figure 10. Typical Application Circuit Earlier Protection and SLIC Recommendations The table below lists the combined SLIC and protection recommendations from earlier releases of the Ericsson Microelectronics AB SLICs. The TISPPBL3 is a functional replacement for the TISPPBL1 and the TISPPBL2. SLIC TISPPBL1 TISPPBL2 ✓ PBL 3796 < 55 mA‡ PBL 3796/2 < 55 mA‡ ✓ PBL 3798 < 55 mA‡ ✓ ✓ PBL 3798/2 < 55 mA‡ ✓ PBL 3798/5 < 55 mA‡ ✓ ✓ PBL 3798/6 ✓ PBL 3799 ✗ ✓ ✗ PBL 3799/2 ✓ ✓ PBL 386 20/1 ¶ ✓ PBL 386 21/1 ¶ ✓ ✓ PBL 386 30/1 ¶ ✓ ✓ ✓ PBL 386 40/1 ¶ ✓ ✓ PBL 386 50/1 ¶ ¶ Product Change Notification 109 21-PBL 386 xx/1-1 Uen of 06-06-1999 improved the silicon design of the PBL 386 20/1, PBL 386 21/1, PBL 386 30/1, PBL 386 40/1 and PBL 386 50/1. These improved devices are designated by a /2 as PBL 386 20/2, PBL 386 21/2, PBL 386 30/2, PBL 386 40/2 and PBL 386 50/2 respectively. ‡ Use TISPPBL2 when programmed line current is above 55 mA. OCTOBER 2000 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. TISPPBL3 Programmable Protector MECHANICAL DATA Device Symbolization Code Devices will be coded as follows: Device Symbolization Code TISPPBL3 SPPBL3 OCTOBER 2000 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. TISPPBL3 Programmable Protector MECHANICAL DATA D008 Plastic Small-outline Package This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly. D008 8-pin Small Outline Microelectronic Standard Package MS-012, JEDEC Publication 95 4.80 - 5.00 (0.189 - 0.197) 5.80 - 6.20 (0.228 - 0.244) 8 7 6 5 1 2 3 4 INDEX 3.81 - 4.00 (0.150 - 0.157) 1.35 - 1.75 (0.053 - 0.069) 0.25 - 0.50 x 45 ° N0M (0.010 - 0.020) 7 ° NOM 3 Places 0.102 - 0.203 (0.004 - 0.008) 0.28 - 0.79 (0.011 - 0.031) DIMENSIONS ARE: NOTES: A. B. C. D. 0.36 - 0.51 (0.014 - 0.020) 8 Places Pin Spacing 1.27 (0.050) (see Note A) 6 places 4.60 - 5.21 (0.181 - 0.205) 4°±4° 7 ° NOM 4 Places 0.190 - 0.229 (0.0075 - 0.0090) 0.51 - 1.12 (0.020 - 0.044) MILLIMETERS (INCHES) Leads are within 0.25 (0.010) radius of true position at maximum material condition. Body dimensions do not include mold flash or protrusion. Mold flash or protrusion shall not exceed 0.15 (0.006). Lead tips to be planar within ±0.051 (0.002). OCTOBER 2000 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. MDXX AAC TISPPBL3 Programmable Protector MECHANICAL DATA D008 Tape DImensions D008 Package (8-pin Small Outline) Single-Sprocket Tape 3.90 - 4.10 (.154 - .161) 1.50 - 1.60 (.059 - .063) 1.95 - 2.05 (.077 - .081) 7.90 - 8.10 (.311 - .319) 0.40 (0.016) 0.8 MIN. (0.03) 5.40 - 5.60 (.213 - .220) 6.30 - 6.50 (.248 - .256) ø Carrier Tape Embossment DIMENSIONS ARE: 1.50 MIN. (.059) 11.70 - 12.30 (.461 - .484) Cover 0 MIN. Tape Direction of Feed 2.0 - 2.2 (.079 - .087) MILLIMETERS (INCHES) NOTES: A. Taped devices are supplied on a reel of the following dimensions:Reel diameter: MDXXATB 330 +0.0/-4.0 (12.992 +0.0/-.157) Reel hub diameter: 100 ± 2.0 (3.937 ± .079) Reel axial hole: 13.0 ± 0.2 (.512 ± .008) B. 2500 devices are on a reel. “TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office. “Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries. OCTOBER 2000 - REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.