Revised May 1999 74VHC221A Dual Non-Retriggerable Monostable Multivibrator General Description Limits for Rx and Cx are: The VHC221A is an advanced high speed CMOS Monostable Multivibrator fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Each multivibrator features both a negative, A, and a positive, B, transition triggered input, either of which can be used as an inhibit input. Also included is a clear input that when taken LOW resets the one-shot. The VHC221A can be triggered on the positive transition of the clear while A is held LOW and B is held HIGH. The VHC221A is non-retriggerable, and therefore cannot be retriggered until the output pulse times out. The output pulse width is determined by the equation: PW = (Rx)(Cx); where PW is in seconds, R is in ohms, and C is in farads. External capacitor, Cx: No limit External resistors, Rx: VCC= 2.0V, 5 kΩ min VCC > 3.0V, 1 kΩ min An input protection circuit ensures that 0 to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. Features ■ High Speed: tPD = 8.1 ns (typ) at VCC = 5V ■ Low Power Dissipation: ICC = 4 µA (Max) at TA = 25°C ■ Active State: ICC = 600 µA (Max) at TA = 25°C ■ High Noise Immunity: VNIH = VNIL = 28% VCC (min) ■ Power down protection is provided on all inputs ■ Pin and function compatible with 74HC221A Ordering Code: Order Number Package Number 74VHC221AM 74VHC221ASJ 74VHC221AMTC 74VHC221AN Package Description M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MTC16 N16E 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC © 1999 Fairchild Semiconductor Corporation DS011680.prf www.fairchildsemi.com 74VHC221A Dual Non-Retriggerable Monostable Multivibrator April 1994 74VHC221A Truth Table Inputs H H X L H H L L H = HIGH Voltage Level L = LOW Voltage Level X: Don’t Care Outputs B A X X H X CLR Q Q L H H L H H L L H Function Output Enable Inhibit Inhibit Output Enable Output Enable Reset = HIGH-to-LOW Transition = LOW-to-HIGH Transition Block Diagrams Note A: Cx, Rx, Dx are external Capacitor, Resistor, and Diode, respectively. Note B: External clamping diode, Dx; External capacitor is charged to VCC level in the wait state, i.e. when no trigger is applied. If the supply voltage is turned off, Cx discharges mainly through the internal (parasitic) diode. If Cx is sufficiently large and VCC drops rapidly, there will be some possibility of damaging the IC through in rush current or latch-up. If the capacitance of the supply voltage filter is large enough and VCC drops slowly, the in rush current is automatically limited and damage to the IC is avoided. The maximum value of forward current through the parasitic diode is mined as follows: ±20 mA. In the case of a large Cx, the limit of fall time of the supply voltage is deter- tf ≥ (VCC −0.7) Cx/20 mA (tf is the time between the supply voltage turn off and the supply voltage reaching 0.4 VCC) In the event a system does not satisfy the above condition, an external clamping diode (Dx) is needed to protect the IC from rush current. System Diagram www.fairchildsemi.com 2 74VHC221A Timing Chart Functional Description Upon triggering, output Q becomes HIGH, following some delay time of the internal F/F and gates. It stays HIGH even if the voltage of Rx/Cx changes from falling to rising. When Rx/Cx reaches the internal reference voltage VrefH, the output of C2 becomes LOW, the output Q goes LOW and C2 stops its operation. That means, after triggering, when the voltage level of the Rx/Cx node reaches VrefH, the IC returns to its MONOSTABLE state. 1. Stand-by State The external capacitor (Cx) is fully charged to VCC in the Stand-by State. That means, before triggering, the QP and QN transistors which are connected to the Rx/ Cx node are in the off state. Two comparators that relate to the timing of the output pulse, and two reference voltage supplies turn off. The total supply current is only leakage current. 2. Trigger Operation With large values of Cx and Rx, and ignoring the discharge time of the capacitor and internal delays of the IC, the width of the output pulse, t W (OUT), is as follows: Trigger operation is effective in any of the following three cases. First, the condition where the A input is LOW, and B input has a rising signal; second, where the B input is HIGH, and the A input has a falling signal; and third, where the A input is LOW and the B input is HIGH, and the CLR input has a rising signal. tW (OUT) = 1.0 Cx Rx 3. Reset Operation After a trigger becomes effective, comparators C1 and C2 start operating, and QN is turned on. The external capacitor discharges through QN. The voltage level at the Rx/Cx node drops. If the Rx/Cx voltage level falls to the internal reference voltage VrefL, the output of C1 becomes LOW. The flip-flop is then reset and QN turns off. At that moment C1 stops but C2 continues operating. After QN turns off, the voltage at the Rx/Cx node starts rising at a rate determined by the time constant of external capacitor Cx and resistor Rx. In normal operation, the CLR input is held HIGH. If CLR is LOW, a trigger has no affect because the Q output is held LOW and the trigger control F/F is reset. Also, Qp turns on and Cx is charged rapidly to VCC . This means if CLR is set LOW, the IC goes into a wait state. 3 www.fairchildsemi.com 74VHC221A Absolute Maximum Ratings(Note 1) Supply Voltage (VCC ) −0.5V to +7.0V DC Input Voltage (VIN) −0.5V to +7.0V Recommended Operating Conditions (Note 2) 2.0V to +5.5V Supply Voltage (VCC) −0.5 to VCC +0.5V DC Output Voltage (VOUT) 0V to +5.5V Input Voltage (VIN) Input Diode Current (IIK) −20 mA Output Voltage (VOUT ) Output Diode Current (IOK) ±20 mA Operating Temperature DC Output Current (IOUT) ±25 mA DC VCC/Current (ICC) ±50 mA −40° to +85°C (Topr) Input Rise and Fall Time −65°C to 150°C Storage Temperature (TSTG) 0V to VCC (tr, tf) (CLR only) VCC = 3.3V ±0.3V Lead Temperature (TL) Soldering, 10 seconds 0 ∼ 100 ns/V VCC = 5.0V ±0.5V 260°C 0 ∼ 20 ns/V External Capacitor - Cx No Limitation (Note 3) F >5 kΩ (Note 3) (VCC = 2.0V) External Resistor - Rx >1 kΩ (Note 3) (VCC > 3.0V) Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommended operation outside data book specifications. Note 2: Unused inputs must be used HIGH or LOW. They may not float. Note 3: The maximum allowable values of Cx and Rx are a function of the leakage of capacitor Cx, the leakage of the device, and leakage due to board layout and surface resistance. Susceptibility to externally induced noise signals may occur for Rx> 1 MΩ. DC Electrical Characteristics Symbol VIH Parameter HIGH Level Input Voltage VIL LOW Level Input Voltage VOH VOL VCC (V) TA = 25°C Min Typ TA = −40° to 85°C Max Min 2.0 1.50 1.50 3.0 − 5.5 0.7 VCC 0.7 VCC Max 2.0 0.50 0.50 0.3 VCC 0.3 VCC 2.0 1.9 2.0 1.9 Output Voltage 3.0 2.9 3.0 2.9 4.5 4.4 4.5 3.0 2.58 2.48 4.5 3.94 3.80 Conditions V 3.0 − 5.5 HIGH Level Units V VIN = VIH IOH = −50 µA V or VIL 4.4 IOH = −4 mA V IOH = −8 mA LOW Level 2.0 0.0 0.1 0.1 VIN = VIH IOL = 50 µA Output Voltage 3.0 0.0 0.1 0.1 or VIL 4.5 0.0 IIN Input Leakage Current IIN Rx/Cx Terminal 0.1 0.1 3.0 0.36 0.44 V 4.5 0.36 0.44 0 − 5.5 ±0.1 ±1.0 µA VIN = 5.5V or GND 5.5 ±0.25 ±2.50 µA VIN = VCC or GND µA IOL = 4 mA IOL = 8 mA Off-State Current ICC Quiescent Supply Current 5.5 4.0 40.0 ICC Active—State (Note 4) 3.0 160 250 280 Supply Current 4.5 380 500 650 5.5 560 750 975 Note 4: Per Circuit www.fairchildsemi.com 4 VIN = VCC or GND VIN = VCC or GND µA Rx/Cx = 0.5 VCC Symbol Parameter tPLH Propagation Delay Time tPHL (A, B–Q, Q) tPLH Propagation Delay Time tPHL (CLR Trigger—Q, Q) VCC (V) TA = 25°C Min 3.3 ± 0.3 Propagation Delay Time tPHL (CLR—Q, Q) Output Pulse Width Max Units CL = 15 pF 1.0 24.0 24.1 1.0 27.5 CL = 50 pF 5.0 ± 0.5 8.1 12.0 1.0 14.0 CL = 15 pF 9.6 14.0 1.0 16.0 3.3 ± 0.3 14.5 22.4 1.0 26.0 17.0 25.9 1.0 29.5 8.7 12.9 1.0 15.0 10.2 14.9 1.0 17.0 10.3 15.8 1.0 18.5 12.8 19.3 1.0 22.0 6.3 9.4 1.0 11.0 7.8 11.4 1.0 13.0 3.3 ± 0.3 2.0 415 3.3 ± 0.3 345 5.0 ± 0.5 312 ns Conditions 20.6 ns ns ns ns ns CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CX = 28 pF ns 3.3 ± 0.3 160 240 300 5.0 ± 0.5 133 200 240 90 100 110 3.3 ± 0.3 ∆twOUT Min 13.4 5.0 ± 0.5 tWOUT Max 15.9 5.0 ± 0.5 tPLH TA = −40°C to +85°C Typ 90 110 5.0 ± 0.5 90 100 110 90 110 3.3 ± 0.3 0.9 1.0 1.1 0.9 1.1 5.0 ± 0.5 0.9 1.0 1.1 0.9 1.1 ns µs ms CL = 50 pF RX = 6 kΩ CL = 50 pF Cx = 28 pF Rx = 2 kΩ CL = 50 pF Cx = 0.01 µF Rx = 10 kΩ CL = 50 pF Cx = 0.1 µF Rx = 10 kΩ Output Pulse Width Error ±1 Between Circuits % (In same Package) CIN Input Capacitance 4 CPD Power Dissipation 73 10 10 pF VCC = Open pF (Note 5) Capacitance Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr.) = CPD*VCC*fIN+ I CC1*Duty/100 + ICC/2 (per Circuit) ICC1: Active Supply Current Duty: % Note 6: Refer to 74VHC221A Timing Chart. AC Operating Requirement Symbol Parameter TA = 25°C VCC (V) Min Typ TA = −40°C to +85°C Max Min tW(L) Minimum Trigger 3.3 5.0 5.0 tW(H) Pulse Width 5.0 5.0 5.0 Minimum Clear 3.3 5.0 5.0 Pulse Width 5.0 5.0 5.0 tW(L) 5 Max Units ns ns www.fairchildsemi.com 74VHC221A AC Electrical Characteristics (Note 6) 74VHC221A Device Characteristics twout*Cx Characteristics (typ) Output Pulse Width Constant K-Supply Voltage (Typical) Input Equivalent Circuit www.fairchildsemi.com 6 74VHC221A Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D 7 www.fairchildsemi.com 74VHC221A Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 www.fairchildsemi.com 8 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 74VHC221A Dual Non-Retriggerable Monostable Multivibrator Physical Dimensions inches (millimeters) unless otherwise noted (Continued)