ONSEMI MCR8DCNT4

MCR8DCM, MCR8DCN
Preferred Device
Silicon Controlled Rectifiers
Reverse Blocking Thyristors
Designed for high volume, low cost, industrial and consumer
applications such as motor control; process control; temperature, light
and speed control.
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Features
•
•
•
•
•
•
•
SCRs
8 AMPERES RMS
600 − 800 VOLTS
Small Size
Passivated Die for Reliability and Uniformity
Low Level Triggering and Holding Characteristics
Available in Surface Mount Lead Form − Case 369C
Epoxy Meets UL 94 V−0 @ 0.125 in
ESD Ratings:
Human Body Model, 3B u 8000 V
Machine Model, C u 400 V
Pb−Free Packages are Available
G
A
K
4
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
1 2
Value
Peak Repetitive Off−State Voltage
(Note 1) (TJ = −40 to 125°C, Sine Wave,
50 to 60 Hz, Gate Open)
MCR8DCM
MCR8DCN
VDRM,
VRRM
On−State RMS Current
(180° Conduction Angles; TC = 105°C)
IT(RMS)
8.0
A
Average On−State Current
(180° Conduction Angles; TC = 105°C)
IT(AV)
5.1
A
Peak Non-Repetitive Surge Current
(1/2 Cycle, Sine Wave 60 Hz, TJ = 125°C)
ITSM
80
A
Circuit Fusing Consideration (t = 8.3 msec)
I2t
26
A2sec
PGM
5.0
W
Forward Peak Gate Power
(Pulse Width ≤ 1.0 sec, TC = 105°C)
Forward Average Gate Power
(t = 8.3 msec, TC = 105°C)
3
Unit
V
DPAK
CASE 369C
STYLE 4
600
800
MARKING DIAGRAM
PG(AV)
0.5
W
Forward Peak Gate Current
(Pulse Width ≤ 1.0 sec, TC = 105°C)
IGM
2.0
A
Operating Junction Temperature Range
TJ
−40 to 125
°C
Storage Temperature Range
Tstg
−40 to 150
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. VDRM, VRRM for all types can be applied on a continuous basis. Ratings apply
for zero or negative gate voltage; positive gate voltage shall not be applied
concurrent with negative potential on the anode. Blocking voltages shall not
be tested with a constant current source such that the voltage ratings of the
device are exceeded.
YWW
CR
8DCxG
Y
WW
CR8DCx
G
= Year
= Work Week
= Device Code
x= M or N
= Pb−Free Package
PIN ASSIGNMENT
1
Cathode
2
Anode
3
Gate
4
Anode
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2005
November, 2005 − Rev. 4
1
Publication Order Number:
MCR8DCM/D
MCR8DCM, MCR8DCN
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
RJC
RJA
RJA
2.2
88
80
°C/W
TL
260
°C
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient
− Junction−to−Ambient (Note 2)m
Maximum Lead Temperature for Soldering Purposes (Note 3)
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristics
Symbol
Min
Typ
Max
−
−
−
−
0.01
5.0
−
1.4
1.8
2.0
−
7.0
−
15
30
0.5
−
0.2
0.65
−
−
1.0
2.0
−
4.0
−
22
−
30
60
4.0
−
22
−
30
60
50
200
−
Unit
OFF CHARACTERISTICS
Peak Repetitive Forward or Peak Repetitive Reverse Blocking Current
TJ = 25°C
(VAK = Rated VDRM or VRRM, Gate Open)
TJ = 125°C
IDRM,
IRRM
mA
ON CHARACTERISTICS
Peak On−State Voltage (Note 4) (ITM = 16 A)
VTM
Gate Trigger Current (Continuous dc)
(VAK = 12 V, RL = 100 , TJ = 25°C)
(TJ = −40°C)
IGT
Gate Trigger Voltage (Continuous dc)
(VAK = 12 V, RL = 100 , TJ = 25°C)
(TJ = −40°C)
(TJ = 125°C)
VGT
Holding Current
(VAK = 12 V, Initiating Current = 200 mA, Gate Open)
mA
V
IH
TJ = 25°C
TJ = −40°C
Latching Current
(VAK = 12 V, IG = 15 mA, TJ = 25°C)
(VAK = 12 V, IG = 30 mA, TJ = −40°C)
V
mA
IL
mA
DYNAMIC CHARACTERISTICS
Critical Rate of Rise of Off−State Voltage
(VAK = Rated VDRM, Exponential Waveform, Gate Open, TJ = 125°C)
2. Surface mounted on minimum recommended pad size.
3. 1/8″ from case for 10 seconds.
4. Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%.
dv/dt
V/s
ORDERING INFORMATION
Device
MCR8DCMT4
MCR8DCMT4G
Package
Shipping †
DPAK
DPAK
(Pb−Free)
2500 / Tape & Reel
MCR8DCNT4
MCR8DCNT4G
DPAK
DPAK
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
MCR8DCM, MCR8DCN
Voltage Current Characteristic of SCR
+ Current
Anode +
VTM
Symbol
Parameter
VDRM
Peak Repetitive Off State Forward Voltage
IDRM
Peak Forward Blocking Current
VRRM
Peak Repetitive Off State Reverse Voltage
IRRM
Peak Reverse Blocking Current
VTM
Peak On State Voltage
IH
Holding Current
on state
IH
IRRM at VRRM
Reverse Blocking Region
(off state)
Reverse Avalanche Region
+ Voltage
IDRM at VDRM
Forward Blocking Region
(off state)
P(AV) , AVERAGE POWER DISSIPATION (WATTS)
TC , MAXIMUM ALLOWABLE CASE TEMPERATURE (° C)
Anode −
125
120
= Conduction
Angle
115
110
dc
105
= 30°
60°
90°
120°
180°
0
1.0
2.0
3.0
4.0
5.0
180°
8.0
120°
90°
= Conduction
Angle
6.0
4.0
dc
60°
= 30°
2.0
0
6.0
0
1.0
2.0
3.0
4.0
5.0
IT(AV), AVERAGE ON−STATE CURRENT (AMPS)
IT(AV), AVERAGE ON−STATE CURRENT (AMPS)
Figure 1. Average Current Derating
Figure 2. On−State Power Dissipation
100
6.0
1.0
TYPICAL @ TJ = 25°C
MAXIMUM @ TJ = 125°C
r(t) , TRANSIENT RESISTANCE
(NORMALIZED)
I T, INSTANTANEOUS ON−STATE CURRENT (AMPS)
100
10
10
MAXIMUM @ TJ = 25°C
1.0
0.1
0.1
ZJC(t) = RJC(t)Sr(t)
0.01
0
1.0
2.0
3.0
4.0
5.0
0.1
1.0
10
100
1000
VT, INSTANTANEOUS ON−STATE VOLTAGE (VOLTS)
t, TIME (ms)
Figure 3. On−State Characteristics
Figure 4. Transient Thermal Response
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3
10 K
MCR8DCM, MCR8DCN
0.9
VGT, GATE TRIGGER VOLTAGE (VOLTS)
I GT, GATE TRIGGER CURRENT (mA)
100
10
1.0
−40 −25 −10
0.7
0.6
0.5
0.4
0.3
0.2
5.0
20
35
50
65
80
95
110 125
−40 −25 −10
5.0
20
35
50
65
80
95
110 125
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. Typical Gate Trigger Current versus
Junction Temperature
Figure 6. Typical Gate Trigger Voltage versus
Junction Temperature
100
IL, LATCHING CURRENT (mA)
100
10
1.0
−40 −25 −10
5.0
20
35
50
65
95
80
110
10
1.0
−40 −25 −10
125
5.0
20
35
50
65
80
95
110
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 7. Typical Holding Current versus
Junction Temperature
Figure 8. Typical Latching Current versus
Junction Temperature
1000
VD = 800 V
TJ = 125°C
STATIC dv/dt (V/ s)
IH , HOLDING CURRENT (mA)
0.8
100
10
100
1000
RGK, GATE−CATHODE RESISTANCE (OHMS)
Figure 9. Exponential Static dv/dt versus
Gate−Cathode Resistance
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4
10 K
125
MCR8DCM, MCR8DCN
PACKAGE DIMENSIONS
DPAK
CASE 369C
ISSUE O
−T−
C
B
V
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
SEATING
PLANE
E
R
4
Z
A
S
1
2
DIM
A
B
C
D
E
F
G
H
J
K
L
R
S
U
V
Z
3
U
K
F
J
L
H
D
G
2 PL
0.13 (0.005)
M
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.090 BSC
0.180 0.215
0.025 0.040
0.020
−−−
0.035 0.050
0.155
−−−
MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
4.58 BSC
0.87
1.01
0.46
0.58
2.60
2.89
2.29 BSC
4.57
5.45
0.63
1.01
0.51
−−−
0.89
1.27
3.93
−−−
T
STYLE 4:
PIN 1. CATHODE
2. ANODE
3. GATE
4. ANODE
SOLDERING FOOTPRINT*
6.20
0.244
3.0
0.118
2.58
0.101
5.80
0.228
1.6
0.063
6.172
0.243
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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PUBLICATION ORDERING INFORMATION
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Email: [email protected]
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For additional information, please contact your
local Sales Representative.
MCR8DCM/D