EMG2DXV5T1, EMG5DXV5T1 Preferred Devices Dual Bias Resistor Transistors NPN Silicon Surface Mount Transistors with Monolithic Bias Resistor Network http://onsemi.com This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. The device is housed in the SOT−553 package which is designed for low power surface mount applications. NPN SILICON BIAS RESISTOR TRANSISTORS (3) Features • • • • • • • (2) R1 (5) SOT−553 CASE 463B 5 Value Unit Collector-Base Voltage VCBO 50 Vdc Collector-Emitter Voltage VCEO 50 Vdc IC 100 mAdc 1 MARKING DIAGRAM THERMAL CHARACTERISTICS Characteristic DTr1 (4) Symbol Collector Current R2 DTr2 MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Rating R1 R2 Simplifies Circuit Design Reduces Board Space Reduces Component Count Moisture Sensitivity Level: 1 Available in 8 mm, 7 inch Tape and Reel Lead−Free Solder Plating Pb−Free Packages are Available (1) Symbol Max Unit Total Device Dissipation TA = 25°C Derate above 25°C PD 230 (Note 1) 338 (Note 2) 1.8 (Note 1) 2.7 (Note 2) mW Thermal Resistance − Junction-to-Ambient RqJA 540 (Note 1) 370 (Note 2) °C/W Thermal Resistance − Junction-to-Lead RqJL 264 (Note 1) 287 (Note 2) °C/W Junction and Storage Temperature Range TJ, Tstg −55 to +150 °C 5 XX M G G °C/W Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. FR−4 @ Minimum Pad 2. FR−4 @ 1.0 x 1.0 inch Pad 1 xx = Device Code xx= UF (EMG5) UP (EMG2) M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. Preferred devices are recommended choices for future use and best overall value. © Semiconductor Components Industries, LLC, 2005 October, 2005 − Rev. 0 1 Publication Order Number: EMG5DXV5/D EMG2DXV5T1, EMG5DXV5T1 DEVICE MARKING AND RESISTOR VALUES Package Marking R1 (K) R2 (K) EMG2DXV5T1 Device SOT−553 UP 47 47 EMG5DXV5T1 SOT−553 UF 10 47 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Collector-Base Cutoff Current (VCB = 50 V, IE = 0) ICBO − − 100 nAdc Collector-Emitter Cutoff Current (VCE = 50 V, IB = 0) ICEO − − 500 nAdc Emitter-Base Cutoff Current (VEB = 6.0 V, IC = 0)EMG2DXV5T1 EMG5DXV5T1 IEBO − − − − 0.1 0.2 mAdc Collector-Base Breakdown Voltage (IC = 10 mA, IE = 0) V(BR)CBO 50 − − Vdc Collector-Emitter Breakdown Voltage (Note 3) (IC = 2.0 mA, IB = 0) V(BR)CEO 50 − − Vdc hFE 80 80 140 140 − − VCE(sat) − − 0.25 − − − − 0.2 0.2 VOH 4.9 − − Vdc kW OFF CHARACTERISTICS (Q1 & Q2) ON CHARACTERISTICS (Q1 & Q2) (Note 3) DC Current Gain (VCE = 10 V, IC = 5.0 mA) EMG2DXV5T1 EMG5DXV5T1 Collector-Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA) Output Voltage (on) (VCC = 5.0 V, VB = 3.5 V, RL = 1.0 kW) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW) VOL Vdc EMG2DXV5T1 EMG5DXV5T1 Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW) Input Resistor EMG2DXV5T1 EMG5DXV5T1 R1 32.9 7.0 47 10 61.1 13 Resistor Ratio EMG2DXV5T1 EMG5DXV5T1 R1/R2 0.8 0.17 1.0 0.21 1.2 0.25 3. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0% PD, POWER DISSIPATION (mW) 350 300 250 200 150 100 50 0 −50 RqJA = 370°C/W 0 50 100 TA, AMBIENT TEMPERATURE (°C) Figure 1. Derating Curve http://onsemi.com 2 Vdc 150 EMG2DXV5T1, EMG5DXV5T1 10 1000 IC/IB = 10 1 25°C TA=−25°C 0.01 0 25°C −25°C 10 50 20 40 IC, COLLECTOR CURRENT (mA) TA=75°C 100 75°C 0.1 VCE = 10 V hFE , DC CURRENT GAIN (NORMALIZED) VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS TYPICAL ELECTRICAL CHARACTERISTICS — EMG2DXV5T1 1 10 IC, COLLECTOR CURRENT (mA) Figure 2. VCE(sat) versus IC 1 100 IC, COLLECTOR CURRENT (mA) 0.4 TA=−25°C 10 1 0.1 0.01 0.2 0 25°C 75°C 0.6 0 10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS) 0.001 50 VO = 5 V 0 Figure 4. Output Capacitance 2 4 6 Vin, INPUT VOLTAGE (VOLTS) VO = 0.2 V TA=−25°C 10 25°C 75°C 1 0.1 0 10 8 Figure 5. Output Current versus Input Voltage 100 V in , INPUT VOLTAGE (VOLTS) C ob , CAPACITANCE (pF) Figure 3. DC Current Gain f = 1 MHz IE = 0 V TA = 25°C 0.8 100 20 30 40 IC, COLLECTOR CURRENT (mA) 50 Figure 6. Input Voltage versus Output Current http://onsemi.com 3 10 EMG2DXV5T1, EMG5DXV5T1 1 300 TA=−25°C IC/IB = 10 25°C TA=75°C VCE = 10 250 25°C hFE , DC CURRENT GAIN VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) TYPICAL ELECTRICAL CHARACTERISTICS − EMG5DXV5T1 0.1 200 75°C −25°C 150 0.01 100 50 0.001 0 20 40 60 IC, COLLECTOR CURRENT (mA) 0 80 1 2 4 6 Figure 7. VCE(sat) versus IC 100 75°C 3 IC, COLLECTOR CURRENT (mA) f = 1 MHz lE = 0 V TA = 25°C 3.5 2.5 2 1.5 1 0.5 0 2 4 6 8 10 15 20 25 30 35 40 VR, REVERSE BIAS VOLTAGE (VOLTS) 45 25°C TA=−25°C 10 VO = 5 V 1 50 Figure 9. Output Capacitance 0 2 4 6 Vin, INPUT VOLTAGE (VOLTS) TA=−25°C VO= 0.2 V 25°C 75°C 1 0.1 0 10 8 10 Figure 10. Output Current versus Input Voltage 10 V in , INPUT VOLTAGE (VOLTS) Cob , CAPACITANCE (pF) 90 100 Figure 8. DC Current Gain 4 0 8 10 15 20 40 50 60 70 80 IC, COLLECTOR CURRENT (mA) 20 30 IC, COLLECTOR CURRENT (mA) 40 Figure 11. Input Voltage versus Output Current http://onsemi.com 4 50 EMG2DXV5T1, EMG5DXV5T1 TYPICAL APPLICATIONS FOR NPN BRTs +12 V ISOLATED LOAD FROM mP OR OTHER LOGIC Figure 12. Level Shifter: Connects 12 or 24 Volt Circuits to Logic +12 V VCC OUT IN LOAD Figure 13. Open Collector Inverter: Inverts the Input Signal Figure 14. Inexpensive, Unregulated Current Source http://onsemi.com 5 EMG2DXV5T1, EMG5DXV5T1 DEVICE ORDERING INFORMATION Package Shipping † EMG2DXV5T1 SOT−553 4000 / Tape & Reel EMG2DXV5T1G SOT−553 (Pb−Free) 4000 / Tape & Reel EMG2DXV5T5 SOT−553 8000 / Tape & Reel EMG2DXV5T5G SOT−553 (Pb−Free) 8000 / Tape & Reel EMG5DXV5T1 SOT−553 4000 / Tape & Reel EMG5DXV5T1G SOT−553 (Pb−Free) 4000 / Tape & Reel EMG5DXV5T5 SOT−553 8000 / Tape & Reel EMG5DXV5T5G SOT−553 (Pb−Free) 8000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 6 EMG2DXV5T1, EMG5DXV5T1 PACKAGE DIMENSIONS SOT−553 XV5 SUFFIX 5−LEAD PACKAGE CASE 463B−01 ISSUE B D −X− 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. A L 4 1 e 2 3 E −Y− b 5 PL 0.08 (0.003) HE DIM A b c D E e L HE c M X Y MILLIMETERS NOM MAX 0.55 0.60 0.22 0.27 0.13 0.18 1.60 1.70 1.20 1.30 0.50 BSC 0.10 0.20 0.30 1.50 1.60 1.70 MIN 0.50 0.17 0.08 1.50 1.10 INCHES NOM 0.022 0.009 0.005 0.063 0.047 0.020 BSC 0.004 0.008 0.059 0.063 MIN 0.020 0.007 0.003 0.059 0.043 MAX 0.024 0.011 0.007 0.067 0.051 0.012 0.067 SOLDERING FOOTPRINT* 0.3 0.0118 0.45 0.0177 1.35 0.0531 1.0 0.0394 0.5 0.5 0.0197 0.0197 SCALE 20:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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