QUINT AND/NAND GATE FEATURES SY100S304 DESCRIPTION ■ Max. propagation delay of 1050ps ■ IEE min. of –60mA ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved noise immunity ■ Internal 75KΩ input pull-down resistors ■ 40% faster than Fairchild 300K at lower power ■ Function and pinout compatible with Fairchild F100K ■ Available in 24-pin CERPACK and 28-pin PLCC packages The SY100S304 is an ultra-fast quint AND/NAND gate designed for use in high-performance ECL systems. This device also features a Function (F) output which is the wireNOR of the AND gate outputs. The inputs on the device have 75KΩ pull-down resistors. Ob Ob Oa D1a Oa VEES D2a PIN CONFIGURATIONS 11 10 9 8 7 6 5 D1b D2b VEE VEES 12 13 14 15 16 17 D1c BLOCK DIAGRAM D2c D2d Top View PLCC J28-1 18 4 3 2 1 28 27 Oc 26 Od Oc VCCA VCC VCC F 19 20 21 22 23 24 25 Ob D1c Oc D2c Oc D1d Od D2d Od D1e Oe D2e Oe 6 D1b Od Od 24 23 22 21 20 19 18 D2a 17 16 D1a Oa 15 14 Oa Ob 13 7 8 9 10 11 12 Ob 2 3 Top View Flatpack F24-1 4 5 Oc Oc D2b Ob 1 Od D1b D1d D1e D2e Oe Oe VCC VCCA Oa D2d D2c D1c VEE D2b D2a F Oa Oe Oe D1d D1a D1e D2e VEES F PIN NAMES Pin Function Dna – Dne Data Inputs (n-1...5) E Enable Input Oa – Oe Data Outputs Oa – Oe Complementary Data Outputs VEES VEE Substrate VCCA VCCO for ECL Outputs Rev.: G 1 Amendment: /0 Issue Date: July, 1999 SY100S304 Micrel DC ELECTRICAL CHARACTERISTICS VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND Symbol IIH IEE Parameter Min. Typ. Max. — — — — 250 250 –60 –40 –30 Input HIGH Current D2a — D2e D1a — D1e Power Supply Current Unit Condition µA VIN = VIH (Max.) mA Inputs Open AC ELECTRICAL CHARACTERISTICS CERPACK VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND TA = 0°C Symbol Parameter TA = +25°C TA = +85°C Min. Max. Min. Max. Min. Max. Unit tPLH tPHL Propagation Delay Dna — Dne to O, O 300 1150 300 1150 300 1150 ps tPLH tPHL Propagation Delay Data to F 600 1650 600 1650 600 1650 ps tTLH tTHL Transition Time 20% to 80%, 80% to 20% 300 900 300 900 300 900 ps Condition PLCC VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND TA = 0°C Symbol Parameter TA = +25°C TA = +85°C Min. Max. Min. Max. Min. Max. Unit tPLH tPHL Propagation Delay Dna — Dne to O, O 300 1050 300 1050 300 1050 ps tPLH tPHL Propagation Delay Data to F 600 1550 600 1550 600 1550 ps tTLH tTHL Transition Time 20% to 80%, 80% to 20% 300 900 300 900 300 900 ps 2 Condition SY100S304 Micrel TIMING DIAGRAM 0.7 ± 0.1 ns 0.7 ± 0.1 ns –0.95V INPUT 80% 50% 20% –1.69V TRUE tPHL tPLH 50% tPLH OUTPUT tPHL 80% 50% 20% COMPLEMENT tTLH tTHL Propagation Delay and Transition Times NOTE: VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND PRODUCT ORDERING CODE Ordering Code Package Type Operating Range SY100S304FC F24-1 Commercial SY100S304JC J28-1 Commercial SY100S304JCTR J28-1 Commercial 3 SY100S304 Micrel 24 LEAD CERPACK (F24-1) Rev. 03 4 SY100S304 Micrel 28 LEAD PLCC (J28-1) Rev. 03 MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. © 2000 Micrel Incorporated 5