SEMTECH SK1599

SK15XX Family
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
SK15XX Family Functional Block Diagram
OUT0
OUT0*
IN
IN*
D Q
D* Q*
0
1
CLK
CLK*
OUT1
OUT1*
OUT2
OUT2*
OUT3
OUT3*
SEL*
SEL
OUT4
OUT4*
Revision 1/ January 23, 2001
1
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SK15XX Family
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
SK15XX Family Product Selection Guide
3 GHz
1:5 Signal Distribution
Synch / Asynch Operation
Logic Family
Power
Supply
Output Configuration
50Ω
Double
Termination
Output
Availability
Internal
Current Sink
(Double
Termination)
50Ω Source
Termination
Product
3.3V
5.2V
Open
Emitter
SK1500
l
l
l
ECL / PECL
Now
l
l
Double Swing / TTL
Now
ECL / PECL
Now
ECL / PECL
Now
ECL / PECL
Now
SK1501
SK1502
l
l
SK1503
l
l
SK1504
l
l
l
l
l
Logic / Translation Family
Output Configuration
Translation
Product
50Ω Double
Termination
Open Emitter
Availability
50Ω Source
Termination
SK1525
Anything to PECL
l
Now
SK1526
Anything to ECL
l
Now
SK1527
Anything to PECL
l
Now
SK1528
Anything to ECL
l
Now
SK1529
Anything to PECL
l
Now
SK1530
Anything to ECL
l
Now
Open Collector Logic Family
Output Configuration
Product
Open Collector
SK1599
l
Revision 1/ January 4, 2001
Output Current
12 mA
2
Availability
Q2 2001
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SK15XX Family
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
SK15XX Family Package Information
5mm x 5mm TQFP
3
D, E
2
D1, E1
See
Figure 3.
4
b
8
Top View
e
A
A2
SEATING
PLANE
A1 10
b
Side View
Revision 1/ January 4, 2001
3
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SK15XX Family
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
SK15XX Family Package Information (continued)
5mm x 5mm TQFP
9
7
WITH
PLATING
b
02
2
9
9
R1
e/2
01
c
c1
R2
S
25
GAGE PLANE
03
11
00
L
(L1)
9
Figure 1.
Figure 2.
b
b1
Figure 3.
JEDEC Variation
All Dimensions in Millimeters
Symbol
1.
All dimensions and tolerancing conforms
to ANSI Y14.5M-1982.
2. The top package body size may be smaller
than the bottom package body size by as
much as 0.15 mm.
3. To be determined at seating plane.
4. Dimensions D1 and E1 do not include
mold protrusion. Allowable protrusion
is 0.25 mm per side. D1 and E1 are
maximum plastic body size dimensions
including mold mismatch.
5. Details of Pin 1 identifier optional, but
must be located within the zone indicated.
6. All dimensions are in millimeters.
7. Dimension b does not include Dambar
protrusion. Allowable Dambar protrusion
shall not cause the lead width to exceed
the maximum b dimension by more than
0.08 mm. Dambar cannot be located
on the lower radius or the foot. Minimum
space between protrusion and an
adjacent lead is 0.07 mm for 0.4 mm and
0.5 mm pitch packages.
8. Exact shape of each corner is optional.
9. These dimensions apply to the flat
section of the lead between 0.10 mm
and 0.25 mm from the lead tip.
10. A1 is defined as the distance from the
seating plane to the lowest point of the
package body.
Revision 1/ January 23, 2001
MIN
MAX
Note
Comments
A
1.00
1.10
1.20
Package Stand Off Height
A1
0.05
0.10
0.15
Air Gap
A2
0.95
1.00
1.05
Package Body Thickness
D
7.00 BSC
3
D1
5.00 BSC
4, 2
E
7.00 BSC
3
E1
5.00 BSC
4, 2
N
32
e
b
0.50 BSC
0.22
0.27
b1
0.17
0.20
0.23
0.08
–
–
R2
0.08
0
01
0
02
11
03
o
o
–
Package Body Width
Lead Pitch
0.17
00
Package Body Length
Lead Count
R1
7
Lead Thickness
0.20
o
7
o
13
o
3.5
–
o
–
o
12
11
o
12
13
S
0.20
–
–
o
o
c
0.09
–
0.20
c1
0.09
–
0.16
L
0.45
0.60
0.75
L1
4
NOM
1.00 REF
aaa
0.20
bbb
0.20
ccc
0.08
ddd
0.08
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SK15XX Family
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
Absolute Maximum Ratings*
Symbol
Parameter
Value
Unit
VEE
Power Supply (VCC = 0V)
-6.0 to 0
V
VCC
Power Supply (VEE = 0V)
6.0 to 0
V
VI
Input Voltage (VCC = 0V, VI not more negative than VEE)
-6.0 to 0
V
VI
Input Voltage (VE = 0V, VI not more positive than VCC)
6.0 to 0
V
IOUT
Output Current
Continuous
Surge
50
100
mA
mA
TA
Operating Temperature Range
0 to +70
oC
Tstg
Storage Temperature
-65 to +150
oC
Tsol
Solder Temperature (<2 to 3 seconds: 245oC desired)
265
oC
* Maximum Ratings are those values beyond which damage to the device may occur.
Revision 1/ January 23, 2001
5
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SK1500
1:5 Signal Distribution
PRELIMINARY
PRELIMINARY
HIGH-PERFORMANCE
HIGH-PERFORMANCE PRODUCTS
PRODUCTS
Description
Features
The SK1500 is an extremely fast, stable, and accurate
low skew 1:5 clock / signal distributor featuring a
synchronous enable, which allows the outputs to be
turned off and on without the risk of an unpredictable
output pulse. The D - flip-flop is triggered on the
falling edge of the clock.
•
•
•
1:5 Clock/Data Driver
3 GHz Fmax
3.3V / 5.2V Compatible
Output Options
Open Emitter
The SK1500 uses standard open emitter ECL outputs
optimized for:
• General purpose ECL compatible applications
• Multiple destination applications (daisy
chain).
VCC
OUT
OUT*
Functional Block Diagram
Output Swing
1.3V
OUT0
OUT0*
IN
IN*
D Q
D* Q*
0
1
CLK
CLK*
700 mV
3.3V
or
5.2V
OUT1
OUT1*
VEE
OUT2
OUT2*
OUT3
OUT3*
SEL*
SEL
VCC
Pin Description
VCC
OUT0
OUT0*
N/C
N/C
OUT1
OUT1*
VEE
OUT4
OUT4*
Package Information
VCC
N/C
N/C
OUT2
OUT2*
N/C
N/C
VCC
VEE
VEE
OUT4*
OUT4
N/C
N/C
OUT3*
OUT3
VCC
32 pin, 5 mm x 5 mm
TQFP Package
VEE
SEL
SEL*
CLK
CLK*
IN
IN*
Revision 1/ January 23, 2001
5
6
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SK1500
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
DC Characteristics
Parameter
Symbol
Min
VIH
VIL
Typ
Max
Units
VEE + 2.0
VEE
VCC
VCC - .2
V
V
| Input - Input* |
.2
4.3
V
IIH
IIL
+1
-1
+25
+1
µA
µA
IIH, IIL
-420
+250
µA
| OUT - OUT* |
(OUT + OUT*) / 2
600
VCC - 1.5
VCC - 1.1
mV
V
IEE
VCC - VEE
3.0
120
5.5
mA
V
Inputs
Input High
Input Low
(IN - IN*, CLK - CLK*, SEL - SEL*)
Differential Input Voltage (Note 1)
Timing Inputs (CLK / CLK*)
Input High Current
Input Low Current
Functional Inputs (IN / IN*, SEL / SEL*)
Input Current
Outputs
Digital Output Voltage
Output Common Mode Range
700
VCC - 1.3
Power Supply
Power Supply Current
Power Supply Voltage
95
Test Conditions: Outputs terminated with 50Ω to VCC – 2V.
Note 1: Production tested to a maximum Vdiff = 2.0V.
AC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Tpd
Tpd
Tpd
490
340
330
590
440
430
690
540
530
ps
ps
ps
<20
ps
High Performance Option
Propagation Delay
CLK to OUT (SEL = 0)
CLK to OUT (SEL = 1)
SEL to OUT
Channel to Channel Skew
Maximum Operating Frequency (Note 1)
Minimum Pulse Width (Note 1)
IN to CLK (Note 1)
Set Up Time
Hold Time
Output Rise and Fall Times (20% / 80%)
Temperature Coefficient
Fmax
3.0
GHz
PW min
160
ps
Tsu
Th
100
100
ps
ps
Tr / Tf
125
∆Tpd /∆T
<1
150
ps
ps / oC
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
7
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SK1501
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
Description
Features
The SK1501 is an extremely fast, stable, and accurate
low skew 1:5 clock / signal distributor featuring a
synchronous enable, which allows the outputs to be
turned off and on without the risk of an unpredictable
output pulse. The D - flip-flop is triggered on the
falling edge of the clock.
•
•
•
1:5 Clock/Data Driver
2 GHz Fmax
4.5V / 5.2V Compatible
Output Options
Open Emitter
The SK1501 uses open emitter outputs with a double
amplitude swing suitable for the following applications:
• TTL compatible destinations
• Double termination situations that require
a full swing at the destination
• Long cables
VCC
OUT
OUT*
Functional Block Diagram
Output Swing
VCC
OUT0
OUT0*
1.9V
1.4V
IN
IN*
D Q
D* Q*
0
1
CLK
CLK*
OUT1
OUT1*
OUT2
OUT2*
4.5V
or
5.2V
VEE
OUT3
OUT3*
SEL*
SEL
Pin Description
VCC
OUT0
OUT0*
N/C
N/C
OUT1
OUT1*
VEE
OUT4
OUT4*
Package Information
VCC
N/C
N/C
OUT2
OUT2*
N/C
IN*
VCC
N/C
VEE
VEE
OUT4*
OUT4
N/C
N/C
OUT3*
OUT3
VCC
32 pin, 5 mm x 5 mm
TQFP Package
VEE
SEL
SEL*
CLK
CLK*
IN
Revision 1/ January 23, 2001
8
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SK1501
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
DC Characteristics
Parameter
Symbol
Min
VIH
VIL
Typ
Max
Units
VEE + 2.0
VEE
VCC
VCC -.2
V
V
| Input -Input* |
.2
4.3
V
IIH
IIL
+1
-1
+25
+1
µA
µA
IIH, IIL
-420
+250
µA
| OUT -OUT* |
(OUT + OUT*) / 2
1.2
VCC -2.1
VCC - 1.7
V
V
IEE
VCC -VEE
4.2
95
120
5.5
mA
V
Inputs
Input High
Input Low
(IN - IN*, CLK - CLK*, SEL -SEL*)
Differential Input Voltage
Timing Inputs (CLK / CLK*)
Input High Current
Input Low Current
Functional Inputs (IN / IN*, SEL / SEL*)
Input Current
Outputs
Digital Output Voltage
Output Common Mode Range
1.4
VCC - 1.9
Power Supply
Power Supply Current
Power Supply Voltage
Test Conditions: Outputs terminated with 50Ω to VCC – 3V.
AC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Tpd
Tpd
Tpd
490
340
330
590
440
430
690
540
530
ps
ps
ps
<20
ps
High Performance Option
Propagation Delay
CLK to OUT (SEL = 0)
CLK to OUT (SEL = 1)
SEL to OUT
Channel to Channel Skew
Maximum Operating Frequency (Note 1)
Minimum Pulse Width (Note 1)
IN to CLK (Note 1)
Set Up Time
Hold Time
Output Rise and Fall Times (20% / 80%)
Temperature Coefficient
Fmax
2.0
GHz
PW min
250
ps
Tsu
Th
100
100
ps
ps
Tr / Tf
200
∆Tpd /∆T
<1
250
ps
ps / oC
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
9
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SK1502
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
Description
Features
The SK1502 is an extremely fast, stable, and accurate
low skew 1:5 clock / signal distributor featuring a
synchronous enable, which allows the outputs to be
turned off and on without the risk of an unpredictable
output pulse. The D - flip-flop is triggered on the
falling edge of the clock.
•
•
•
1:5 Clock/Data Driver
3 GHz Fmax
3.3V / 5.2V Compatible
Output Options
50Ω Source / Sink
The SK1502 uses 50Ω outputs with source /sink
capability, and is optimized for applications that require:
• Point to point, double terminated, timing
critical lines
VCC
50Ω
50Ω
4 mA
OUT
OUT *
4 mA
VEE
VEE
Functional Block Diagram
Output Swing
1.3V
OUT0
OUT0*
IN
IN*
D Q
D* Q*
0
1
CLK
CLK*
VCC
350 mV
OUT1
OUT1*
At destination
(double termination)
OUT2
OUT2*
3.3V
or
5.2V
VEE
OUT3
OUT3*
SEL*
SEL
Pin Description
VCC
OUT0
OUT0*
N/C
N/C
OUT1
OUT1*
VEE
OUT4
OUT4*
Package Information
VCC
N/C
N/C
OUT2
OUT2*
N/C
N/C
VCC
VEE
VEE
OUT4*
OUT4
N/C
N/C
OUT3*
OUT3
VCC
32 pin, 5 mm x 5 mm
TQFP Package
VEE
SEL
SEL*
CLK
CLK*
IN
IN*
Revision 1/ January 23, 2001
10
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SK1502
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
DC Characteristics
Parameter
Symbol
Min
VIH
VIL
Typ
Max
Units
VEE + 2.0
VEE
VCC
VCC - .2
V
V
| Input - Input* |
.2
4.3
V
IIH
IIL
+1
-1
+25
+1
µA
µA
IIH, IIL
-420
+250
µA
| OUT - OUT* |
(OUT + OUT*) / 2
ISINK
ROUT
600
VCC - 1.5
4
40
VCC - 1.1
6
50
mV
V
mA
Ω
IEE
VCC - VEE
3.0
170
5.5
mA
V
Inputs
Input High
Input Low
(IN - IN*, CLK - CLK*, SEL - SEL*)
Differential Input Voltage
Timing Inputs (CLK / CLK*)
Input High Current
Input Low Current
Functional Inputs (IN / IN*, SEL / SEL*)
Input Current
Outputs
Digital Output Voltage
Output Common Mode Range
Internal Current Source
Output Impedance
700
VCC -1.3
5
45
Power Supply
Power Supply Current
Power Supply Voltage
135
Test Conditions: Outputs terminated with 50Ω to VCC – 2V.
AC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Tpd
Tpd
Tpd
490
340
330
590
440
430
690
540
530
ps
ps
ps
<20
ps
High Performance Option
Propagation Delay
CLK to OUT (SEL = 0)
CLK to OUT (SEL = 1)
SEL to OUT
Channel to Channel Skew
Maximum Operating Frequency (Note 1)
Minimum Pulse Width (Note 1)
IN to CLK (Note 1)
Set Up Time
Hold Time
Output Rise and Fall Times (20% / 80%)
Temperature Coefficient
Fmax
3.0
GHz
PW min
160
ps
Tsu
Th
100
100
ps
ps
Tr / Tf
125
DTpd /DT
<1
150
ps
o
ps / C
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
11
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SK1503
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
Description
Features
The SK1503 is an extremely fast, stable, and accurate
low skew 1:5 clock / signal distributor featuring a
synchronous enable, which allows the outputs to be
turned off and on without the risk of an unpredictable
output pulse. The D - flip-flop is triggered on the
falling edge of the clock.
•
•
•
1:5 Clock/Data Driver
3 GHz Fmax
3.3V / 5.2V Compatible
Output Options
The SK1503 outputs are open emitter with an internal
current source, optimized for applications that are:
• Point to point, double terminated, timing
critical lines
• Non-50Ω transmission lines
Internal Current Sink
VCC
OUT
OUT *
4 mA
Functional Block Diagram
VEE
4 mA
VEE
Output Swing
OUT0
OUT0*
1.3V
VCC
350 mV
IN
IN*
D Q
D* Q*
0
1
CLK
CLK*
OUT1
OUT1*
At destination
(double termination)
3.3V
or
5.2V
OUT2
OUT2*
VEE
OUT3
OUT3*
SEL*
SEL
Pin Description
VCC
OUT0
OUT0*
N/C
N/C
OUT1
OUT1*
VEE
OUT4
OUT4*
VEE
Package Information
VCC
SEL
SEL*
CLK
CLK*
IN
IN*
VCC
VEE
OUT4*
OUT4
N/C
N/C
OUT3*
OUT3
VCC
32 pin, 5 mm x 5 mm
TQFP Package
N/C
N/C
OUT2
OUT2*
N/C
N/C
VEE
Revision 1/ January 23, 2001
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SK1503
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
DC Characteristics
Parameter
Symbol
Min
VIH
VIL
Typ
Max
Units
VEE + 2.0
VEE
VCC
VCC - .2
V
V
| Input - Input* |
.2
4.3
V
IIH
IIL
+1
-1
+25
+1
µA
µA
IIH, IIL
-420
+250
µA
| OUT - OUT* |
(OUT + OUT*) / 2
ISINK
600
VCC - 1.5
4
VCC - 1.1
6
mV
V
mA
IEE
VCC - VEE
3.0
170
5.5
mA
V
Inputs
Input High
Input Low
(IN - IN*, CLK - CLK*, SEL - SEL*)
Differential Input Voltage
Timing Inputs (CLK / CLK*)
Input High Current
Input Low Current
Functional Inputs (IN / IN*, SEL / SEL*)
Input Current
Outputs
Digital Output Voltage
Output Common Mode Range
Internal Current Source
700
VCC -1.3
5
Power Supply
Power Supply Current
Power Supply Voltage
135
Test Conditions:
AC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Tpd
Tpd
Tpd
490
340
330
590
440
430
690
540
530
ps
ps
ps
<20
ps
High Performance Option
Propagation Delay
CLK to OUT (SEL = 0)
CLK to OUT (SEL = 1)
SEL to OUT
Channel to Channel Skew
Maximum Operating Frequency (Note 1)
Minimum Pulse Width (Note 1)
IN to CLK (Note 1)
Set Up Time
Hold Time
Output Rise and Fall Times (20% / 80%)
Temperature Coefficient
Fmax
3.0
GHz
PW min
160
ps
Tsu
Th
100
100
ps
ps
Tr / Tf
125
∆Tpd /∆T
<1
150
ps
ps / oC
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
13
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SK1504
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
Description
Features
The SK1504 is an extremely fast, stable, and accurate
low skew 1:5 clock / signal distributor featuring a
synchronous enable, which allows the outputs to be
turned off and on without the risk of an unpredictable
output pulse. The D - flip-flop is triggered on the
falling edge of the clock.
•
•
•
1:5 Clock/Data Driver
3 GHz Fmax
3.3V / 5.2V Compatible
Output Options
The SK1504 outputs are 50Ω with source and sink
capability, optimized for:
• Point to point, series terminated, timing
critical lines
50Ω Source / Sink
VCC
50Ω
50Ω
8 mA
Functional Block Diagram
OUT
OUT *
8 mA
VEE
VEE
Output Swing
OUT0
OUT0*
1.3V
VCC
700 mV
IN
IN*
D Q
D* Q*
0
1
CLK
CLK*
3.3V
or
5.2V
OUT1
OUT1*
OUT2
OUT2*
VEE
OUT3
OUT3*
SEL*
SEL
Pin Description
VCC
OUT0
OUT0*
N/C
N/C
OUT1
OUT1*
VEE
OUT4
OUT4*
Package Information
VEE
SEL
VCC
N/C
SEL*
CLK
CLK*
IN
IN*
N/C
N/C
VCC
VEE
VEE
OUT4*
OUT4
N/C
N/C
OUT3*
OUT3
VCC
32 pin, 5 mm x 5 mm
TQFP Package
N/C
OUT2
OUT2*
Revision 1/ January 23, 2001
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SK1504
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
DC Characteristics
Parameter
Symbol
Min
VIH
VIL
Typ
Max
Units
VEE + 2.0
VEE
VCC
VCC - .2
V
V
| Input - Input* |
.2
4.3
V
IIH
IIL
+1
-1
+25
+1
µA
µA
IIH, IIL
-420
+250
µA
| OUT - OUT* |
(OUT + OUT*) / 2
ISINK
ROUT
600
VCC - 1.5
6.5
40
VCC - 1.1
10
50
mV
V
mA
Ω
IEE
VCC - VEE
3.0
221
5.5
mA
V
Inputs
Input High
Input Low
(IN - IN*, CLK - CLK*, SEL - SEL*)
Differential Input Voltage
Timing Inputs (CLK / CLK*)
Input High Current
Input Low Current
Functional Inputs (IN / IN*, SEL / SEL*)
Input Current
Outputs
Digital Output Voltage
Output Common Mode Range
Internal Current Source
Output Impedance
700
VCC -1.3
8
45
Power Supply
Power Supply Current
Power Supply Voltage
175
Test Conditions:
AC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Tpd
Tpd
Tpd
490
340
330
590
440
430
690
540
530
ps
ps
ps
<20
ps
High Performance Option
Propagation Delay
CLK to OUT (SEL = 0)
CLK to OUT (SEL = 1)
SEL to OUT
Channel to Channel Skew
Maximum Operating Frequency (Note 1)
Minimum Pulse Width (Note 1)
IN to CLK (Note 1)
Set Up Time
Hold Time
Output Rise and Fall Times (20% / 80%)
Temperature Coefficient
Fmax
3.0
GHz
PW min
160
ps
Tsu
Th
100
100
ps
ps
Tr / Tf
125
∆Tpd /∆T
<1
150
ps
ps / oC
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
15
www.semtech.com
SK1525
Anything to PECL Translator
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
Description
Features
The SK1525 is an extremely fast, stable, and accurate
low skew 1:5 clock / signal distributor featuring a
synchronous enable, which allows the outputs to be
turned off and on without the risk of an upredictable
output pulse. It is also capable of receiving inputs of
any technology or voltage level. The D - flip-flop is
triggered on the falling edge of the clock.
•
•
•
1:5 Clock/Data Driver
3 GHz Fmax
Anything to PECL Translation
Output Options
Open Emitter
The SK1525 has open emitter PECL outputs.
VCC
Target applications:
• High speed clock / data lines
that require translation
• Multiple destination (daisy chain)
applications
OUT
OUT*
Functional Block Diagram
Input Swing
VCC
VIH
VIL
OUT0
OUT0*
IN
IN*
D Q
D* Q*
0
1
CLK
CLK*
OUT1
OUT1*
VIH
OUT3
OUT3*
SEL*
SEL
1.3V
.
.
.
.
VIL
OUT2
OUT2*
Output Swing
VCC
700 mV
VEE
VEE
Pin Description
VCC
OUT0
OUT0*
N/C
N/C
OUT1
OUT1*
VEE
OUT4
OUT4*
Package Information
VCC
N/C
N/C
OUT2
OUT2*
N/C
N/C
VCC
VEE
VEE
OUT4*
OUT4
N/C
N/C
OUT3*
OUT3
VCC
32 pin, 5 mm x 5 mm
TQFP Package
VEE
SEL
SEL*
CLK
CLK*
IN
IN*
Revision 1/ January 23, 2001
16
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SK1525
Anything to PECL Translator
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
DC Characteristics
Parameter
Symbol
Min
VIH
VIL
Typ
Max
Units
VEE + 2.0
VEE
VCC
VCC -.2
V
V
| Input - Input* |
.2
4.3
V
IIH
IIL
+1
-1
+25
+1
µA
µA
IIH, IIL
-420
+250
µA
| OUT -OUT* |
(OUT + OUT*) / 2
600
VCC -1.5
700
VCC -1.3
VCC -1.1
mV
V
IEE
VCC
VEE
3.0
-3.6
95
3.3
-3.3
120
3.6
-3.0
mA
V
V
Inputs
Input High
Input Low
(IN - IN*, CLK - CLK*, SEL -SEL*)
Differential Input Voltage
Timing Inputs (CLK / CLK*)
Input High Current
Input Low Current
Functional Inputs (IN / IN*, SEL / SEL*)
Input Current
Outputs
Digital Output Voltage
Output Common Mode Range
Power Supply
Power Supply Current
Positive Supply Voltage
Negative Supply Voltage
Test Conditions: Outputs terminated with 50Ω to VCC – 2V.
AC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Tpd
Tpd
Tpd
490
340
330
590
440
430
690
540
530
ps
ps
ps
<20
ps
High Performance Option
Propagation Delay
CLK to OUT (SEL = 0)
CLK to OUT (SEL = 1)
SEL to OUT
Channel to Channel Skew
Maximum Operating Frequency (Note 1)
Minimum Pulse Width (Note 1)
IN to CLK (Note 1)
Set Up Time
Hold Time
Output Rise and Fall Times (20% / 80%)
Temperature Coefficient
Fmax
3.0
GHz
PW min
160
ps
Tsu
Th
100
100
ps
ps
Tr / Tf
125
∆Tpd /∆T
<1
150
ps
o
ps / C
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
17
www.semtech.com
SK1526
Anything to ECL Translator
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
Description
Features
The SK1526 is an extremely fast, stable and accurate
low skew 1:5 clock / signal distributor featuring a
synchronous enable, which allows the outputs to be
turned off and on without the risk of an upredictable
output pulse. It is also capable of receiving inputs of
any technology or voltage level. The D - flip-flop is
triggered on the falling edge of the clock.
•
•
•
1:5 Clock/Data Driver
3 GHz Fmax
Anything to ECL Translation
Output Options
Open Emitter
The SK1526 has standard open emitter ECL outputs.
VGG
Target applications:
• High speed clock / data lines
that require translation
• Multiple destination (daisy chain)
applications
OUT
OUT*
Functional Block Diagram
Input Swing
VCC
VIH
VIL
OUT0
OUT0*
0
1
CLK
CLK*
VIH
VIL
OUT2
OUT2*
OUT3
OUT3*
SEL*
SEL
VGG
1.3V
700 mV
VEE
Pin Description
VGG
OUT0
OUT0*
OUT4
OUT4*
VGG
N/C
N/C
OUT2
VEE
SEL
SEL*
CLK
CLK*
Package Information
OUT2*
N/C
IN
IN*
32 pin, 5 mm x 5 mm
TQFP Package
N/C
VEE
VCC
VEE
OUT4*
OUT4
Revision 1/ January 23, 2001
VEE
N/C
N/C
OUT1
OUT1*
VEE
D Q
D* Q*
.
.
.
.
18
N/C
N/C
OUT3*
OUT3
VGG
IN
IN*
OUT1
OUT1*
Output Swing
www.semtech.com
SK1526
Anything to ECL Translator
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
DC Characteristics
Parameter
Symbol
Min
VIH
VIL
Typ
Max
Units
VEE + 2.0
VEE
VCC
VCC -.2
V
V
| Input - Input* |
.2
4.3
V
IIH
IIL
+1
-1
+25
+1
µA
µA
IIH, IIL
-420
+250
µA
| OUT - OUT* |
(OUT + OUT*) / 2
600
VGG -1.5
VGG -1.1
mV
V
120
52
3.6
2.0
-3.0
3.6
mA
mA
V
V
V
V
Inputs
Input High
Input Low
(IN - IN*, CLK - CLK*, SEL - SEL*)
Differential Input Voltage
Timing Inputs (CLK / CLK*)
Input High Current
Input Low Current
Functional Inputs (IN / IN*, SEL / SEL*)
Input Current
Outputs
Digital Output Voltage
Output Common Mode Range
700
VGG - 1.3
Power Supply
Power Supply Current
Positive Supply Voltage
Negative Supply Voltage
IEE
ICC
VCC
VGG
VEE
VCC - VGG
2.0
-.1
-3.6
0
95
45
3.3
0
-3.3
Test Conditions: Outputs terminated with 50Ω to VGG – 2V.
AC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Tpd
Tpd
Tpd
490
340
330
590
440
430
690
540
530
ps
ps
ps
<20
ps
High Performance Option
Propagation Delay
CLK to OUT (SEL = 0)
CLK to OUT (SEL = 1)
SEL to OUT
Channel to Channel Skew
Maximum Operating Frequency (Note 1)
Minimum Pulse Width (Note 1)
IN to CLK (Note 1)
Set Up Time
Hold Time
Output Rise and Fall Times (20% / 80%)
Temperature Coefficient
Fmax
3.0
GHz
PW min
160
ps
Tsu
Th
100
100
ps
ps
Tr / Tf
125
∆Tpd /∆T
<1
150
ps
ps / oC
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
19
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SK1527
Anything to PECL Translator
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
Description
Features
The SK1527 is an extremely fast, stable, and accurate
low skew 1:5 clock / signal distributor featuring a
synchronous enable, which allows the outputs to be
turned off and on without the risk of an upredictable
output pulse. It is also capable of receiving inputs of
any technology or voltage level. The D - flip-flop is
triggered on the falling edge of the clock.
•
•
•
1:5 Clock/Data Driver
3 GHz Fmax
Anything to PECL Translation
Output Options
50Ω Source / Sink
The SK1527 uses 50Ω outputs with source /sink
capability, and is optimized for:
• High speed clock / data lines
that require translation
• Point to point, double termination
applications
VCC
50Ω
50Ω
4 mA
Input Swing
VIL
OUT0
OUT0*
IN
IN*
D Q
D* Q*
0
1
CLK
CLK*
OUT1
OUT1*
VIH
OUT3
OUT3*
SEL*
SEL
Output Swing
VCC
1.3V
.
.
.
.
VIL
OUT2
OUT2*
VEE
VCC
VIH
OUT *
4 mA
VEE
Functional Block Diagram
OUT
350 mV
At destination
(double termination)
VEE
VEE
Pin Description
VCC
OUT0
OUT0*
N/C
N/C
OUT1
OUT1*
VEE
OUT4
OUT4*
Package Information
VCC
N/C
N/C
CLK
CLK*
OUT2
OUT2*
IN
IN*
VCC
N/C
N/C
VEE
VEE
OUT4*
OUT4
N/C
N/C
OUT3*
OUT3
VCC
32 pin, 5 mm x 5 mm
TQFP Package
VEE
SEL
SEL*
Revision 1/ January 23, 2001
20
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SK1527
Anything to PECL Translator
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
DC Characteristics
Parameter
Symbol
Min
VIH
VIL
Typ
Max
Units
VEE + 2.0
VEE
VCC
VCC - .2
V
V
| Input - Input* |
.2
4.3
V
IIH
IIL
+1
-1
+25
+1
µA
µA
IIH, IIL
-420
+250
µA
| OUT - OUT* |
(OUT + OUT*) / 2
ISINK
ROUT
600
VCC - 1.5
4
40
700
VCC -1.3
5
45
VCC - 1.1
6
50
mV
V
mA
Ω
IEE
VCC
VEE
3.0
-3.6
135
3.3
-3.3
170
3.6
-3.0
mA
V
V
Inputs
Input High
Input Low
(IN - IN*, CLK - CLK*, SEL - SEL*)
Differential Input Voltage
Timing Inputs (CLK / CLK*)
Input High Current
Input Low Current
Functional Inputs (IN / IN*, SEL / SEL*)
Input Current
Outputs
Digital Output Voltage
Output Common Mode Range
Internal Current Source
Output Impedance
Power Supply
Power Supply Current
Positive Supply Voltage
Negative Supply Voltage
Test Conditions: Outputs unterminated.
AC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Tpd
Tpd
Tpd
490
340
330
590
440
430
690
540
530
ps
ps
ps
<20
ps
High Performance Option
Propagation Delay
CLK to OUT (SEL = 0)
CLK to OUT (SEL = 1)
SEL to OUT
Channel to Channel Skew
Maximum Operating Frequency (Note 1)
Minimum Pulse Width (Note 1)
IN to CLK (Note 1)
Set Up Time
Hold Time
Output Rise and Fall Times (20% / 80%)
Temperature Coefficient
Fmax
3.0
GHz
PW min
160
ps
Tsu
Th
100
100
ps
ps
Tr / Tf
125
∆Tpd /∆T
<1
150
ps
ps / oC
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
21
www.semtech.com
SK1528
Anything to ECL Translator
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
Description
Features
The SK1528 is an extremely fast, stable, and accurate
low skew 1:5 clock / signal distributor featuring a
synchronous enable, which allows the outputs to be
turned off and on without the risk of an upredictable
output pulse. It is also capable of receiving inputs of
any technology and voltage level. The D - flip-flop is
triggered on the falling edge of the clock.
•
•
•
1:5 Clock/Data Driver
3 GHz Fmax
Anything to ECL Translation
Output Options
50Ω Source / Sink
The SK1528 has 50Ω outputs with source /sink
capability, and is optimized for:
• High speed clock / data lines that
require translation
• Point to point, double termination
applications
VGG
50Ω
50Ω
4 mA
VCC
VIH
OUT0
OUT0*
IN
IN*
D Q
D* Q*
0
1
CLK
CLK*
OUT1
OUT1*
VIH
OUT3
OUT3*
SEL*
SEL
At destination
(double termination)
.
.
.
.
VIL
OUT2
OUT2*
VEE
Output Swing
Input Swing
VIL
OUT *
4 mA
VEE
Functional Block Diagram
OUT
VGG
1.3V
350 mV
VEE
VEE
Pin Description
N/C
N/C
OUT1
OUT1*
VEE
VGG
OUT0
OUT0*
OUT4
OUT4*
VGG
N/C
VEE
SEL
SEL*
Package Information
N/C
OUT2
CLK
CLK*
OUT2*
N/C
N/C
VEE
VEE
OUT4*
OUT4
32 pin, 5 mm x 5 mm
TQFP Package
Revision 1/ January 23, 2001
22
N/C
N/C
OUT3*
OUT3
VGG
IN
IN*
VCC
www.semtech.com
SK1528
Anything to ECL Translator
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
DC Characteristics
Parameter
Symbol
Min
VIH
VIL
Typ
Max
Units
VEE + 2.0
VEE
VCC
VCC - .2
V
V
| Input - Input* |
.2
4.3
V
IIH
IIL
+1
-1
+25
+1
µA
µA
IIH, IIL
-420
+250
µA
| OUT - OUT* |
(OUT + OUT*) / 2
ISINK
ROUT
600
VGG - 1.5
4
40
VGG - 1.1
6
50
mV
V
mA
Ω
170
52
3.6
2.0
-3.0
3.6
mA
mA
V
V
V
V
Inputs
Input High
Input Low
(IN - IN*, CLK - CLK*, SEL - SEL*)
Differential Input Voltage
Timing Inputs (CLK / CLK*)
Input High Current
Input Low Current
Functional Inputs (IN / IN*, SEL / SEL*)
Input Current
Outputs
Digital Output Voltage
Output Common Mode Range
Internal Current Source
Output Impedance
700
VGG -1.3
5
45
Power Supply
Power Supply Current
IEE
ICC
VCC
VGG
VEE
VCC - VGG
Positive Supply Voltage
Negative Supply Voltage
135
45
3.3
0
-3.3
2.0
-.1
-3.6
0
Test Conditions: Outputs unterminated.
AC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Tpd
Tpd
Tpd
490
340
330
590
440
430
690
540
530
ps
ps
ps
<20
ps
High Performance Option
Propagation Delay
CLK to OUT (SEL = 0)
CLK to OUT (SEL = 1)
SEL to OUT
Channel to Channel Skew
Maximum Operating Frequency (Note 1)
Minimum Pulse Width (Note 1)
IN to CLK (Note 1)
Set Up Time
Hold Time
Output Rise and Fall Times (20% / 80%)
Temperature Coefficient
Fmax
3.0
GHz
PW min
160
ps
Tsu
Th
100
100
ps
ps
Tr / Tf
125
∆Tpd /∆T
<1
150
ps
ps / oC
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
23
www.semtech.com
SK1529
Anything to PECL Translator
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
Description
Features
The SK1529 is an extremely fast, stable, and accurate
low skew 1:5 clock / signal distributor featuring a
synchronous enable, which allows the outputs to be
turned off and on without the risk of an upredictable
output pulse. It is also capable of receiving inputs of
any technology and voltage level. The D - flip-flop is
triggered on the falling edge of the clock.
•
•
•
1:5 Clock/Data Driver
3 GHz Fmax
Anything to PECL Translation
Output Options
50Ω Source / Sink
The SK1529 uses 50Ω outputs with source /sink
capability, and is optimized for:
• High speed clock / data lines
that require translation
• Point to point, series termination
applications
VCC
50Ω
50Ω
8 mA
VEE
Functional Block Diagram
Input Swing
VIL
OUT0
OUT0*
IN
IN*
D Q
D* Q*
0
1
CLK
CLK*
OUT1
OUT1*
VIH
OUT3
OUT3*
SEL*
SEL
VEE
Output Swing
1.3V
.
.
.
.
VIL
OUT2
OUT2*
OUT *
8 mA
VCC
VIH
OUT
VCC
700 mV
3.3V
or
5.2V
VEE
VEE
Pin Description
VCC
OUT0
OUT0*
N/C
N/C
OUT1
OUT1*
VEE
OUT4
OUT4*
Package Information
VCC
N/C
N/C
OUT2
OUT2*
N/C
IN*
VCC
N/C
VEE
VEE
OUT4*
OUT4
N/C
N/C
OUT3*
OUT3
VCC
32 pin, 5 mm x 5 mm
TQFP Package
VEE
SEL
SEL*
CLK
CLK*
IN
Revision 1/ January 23, 2001
24
www.semtech.com
SK1529
Anything to PECL Translator
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
DC Characteristics
Parameter
Symbol
Min
VIH
VIL
Typ
Max
Units
VEE + 2.0
VEE
VCC
VCC - .2
V
V
| Input - Input* |
.2
4.3
V
IIH
IIL
+1
-1
+25
+1
µA
µA
IIH, IIL
-420
+250
µA
| OUT - OUT* |
(OUT + OUT*) / 2
ISINK
ROUT
600
VCC - 1.5
6.5
40
700
VCC -1.3
8
45
VCC - 1.1
10
50
mV
V
mA
Ω
IEE
VCC
VEE
3.0
-3.6
175
3.3
-3.3
221
3.6
-3.0
mA
V
V
Inputs
Input High
Input Low
(IN - IN*, CLK - CLK*, SEL - SEL*)
Differential Input Voltage
Timing Inputs (CLK / CLK*)
Input High Current
Input Low Current
Functional Inputs (IN / IN*, SEL / SEL*)
Input Current
Outputs
Digital Output Voltage
Output Common Mode Range
Internal Current Source
Output Impedance
Power Supply
Power Supply Current
Positive Supply Voltage
Negative Supply Voltage
Test Conditions: Outputs unterminated.
AC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Tpd
Tpd
Tpd
490
340
330
590
440
430
690
540
530
ps
ps
ps
<20
ps
High Performance Option
Propagation Delay
CLK to OUT (SEL = 0)
CLK to OUT (SEL = 1)
SEL to OUT
Channel to Channel Skew
Maximum Operating Frequency (Note 1)
Minimum Pulse Width (Note 1)
IN to CLK (Note 1)
Set Up Time
Hold Time
Output Rise and Fall Times (20% / 80%)
Temperature Coefficient
Fmax
3.0
GHz
PW min
160
ps
Tsu
Th
100
100
ps
ps
Tr / Tf
125
∆Tpd /∆T
<1
150
ps
ps / oC
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
25
www.semtech.com
SK1530
Anything to ECL Translator
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
Description
Features
The SK1530 is an extremely fast, stable and accurate
low skew 1:5 clock / signal distributor featuring a
synchronous enable, which allows the outputs to be
turned off and on without the risk of an upredictable
output pulse. It is also capable of receiving inputs of
any technology or voltage level. The D - flip-flop is
triggered on the falling edge of the clock.
•
•
•
1:5 Clock/Data Driver
3 GHz Fmax
Anything to ECL Translation
Output Options
50Ω Source / Sink
The SK1530 uses 50Ω outputs with source /sink
capability, and is optimized for:
• High speed clock / data lines that
require translation
• Point to point, series termination
applications
VGG
50Ω
50Ω
8 mA
VEE
Functional Block Diagram
0
1
CLK
CLK*
OUT1
OUT1*
VIH
VIL
OUT2
OUT2*
OUT3
OUT3*
SEL*
SEL
VGG
1.3V
700 mV
Pin Description
VGG
OUT0
OUT0*
OUT4
OUT4*
VGG
VEE
SEL
Package Information
N/C
N/C
OUT2
OUT2*
N/C
N/C
VEE
SEL*
CLK
CLK*
IN
IN*
VCC
VEE
OUT4*
OUT4
32 pin, 5 mm x 5 mm
TQFP Package
Revision 1/ January 23, 2001
VEE
VEE
N/C
N/C
OUT1
OUT1*
VEE
D Q
D* Q*
.
.
.
.
26
N/C
N/C
OUT3*
OUT3
VGG
IN
IN*
VEE
VCC
VIH
VIL
OUT *
8 mA
Output Swing
Input Swing
OUT0
OUT0*
OUT
www.semtech.com
SK1530
Anything to ECL Translator
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
DC Characteristics
Parameter
Symbol
Min
VIH
VIL
Typ
Max
Units
VEE + 2.0
VEE
VCC
VCC - .2
V
V
| Input - Input* |
.2
4.3
V
IIH
IIL
+1
-1
+25
+1
µA
µA
IIH, IIL
-420
+250
µA
| OUT - OUT* |
(OUT + OUT*) / 2
ISINK
ROUT
600
VGG - 1.5
6.5
40
VGG - 1.1
10
50
mV
V
mA
Ω
221
52
3.6
2.0
-3.0
3.6
mA
mA
V
V
V
V
Inputs
Input High
Input Low
(IN - IN*, CLK - CLK*, SEL - SEL*)
Differential Input Voltage
Timing Inputs (CLK / CLK*)
Input High Current
Input Low Current
Functional Inputs (IN / IN*, SEL / SEL*)
Input Current
Outputs
Digital Output Voltage
Output Common Mode Range
Internal Current Source
Output Impedance
700
VGG -1.3
8
45
Power Supply
Power Supply Current
IEE
ICC
VCC
VGG
VEE
VCC - VGG
Positive Supply Voltage
Negative Supply Voltage
175
45
3.3
0
-3.3
2.0
-.1
-3.6
0
Test Conditions: Outputs unterminated.
AC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Tpd
Tpd
Tpd
490
340
330
590
440
430
690
540
530
ps
ps
ps
<20
ps
High Performance Option
Propagation Delay
CLK to OUT (SEL = 0)
CLK to OUT (SEL = 1)
SEL to OUT
Channel to Channel Skew
Maximum Operating Frequency (Note 1)
Minimum Pulse Width (Note 1)
IN to CLK (Note 1)
Set Up Time
Hold Time
Output Rise and Fall Times (20% / 80%)
Temperature Coefficient
Fmax
3.0
GHz
PW min
160
ps
Tsu
Th
100
100
ps
ps
Tr / Tf
125
∆Tpd /∆T
<1
150
ps
o
ps / C
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
27
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SK1599
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
Description
Features
The SK1599 is an extremely fast, stable, and accurate
low skew 1:5 clock / signal distributor featuring a
synchronous enable, which allows the outputs to be
turned off and on without the risk of an unpredictable
output pulse. The D - flip-flop is triggered on the
falling edge of the clock.
•
•
•
1:5 Clock/Data Driver
3 GHz Fmax
3.3V / 5.2V Compatible
The SK1599 has open collector (CML) outputs, targeted
for:
• Ultra high speed applications
• Adjustable common mode levels at the
destination.
Output Options
Open Collector
OUT
OUT*
Functional Block Diagram
12 mA
VEE
OUT0
OUT0*
IN
IN*
D Q
D* Q*
0
1
CLK
CLK*
OUT1
OUT1*
OUT2
OUT2*
OUT3
OUT3*
SEL*
SEL
Pin Description
VCC
OUT0
OUT0*
N/C
N/C
OUT1
OUT1*
VEE
OUT4
OUT4*
Package Information
VEE
SEL
SEL*
CLK
CLK*
IN
N/C
OUT2
OUT2*
N/C
IN*
VCC
N/C
VEE
VEE
OUT4*
OUT4
N/C
N/C
OUT3*
OUT3
VCC
32 pin, 5 mm x 5 mm
TQFP Package
VCC
N/C
Revision 1/ January 23, 2001
28
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SK1599
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
DC Characteristics
Parameter
Symbol
Min
VIH
VIL
Typ
Max
Units
VEE + 2.0
VEE
VCC
VCC -.2
V
V
| Input - Input* |
.2
4.3
V
IIH
IIL
+1
-1
+25
+1
µA
µA
IIH, IIL
-420
+250
µA
Inputs
Input High
Input Low
(IN - IN*, CLK - CLK*, SEL - SEL*)
Differential Input Voltage
Timing Inputs (CLK / CLK*)
Input High Current
Input Low Current
Functional Inputs (IN / IN*, SEL / SEL*)
Input Current
Outputs
Output Current High
Output Current Low
IOH
IOL
0
12
mA
mA
Power Supply
Power Supply Current
Power Supply Voltage
IEE
VCC - VEE
3.0
145
183
5.5
mA
V
Test Conditions: Outputs terminated with 50Ω to VCC.
AC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Tpd
Tpd
Tpd
490
340
330
590
440
430
690
540
530
ps
ps
ps
<20
ps
High Performance Option
Propagation Delay
CLK to OUT (SEL = 0)
CLK to OUT (SEL = 1)
SEL to OUT
Channel to Channel Skew
Maximum Operating Frequency (Note 1)
Minimum Pulse Width (Note 1)
IN to CLK (Note 1)
Set Up Time
Hold Time
Output Rise and Fall Times (20% / 80%)
Temperature Coefficient
Fmax
3.0
GHz
PW min
160
ps
Tsu
Th
100
100
ps
ps
Tr / Tf
125
∆Tpd /∆T
<1
150
ps
ps / oC
Note 1: Guaranteed by characterization. Not production tested.
Revision 1/ January 23, 2001
29
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SK15XX Family
1:5 Signal Distribution
PRELIMINARY
HIGH-PERFORMANCE PRODUCTS
Ordering Information
Or d e r i n g Co d e
Temperature
Ra n g e
Package ID
SK1500
32 - T QF P
5 X 5 mm
C o mme r c i a l
SK1501
32 - T QF P
5 X 5 mm
C o mme r c i a l
SK1502
32 - T QF P
5 X 5 mm
C o mme r c i a l
SK1503
32 - T QF P
5 X 5 mm
C o mme r c i a l
SK1504
32 - T QF P
5 X 5 mm
C o mme r c i a l
SK1525
32 - T QF P
5 X 5 mm
C o mme r c i a l
SK1526
32 - T QF P
5 X 5 mm
C o mme r c i a l
SK1527
32 - T QF P
5 X 5 mm
C o mme r c i a l
SK1528
32 - T QF P
5 X 5 mm
C o mme r c i a l
SK1529
32 - T QF P
5 X 5 mm
C o mme r c i a l
SK1530
32 - T QF P
5 X 5 mm
C o mme r c i a l
SK1599
32 - T QF P
5 X 5 mm
Tape and Reel
Semtech's tape and reel packaging fully conforms to the latest EIA-481-1A and EIA-481-2A specifications.
The antistatic embossed tape provides a secure cavity sealed with a peel-back cover tape.
Typical
+
PLCC Devices
+
+ + +
+
+
+
+
+ + +
+
+
+ + +
+
+
+ + +View from
Tape Side
PIN 1
Linear Direction of Travel
Typical
+
+
+
+
+
+
+
+
SOIC & MSOP
Devices
View from
Tape Side
Linear Direction of Travel
Typical
+
LQFP & TQFP
Devices
C o mme r c i a l
+ +
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ from
View
Tape Side
PIN 1
Note: For tape and reel, add the letter “T” at the
end of Ordering Code.
Tape Width
(mm)
Max
Device/Reel
Reel Size
(inch)
Max
Device/Tube
PLCC-28
24
750
13
37
SOIC-8
12
2,500
13
98
SOIC-16
16
2,500
13
49
SOIC-20
24
1,000
13
38
MSOP-8
12
2,500
13
50
MSOP-10
12
2,500
13
50
LQFP-32 (7 x 7 mm)
16
1,000
13
250 (tray)
TQFP-32 (7 x 7 mm)
16
1,000
13
250 (tray)
TQFP-32 (5 x 5 mm)
16
1,000
13
360 (tray)
Device Type
Linear Direction of Travel
Ordering Information
To order devices which are to be delivered in Tape and Reel, add the suffix T to the
device number being ordered.
Contact Information
Division Headquarters
10021 Willow Creek Road
San Diego, CA 92131
Phone (858) 695-1808
FAX (858)695-2633
Revision 1/ January 23, 2001
Semtech Corporation
High-Performance Products Division
30
Marketing Group
1111 Comstock Street
Santa Clara, CA 95054
Phone: (408) 566-8776
FAX: (408) 727-8994
www.semtech.com