SEMTECH SLVDA2.8

SLVDA2.8
Low Voltage TVS Diode Array
For ESD & Latch-Up Protection
PROTECTION PRODUCTS
Description
Features
The SLV series of transient voltage suppressors are
designed to protect low voltage semiconductor components which are connected to data and transmission
lines from transients caused by electrostatic discharge
(ESD), lightning and other induced voltage surges.
The devices are constructed using Semtech’s proprietary EPD process technology. The EPD process provides low standoff voltages with significant reductions
in leakage currents and capacitance over silicon
avalanche diode processes. The SLV series is specifically designed for protecting low voltage components
such as microprocessors, ASICs, I/O transceivers, and
high speed RAM. They provide ESD and latch-up
protection for power and I/O ports, microprocessor bus
interfaces, high speed data and video transmission
lines, and low power portable and wireless systems.
The SLV series TVS diodes will meet the surge requirements of IEC 61000-4-2, Level 4, “Human Body
Model” for air and contact discharge.
The low clamping voltage of the SLV minimizes the
stress on the protected transceiver. The SO-8 package
allows flexibility in the design of “crowded” circuit
boards.
u 300 watts peak pulse power (tp = 8/20µs)
u Transient protection for data lines to
u
u
u
u
u
u
u
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
IEC 61000-4-5 (Lightning) 12A (1.2/50µs)
Protects up to four bidirectional lines
Working Voltages: 2.8V & 3.3V
Low leakage current for low power applications
Low operating voltage ideal for latch-up protection
Low capacitance
Low clamping voltage
Solid-state EPD TVS technology
Mechanical Characteristics
u
u
u
u
JEDEC SO-8 package
Molding compound flammability rating: UL 94V-0
Marking : Part number, date code, logo
Packaging : Tape and Reel per EIA 481
Applications
u
u
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Circuit Diagram (Each Line)
ESD and Latch-Up Protection
Analog Inputs
WAN/LAN Equipment
Low Voltage ASICs
Instrumentation
Low Power Systems
Schematic & PIN Configuration
1
8
2
7
3
6
4
5
S0-8 (Top View)
Revision 9/2000
1
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SLVDA2.8
PROTECTION PRODUCTS
Absolute Maximum Rating
R ating
Symbo l
Value
Units
Peak Pulse Pow er (tp = 8/20µ s)
Pp k
300
Watts
Peak Pulse Current (tp = 8/20µ s)
I PP
24
A
Lead Sold ering Temp erature
TL
260 (10 sec.)
°C
Op erating Temp erature
TJ
-55 to +125
°C
TSTG
-55 to +150
°C
Storage Temp erature
Electrical Characteristics
SLVDA2.8
Par ame te r
Reverse Stand -Off Voltage
Symbo l
Co nd itio ns
Minimum
V RWM
Typ ical
Maximum
Units
2.8
V
Punch -Th rough Voltage
V PT
IPT = 2µ A
3.0
V
Snap -Back Voltage
V SB
ISB = 50mA
2.8
V
Reverse Leakage Current
IR
V RWM = 2.8V, T=25°C
1
µA
Clamp ing Voltage
VC
IPP = 1A , tp = 8/20µ s
4.1
V
Clamp ing Voltage
VC
IPP = 5A , tp = 8/20µ s
5.3
V
Maximum Peak Pulse Current
I PP
tp = 8/20µ s
24
A
Junction Cap acitance
Cj
Betw een I/O Pins and
Gnd
V R = 0V, f = 1MHz
100
pF
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SLVDA2.8
PROTECTION PRODUCTS
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
Power Derating Curve
110
10
90
% of Rated Power or I PP
Peak Pulse Power - P PP (kW)
100
1
0.1
80
70
60
50
40
30
20
10
0
0.01
0.1
1
10
100
0
1000
25
50
75
100
125
150
Ambient Temperature - TA (oC)
Pulse Duration - tp (µs)
Pulse Waveform
110
Waveform
Parameters:
tr = 8µs
td = 20µs
100
90
Percent of IPP
80
70
e
60
-t
50
40
td = IPP/2
30
20
10
0
0
5
10
15
20
25
30
Time (µs)
IEC 61000-4-2 Discharge Parameters
ESD Pulse Waveform (IEC 61000-4-2)
Level
ã 2000 Semtech Corp.
3
First
Peak
Current
Peak
Current
at 30 ns
Peak
Current
at 60 ns
Test
Test
Voltage
Voltage
(Contact
( A ir
Disch arge) Disch arge)
(kV )
(kV )
(A)
(A)
(A)
1
7.5
4
8
2
2
2
15
8
4
4
4
3
22.5
12
6
6
8
4
30
16
8
8
15
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SLVDA2.8
PROTECTION PRODUCTS
Applications Information
I/O Line Protection
Device Connection for Protection of Four Data Lines
The SLVDA series devices are designed to protect up to
four data lines. The devices are connected as follows:
l
l
LINE 1
LINE 2
LINE 3
LINE 4
Common mode protection of four data lines is
achieved by connecting data lines at pins 1 - 4.
Pins 5 - 8 are connected to ground (Device is
symmetrical so connections may be reversed to
serve a specific application). The ground connections should be made directly to the ground plane
for best results. The path length is kept as short
as possible to reduce the effects of parasitic
inductance in the board traces.
Protecting 5V lines: The designer may take advantage of the superior reverse leakage and capacitance characteristics of the SLVDA2.8 to protect
two 5V lines. This is achieved by connecting two
lines of the device in series as shown. The series
connection is made by shorting pins 5 & 6 together
for the first line and pins 7 & 8 for the second line.
Pins 1 & 4 are connected to the lines that are to
be protected. Pins 2 & 3 are connected to ground.
See application note SI96-14 for additional details.
Typical Connection
To Protected
Device
1
8
Circuit Board Layout Recommendations for Suppression of ESD.
2
7
Good circuit board layout is critical for the suppression
of ESD induced transients. The following guidelines are
recommended:
3
6
4
5
l
l
l
l
l
l
Ground
Place the TVS near the input terminals or connectors to restrict transient coupling.
Minimize the path length between the TVS and the
protected line.
Minimize all conductive loops including power and
ground loops.
The ESD transient return path to ground should be
kept as short as possible.
Never run critical signals near board edges.
Use ground planes whenever possible.
ã 2000 Semtech Corp.
From Connector
Optional Connection for Protecting 5V Lines
4
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SLVDA2.8
PROTECTION PRODUCTS
Outline Drawing - SO-8
Land Pattern SOT 143
Land Pattern - SO-8
ã 2000 Semtech Corp.
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SLVDA2.8
PROTECTION PRODUCTS
Ordering Information
Par t Numbe r
Wo r king
Vo ltage
Qty p e r R e e l
R e e l Size
SLV DA 2.8.TC
2.8V
500
7 Inch
Note: Consult factory for availability of 13” reels
Contact Information
Semtech Corporation
Protection Products Division
652 Mitchell Rd., Newbury Park, CA 91320
Phone: (805)498-2111 FAX (805)498-3804
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