L6376 0.5A HIGH-SIDE DRIVER QUAD INTELLIGENT POWER SWITCH 0.5 A FOUR INDEPENDENT OUTPUTS 9.5 TO 35 V SUPPLY VOLTAGE RANGE INTERNAL CURRENT LIMIT NON-DISSIPATIVE OVER-CURRENT PROTECTION THERMAL SHUTDOWN UNDER VOLTAGE LOCKOUT WITH HYSTERESYS DIAGNOSTIC OUTPUT FOR UNDER VOLTAGE, OVER TEMPERATURE AND OVER CURRENT EXTERNAL ASYNCHRONOUS RESET INPUT PRESETTABLE DELAY FOR OVERCURRENT DIAGNOSTIC OPEN GROUND PROTECTION IMMUNITY AGAINST BURST TRANSIENT (IEC 801-4) ESD PROTECTION (HUMAN BODY MODEL ± 2KV) MULTIPOWER BCD TECHNOLOGY POWERDIP 16+2+2 PowerSO20 ORDERING NUMBERS:L6376 (DIP L6376PD (PSO) DESCRIPTION This device is a monolithic quad Intelligent Power Switch in Multipower BCD Technology, for driving inductive, capacitive or resistive loads. Diagnostic for CPU feedback and extensive use of electrical protections make this device inherently indistructible and suitable for general purpose industrial applications. BLOCK DIAGRAM 220nF 22nF VS VS V CP VC VP CHARGE PUMP VS V CP I1 GND RS CURRENT LIMIT + - OVC DRIVER O1 UV SHORT CIRCUIT CONTROL I2 + - I3 + I4 + R + O2 - O3 - O4 OFF OSC 1.25V DIAG OVT OFF DELAY CDOFF UV ON DELAY ON OSC CDON D94IN076C November 1996 1/12 L6376 ABSOLUTE MAXIMUM RATINGS (Pin numering referred to PowerSO20 package) Symbol Pin Vs 6 Parameter Vs - Vout Value Unit Supply Voltage (tw < 10ms) 50 V Supply Voltage (DC) 40 V Difference between supply voltage and output voltage Vid 16, 17 Iid 12,13, 14,15, 18 Ii Vi Iout 2, 3, 8, 9 Vout Externally Forced Voltage -0.3 to 7 V Externally Forced Current ±1 mA Channel Input Current (forced) ±2 mA -0.3 to 40 V Channel Input Voltage Output Current (see also Isc) internally limited Output Voltage internally limited E il Energy Inductive Load (Tj =125°C); Each Channel Ptot Power Dissipation V diag 19 internally limited 200 mJ internally limited External voltage -0.3 to Vs+0.7 V Idiag Externally forced current -10 to 10 mA Top Ambient temperature, operating range -25 to 85 °C Tj Junction temperature, operating range (see Overtemperature Protection) -25 to 125 °C Storage temperature -55 to 150 °C Tstg PIN CONNECTIONS (Top view) VS 1 20 VC VCP 2 19 VP O2 3 18 O3 O1 4 GND 5 16 GND GND 6 15 GND I1 7 14 DIAG I2 8 13 I3 9 I4 10 GND 1 20 GND O4 2 19 DIAG O3 3 18 R VP 4 17 OFF DELAY VC 5 16 ON DELAY VS 6 15 I4 VCP 7 14 I3 R O2 8 13 I2 12 OFF DELAY O1 9 12 I1 11 ON DELAY 10 11 GND 17 D93IN030B POWERDIP 2/12 O4 GND D95IN217 PowerSO20 L6376 PIN DESCRIPTION (Pin numering referred to PowerSO20 package). No Pins Function VS Positive supply voltage. An internal circuit, monitoring the supply voltage, maintains the IC in off-state until VS reaches 9V or when VS falls under 8.5V. The diagnostic is availlable since VS = 5V. 7 VCP Switch driver supply. To minimize the output drop voltage, a supply of about 10V higher than VS is required. In order to use the built-in charge pump, connect a filter capacitor from pin1 to pin. The suggested value assures a fast transition and a low supply ripple even in worse condition. Using the four channels contemporarily, values less than 68nF have to be avoided. 2, 3, 8, 9 O1, O2, O3, O4 1, 10, 11, 20 GND Ground and power dissipating pins. These pins are connected to the bulk ground of the IC, so are useful for heat dissipation. 12,13, 14, 15 I1, I2, I3, I4 Control inputs. Four independent control signals. The output is held off until the voltage at the corresponding input pin reaches 1.35V and is turned off when the voltage at the pin goes below 1.15V. ON DELAY Programmable ON duration in short circuit. If an output is short circuited to ground or carryng a current exceeding the limit, the output is turned-off and the diagnostic activation are delayed. This procedure allows the driving of hard surge current loads. The delay is programmed connecting a capacitor (50pF to 15nF) versus ground with the internal time constant of 1.28µs/pF. The function can be disabled short circuiting this pin to ground. 17 OFF DELAY Programmable OFF duration in short circuit. After the short circuit or overcurrent detection, the switch is held off before the next attempt to switch on again. The delay is programmed connecting a capacitor (50pF to 15nF) versus ground with the internal time constant of 1.28µs/pF. Short circuiting this pin to ground the OFF delay is 64 times the ON delay. 18 R 19 DIAG 6 16 High side outputs. Four independently controlled outputs with built-in current limitation. Asyncronous reset input. This active low input (with hysteresis), switch off all the outputs independently from the input signal. By default it is biased low. Diagnostic output. This open drain output reports the IC working condition. The bad condition (as undervoltage, overcurrent, overtemperature) turns the output low. 5 VC Pump oscillator voltage. At this pin is available the built-in circuitry to supply the switch driver at about 10V higher than VS. To use this feature, connect a capacitor across pin 4 and pin 5. The suggested value assures a fast transition and a minimum output drop voltage even in worse condition. Using the four channels contemporarily, values less than 6.8nF have to be avoided. 4 VP Bootstrapped voltage. At this pin is available the 11V oscillation for the charge pump, at a typical frequency of 200kHz. 3/12 L6376 ELECTRICAL CHARACTERISTICS (Vs = 24V; Tj = -25 to 125°C; unless otherwise specified.) DC OPERATION (Pin numering referred to PowerSO20 package). Symbol Pin Vs V sth 6 Vshys Parameter Min. Typ. Max. Unit Supply Voltage 9.5 24 35 V UV UpperThreshold 8.5 9 9.5 V UV Hysteresis 200 500 800 mV 3 5 mA Iqsc Quiescent Current V il Input Low Level 0 0.8 V 2 40 V Vih 12,13, Input High Level Ibias 14,15, 18 Input Bias Current Outputs ON, No load Vi = 0V -5 -1 0 µA Vi = 40V 0 5 20 µA 100 200 400 mV Vihys Input Comparators Hysteresis Θlim OVT Upper Threshold 150 ΘH Threshold Hysteresis 20 30 °C 0.9 1.2 A Iout =500mA; Tj =25°C 320 500 mV Iout =500mA; Tj =125°C 460 640 mV 100 µA 52 57 V 0.8 1.5 V Short Circuit Current Isc Output Voltage Drop 2, 3, 8, 9 Vs=9.5 to 35V; Rl =2Ω 0.65 °C Output Leakage Current Vo=0V; Vi<0.8V Vcl Internal Voltage Clamp (Vs-Vo each Output) Io=100mA single pulsed Tp=300µs Vol Low State Output Voltage Vi = Vil; RL = ∞ Diagnostic Output Leakage Diagnostic Off 25 µA Diagnostic Output Voltage Drop Idiag = 5mA 1.5 V Iolk Idlkg 19 Vdiag Idch 4/12 Test Condition 16, 17 Delay Capacitors Charge Current 47 40 µA L6376 AC OPERATION (Pin numering referred to PowerSO20 package). Symbol Pin tr -tf 2, 3, 8, 9 Rise or Fall Time td 12 vs 9 13 vs 8 14 vs3 15 vs2 Delay Time dV/dt 2, 3, 8, 9 tON tOFF fmax Parameter Test Condition Min. Typ. Vs = 24V; Rl = 47Ω Rl to ground Slew Rate (Rise and Fall Edge) Vs = 24V; Rl = 47Ω Rl to ground 16 On Time during Short Circuit Condition 50 pF < C DON < 15nF 17 Off Time during Short Circuit Condition 3 4 RISE FALL Max. 3.8 µs 1 µs 5 7.6 7 10 50pF < C DOFF < 15nF Maximum Operating Frequency V/µs µs/pF 1.28 pin 13 grounded Unit 64 tON 1.28 µs/pF 25 kHz SOURCE DRAIN NDMOS DIODE Symbol Parameter Test Condition Min. Forward On Voltage Ifsd = 500mA Ifp Forward Peak Current tp = 10ms; duty cycle = 20% trr Reverse Recovery Time Ifsd = 500mA; dIfsd/dt = 25A/µs tfr Forward Recovery Time V fsd Typ. Max. Unit 1 1.5 V 1.5 A 200 ns 50 ns UNDERVOLTAGE COMPARATOR HYSTERESIS Vshys Vsth D94IN126A Vs SWITCHING WAVEFORMS V in 50% 50% td t td V out 90% 90% 50% 50% 10% 10% tr tf D94IN127A t 5/12 L6376 THERMAL DATA Symbol DIP16+2+2 PowerSO20 Unit Thermal Resistance, Junction to Pin 12 – °C/W R th j-amb1 Thermal Resistance, Junction to Ambient (see Thermal Characteristics) 40 – °C/W R th j-amb2 Thermal Resistance, Junction to Ambient (see Thermal Characteristics) 50 – °C/W Rth j-case Thermal Residance Junction-case – 1.5 °C/W R th j-pin Parameter THERMAL CHARACTERISTICS Rth j-pins DIP16+2+2. The thermal resistance is referred to the thermal path from the dissipating region on the top surface of the silicon chip, to the points along the four central pins of the package, at a distance of 1.5 mm away from the stand-offs. Rth j-amb1 If a dissipating surface, thick at least 35 µm, and with a surface similar or bigger than the one shown, is created making use of the printed circuit. Such heatsinking surface is considered on the bottom side of an horizontal PCB (worst case). Rth j-amb2 If the power dissipating pins (the four central ones), as well as the others, have a miniFigure 1: Printed Heatsink 6/12 mum thermal connection with the external world (very thin strips only) so that the dissipation takes place through still air and through the PCB itself. It is the same situation of point above, without any heatsinking surface created on purpose on the board. Additional data on the PowerDip and the PowerSO20 package can be found in: Application Note AN467: Thermal Characteristics of the PowerDip 20,24 Packages Soldered on 1,2,3 oz. Copper PCB Application Note AN668: A New High Power IC Surface Mount Package: PowerSO20 Power IC Packaging from Insertion to Surface Mounting. L6376 OVERTEMPERATURE PROTECTION (OVT) If the chip temperature exceeds Θlim (measured in a central position in the chip) the chip deactivates itself. The following actions are taken: • all the output stages are switched off; • the signal DIAG is activated (active low). Normal operation is resumed as soon as (typically after some seconds) the chip temperature monitored goes back below Θlim-ΘH. The different thresholds with hysteretic behavior assure that no intermittent conditions can be generated. UNDERVOLTAGE PROTECTION (UV) The supply voltage is expected to range from 9.5V to 35V, even if its reference value is considered to be 24V. In this range the device operates correctly. Below 9.5V the overall system has to be considered not reliable. Consequently the supply voltage is monitored continuously and a signal, called UV, is internally generated and used. The signal is “on” as long as the supply voltage does not reach the upper internal threshold of the Vs comparator Vsth. The UV signal disappears above Vsth. Once the UV signal has been removed, the supply voltage must decrease below the lower threshold (i.e. Vsth-Vshys) before it is turned on again. The hysteresis Vshys is provided to prevent intermittent operation of the device at low supply voltages that may have a superimposed ripple around the average value. The UV signal switches off the outputs, but has no effect on the creation of the reference voltages for the internal comparators, nor on the continuous operation of the charge-pump circuits. DIAGNOSTIC LOGIC The situations that are monitored and signalled with the DIAG output pin are: • current limit (OVC) in action; there are 4 individual current limiting circuits, one per each output; they limit the current that can be sunk from each output, to a typical value of 800mA, equal for all of them; • under voltage (UV); • over temperature protection (OVT). The diagnostic signal is transmitted via an open drain output (for ease of wired-or connection of several such signals) and a low level represents the presence of at least one of the monitored conditions, mentioned above. SHORT CIRCUIT OPERATION In order to allow normal operation of the other inputs when one channel is in short cirtuit, an innovative non dissipative over current protection (patent pending) is implemented in the device. Figure 2: Short Circuit Operation Waveforms OUTPUT CURRENT Isc Iout t<tON DIAG (active low) Short Circuit tON tOFF tON Time tOFF Short Circuit D94IN105 Time 7/12 L6376 In this way, the temperature of the device is kept enough low to prevent the intervention of the thermal protection (in most of the cases) and so to avoid the shut down of the whole device. If a short circuit condition is present on one output, the current limiting circuit puts that channel in linear mode — sourcing the ISC current (typically 800 mA) — for a time period (t ON) defined by an external capacitor (CDON connected to the ON DELAY pin). After that period, if the short circuit condition is still present the output is turned off for another time period (tOFF ) defined by a second external capacitor (CDOFF connected to the OFF DELAY pin). When also this period is expired: • if the short circuit condition is still present the output stays on for the tON period and the sequence starts again; • if the short circuit condition is not present anymore the normal operation of the output is resumed. The tON and tOFF periods are completely independent and can be set from 64 µs to 15 ms, using external capacitors ranging from 50 pF to 15 nF (1.28 µs/pF). If the OFF DELAY pin is tied to ground (i.e. the CDOFF capacitor is not used) the t OFF time period is 64 times the tON period. The diagnostic output (DIAG) is active when the output is switched off, while it is not active when the output is on (i.e. during the t ON period) even if in that period a short circuit condition is present. Typical waveforms for short circuit operation are shown in figure 2. If both the ON DELAY and the OFF DELAY pins are grounded the non dissipative over current protection is inhibited and the outputs in short circuit remain on until the thermal shutdown switch off the whole device. In this case the short circuit condition is not signalled by the DIAG pin (that continues to signal the under voltage and over temperature conditions). PROGRAMMABLE DIAGNOSTIC DELAY The current limiting circuits can be requested to perform even in absence of a real fault condition, for a short period, if the load is of capacitive nature or if it is a filament lamp (that exhibits a very low resistance during the initial heating phase). To avoid the forwarding of misleading — i.e. short diagnostic pulses in coincidence with the intervention of the current limiting circuits when operating on capacitive loads — the activation of the diagnostic can be delayed with respect to the intervention of one of the current limiting circuits. This delay can be defined by an external capacitor (CDON) connected between the ON DELAY pin and ground. RESET INPUT An external reset input R (pin 18) is provided to simultaneously switch off all the outputs: this signal (active low) is in effect an asynchronous reset that keeps the outputs low independently from the input signals. For example, this reset input can be used by the CPU to keep the outputs low after a fault condition (signaled by the DIAG pin). DEMAGNETIZATION OF INDUCTIVE LOADS The device has four internal clamping diodes able to demagnetize inductive loads. The limitation is the peak power dissipation of the packages, so — if the loads are big or if there is the possibility to demagnetize more loads contemporarly — it is necessary to use external demagnetization circuits. In figures 4 and 5 are shown two topologies for the demagnetization versus ground and versus VS. The breakdown voltage of the external device (VZ) must be chosen considering the minimum internal clamping voltage (Vcl) and the maximum supply voltage (VS). Figure 3: Input Comparator Hysteresis Vout 100mV 100mV Vs 1.25V 8/12 D94IN131 Vi L6376 Figure 4: External Demagnetization Circuit (versus ground) VS VCP RS CURRENT LIMIT OVC DRIVER O1 UV SHORT CIRCUIT CONTROL O2 O3 O4 D94IN109 VZ VZ < Vcl (min) - VS (max) Figure 5: External Demagnetization Circuit (versus VS) VS VS VCP RS CURRENT LIMIT VZ OVC DRIVER O1 UV SHORT CIRCUIT CONTROL O2 O3 O4 D94IN110A V S (max) < V Z < Vcl (min) 9/12 L6376 POWERDIP 20 PACKAGE MECHANICAL DATA mm inch DIM. MIN. a1 0.51 B 0.85 b b1 TYP. MIN. TYP. MAX. 0.020 1.40 0.033 0.50 0.38 0.055 0.020 0.50 D 10/12 MAX. 0.015 0.020 24.80 0.976 E 8.80 0.346 e 2.54 0.100 e3 22.86 0.900 F 7.10 0.280 I 5.10 0.201 L6376 PowerSO20 PACKAGE MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. A MIN. TYP. MAX. 3.60 a1 0.10 0.1417 0.30 a2 0.0039 0.0118 3.30 0.1299 a3 0 0.10 0 0.0039 b 0.40 0.53 0.0157 0.0209 c 0.23 0.32 0.009 0.0126 D (1) 15.80 16.00 0.6220 0.6299 E 13.90 14.50 0.5472 0.570 e 1.27 0.050 e3 11.43 0.450 E1 (1) 10.90 11.10 E2 0.4291 0.437 2.90 G 0 0.1141 0.10 h 0 0.0039 0.0314 0.0433 1.10 L 0.80 1.10 N 10° (max.) S 8° (max.) T 10.0 0.3937 (1) ”D and E1” do not include mold flash or protrusions - Mold flash or protrusions shall not exceed 0.15mm (0.006”) N R N a2 b DETAIL A A e c a1 DETAIL B E e3 D DETAIL A lead 20 11 slug a3 DETAIL B E2 E1 0.35 Gage Plane T - C- S L SEATING PLANE G C (COPLANARITY) 1 10 PSO20MEC h x 45° 11/12 L6376 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGSTHOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1996 SGS-THOMSON Microelectronics – Printed in Italy – All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 12/12