STMICROELECTRONICS VN750-B5

VN750
/ VN750S / VN750-B5

HIGH SIDE DRIVER
TYPE
VN750
RDS(on)
IOUT
VCC
VN750S
60 mΩ
6A
36 V
VN750-B5
CMOS COMPATIBLE INPUT
ON STATE OPEN LOAD DETECTION
■ OFF STATE OPEN LOAD DETECTION
■ SHORTED LOAD PROTECTION
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
■ PROTECTION AGAINST LOSS OF GROUND
■ VERY LOW STAND-BY CURRENT
■
PENTAWATT
SO-8
■
■
REVERSE BATTERY PROTECTION (*)
DESCRIPTION
The VN750, VN750S, VN750-B5 are a monolithic
device designed in STMicroelectronics VIPower
Technology, intended for driving any kind of load
with one side connected to ground.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table). Active current limitation
P2PAK
ORDER CODES :
PENTAWATT
SO-8
P2PAK
VN750
VN750S
VN750-B5
combined with thermal shutdown and automatic
restart protect the device against overload.
The device detects open load condition both is on
and off state. Output shorted to VCC is detected in
the off state. Device automatically turns off in case
of ground pin disconnection.
BLOCK DIAGRAM
VC C
OVERVOLTAGE
DETECTION
VCC
CLAMP
UNDERVOLTAGE
DETECTION
GND
Power CLAMP
DRIVER
INPUT
OUTPUT
LOGIC
CURRENT LIMITER
ON STATE OPENLOAD
DETECTION
STATUS
OVERTEMPERATURE
DETECTION
OFF STATE OPENLOAD
AND OUTPUT SHORTED TO V CC
DETECTION
(*) See application schematic at page 8
January 2000
1/15
1
VN750 / VN750S / VN750-B5
ABSOLUTE MAXIMUM RATING
Symbol
VCC
- V CC
- Ignd
IOUT
- IOUT
IIN
ISTAT
VESD
Ptot
Tj
Tc
Tstg
Parameter
SO-8
DC Supply Voltage
Reverse DC Supply Voltage
DC Reverse Ground Pin Current
DC Output Current
Reverse DC Output Current
DC Input Current
DC Status Current
Electrostatic Discharge (R=1.5KΩ; C=100pF)
Power Dissipation TC=25°C
Junction Operating Temperature
Case Operating Temperature
Storage Temperature
3.1
Value
PENTAWATT
41
- 0.3
- 200
Internally Limited
-6
+/- 10
+/- 10
2000
42
Internally Limited
- 40 to 150
- 55 to 150
P2PAK
42
CONNECTION DIAGRAM (TOP VIEW)
VCC
OUTPUT
OUTPUT
VCC
5
4
8
1
N.C.
STATUS
INPUT
GND
SO-8
5
OUTPUT
4
STATUS
3
V
CC
2
INPUT
1
GND
P2PAK
PENTAWATT
CURRENT AND VOLTAGE CONVENTIONS
ICC
IIN
VCC
INPUT
ISTAT
IOUT
STATUS
VCC
OUTPUT
GND
VIN
VSTAT
2/15
1
IGND
VOUT
Unit
V
V
mA
A
A
mA
mA
V
W
°C
°C
°C
VN750 / VN750S / VN750-B5
THERMAL DATA
Symbol
Parameter
Rthj-pins
Thermal Resistance Junction-pins
Rthj-amb
Thermal Resistance Junction-ambient
Rthj-case
Thermal Resistance Junction-case
Max
Max
Max
S0-8
40
Value
PENTAWATT
-
P2PAK
-
°C/W
120
60
60
°C/W
-
3
3
°C/W
Unit
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C unless otherwise specified)
POWER
Symbol
VCC
VUSD
VUSDhyst
VOV
RON
IS
IL(off1)
IL(off2)
Parameter
Operating Supply Voltage
Under Voltage Shut-down
Under Voltage Shut-down
Hysteresis
Overvoltage Shut-down
On State Resistance
Supply Current
Off State Output Current
Off State Output Current
Test Conditions
Min
5.5
3
Typ
13
4
Max
36
5.5
0.5
36
IOUT=2A; Tj=25°C; VCC>8V
IOUT=2A; VCC>8V
Off State; VCC=13V
On State; VCC=13V
VIN=VOUT=0V
VIN=0V; VOUT =3.5V
(*)
V
48
60
V
mΩ
10
2
(*)
120
25
3.5
50
0
mΩ
µA
mA
µA
µA
Typ
Max
Unit
(*)
0
-75
Unit
V
V
SWITCHING (VCC=13V)
Symbol
Parameter
td(on)
Turn-on Delay Time
td(off)
Turn-off Delay Time
dVOUT/
dt(on)
dVOUT/
dt(off)
Turn-on Voltage Slope
Turn-off Voltage Slope
Test Conditions
RL=6.5Ω from VIN rising edge to
VOUT=1.3V
RL=6.5Ω from VIN falling edge to
VOUT=11.7V
RL=6.5Ω from VOUT=1.3V to
VOUT=10.4V
RL=6.5Ω from VOUT=11.7V to
VOUT=1.3V
Min
40
µs
30
µs
(*)
V/µs
(*)
V/µs
INPUT PIN
Symbol
VIL
IIL
VIH
IIH
Vhyst
VICL
Parameter
Input Low Level
Low Level Input Current
Input High Level
High Level Input Current
Input Hysteresis Voltage
Input Clamp Voltage
Test Conditions
VIN=1.25V
Min
1
3.25
VIN=3.25V
IIN=1mA
IIN=-1mA
0.5
6.5
Typ
(*)
(*)
(*)
(*)
(*)
(*)
-0.7
Max
1.25
10
8.5
Unit
V
µA
V
µA
V
V
V
(*) See curves at pages 9, 10, 11
3/15
1
VN750 / VN750S / VN750-B5
ELECTRICAL CHARACTERISTICS (continued)
STATUS PIN
Symbol
VSTAT
ILSTAT
CSTAT
VSCL
Parameter
Test Conditions
Status Low Output Voltage ISTAT=1.6mA
Status Leakage Current
Normal Operation VSTAT=5V
Status Pin Input
Normal Operation VSTAT=5V
Capacitance
ISTAT=1mA
Status Clamp Voltage
ISTAT=-1mA
Min
Typ
(*)
(*)
6.5
(*)
Max
0.5
10
Unit
V
µA
100
pF
8.5
V
-0.7
V
PROTECTIONS
Symbol
T TSD
TR
Thyst
tSDL
Parameter
Shut-down Temperature
Reset Temperature
Thermal Hysteresis
Status delay in overload
condition
Ilim
Current limitation
Vdemag
Turn-off Output Clamp
Voltage
Test Conditions
Min
150
135
7
Typ
175
6
9
5V<VCC<36V
IOUT =2A; VIN=0V; L=6mH
Unit
°C
°C
°C
20
µs
15
A
15
A
15
Tj>Tjsh
9V<VCC<36V
Max
200
VCC-41 VCC-48 VCC-55
V
OPENLOAD DETECTION
Symbol
IOL
tDOL(on)
VOL
tDOL(off)
Parameter
Openload ON State
Detection Threshold
Openload ON State
Detection Delay
Openload OFF State
Voltage Detection
Test Conditions
VIN=5V
Min
Typ
Max
Unit
50
(*)
200
mA
200
µs
3.5
V
1000
µs
IOUT=0A
VIN=0V
1.5
Threshold
Openload Detection Delay
at Turn Off
(*)
(*) See curves at pages 9, 10, 11
OPEN LOAD STATUS TIMING (with external pull-up)
IOUT< IOL
VOUT > VOL
OVER TEMP STATUS TIMING
T j > Tjsh
VIN
VIN
VSTAT
VSTAT
tDOL(off)
tDOL(on)
tSDL
tSDL
4/15
2
1
VN750 / VN750S / VN750-B5
Switching time Waveforms
VOUT
90%
80%
dVOUT/dt(off)
dVOUT /dt(on)
10%
t
VIN
td(on)
td(off)
t
TRUTH TABLE
CONDITIONS
Normal Operation
Current Limitation
Overtemperature
Undervoltage
Overvoltage
Output Voltage > VOL
Output Current < IOL
INPUT
L
H
L
H
L
H
L
H
L
H
L
H
L
H
OUTPUT
L
H
L
X
L
L
L
L
L
L
H
H
L
H
STATUS
H
H
H
H
H
L
X
X
H
H
L
H
H
L
5/15
1
VN750 / VN750S / VN750-B5
ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN
TEST LEVELS
ISO T/R 7637/1
Test Pulse
I
II
III
IV
1
2
3a
3b
4
5
-25 V
+25 V
-25 V
+25 V
-4 V
+26.5 V
-50 V
+50 V
-50 V
+50 V
-5 V
+46.5 V
-75 V
+75 V
-100 V
+75 V
-6 V
+66.5 V
-100 V
+100 V
-150 V
+100 V
-7 V
+86.5 V
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
5
CLASS
C
E
6/15
1
I
C
C
C
C
C
C
TEST LEVELS RESULTS
II
III
C
C
C
C
C
C
C
C
C
C
E
E
Delays and
Impedance
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
IV
C
C
C
C
C
E
CONTENTS
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
VN750 / VN750S / VN750-B5
Figure1: Waveforms
NORMAL OPERATION
INPUT
LOAD VOLTAGE
STATUS
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
INPUT
LOAD VOLTAGE
STATUS
undefined
OVERVOLTAGE
VCC<V OV
VCC>V OV
VCC
INPUT
LOAD VOLTAGE
STATUS
OPEN LOAD with external pull-up
INPUT
VOUT>VOL
LOAD VOLTAGE
VOL
STATUS
OPEN LOAD without external pull-up
INPUT
LOAD VOLTAGE
STATUS
Tj
TTSD
TR
OVERTEMPERATURE
INPUT
LOAD CURRENT
STATUS
7/15
1
1
VN750 / VN750S / VN750-B5
APPLICATION SCHEMATIC
+5V
+5V
VCC
Rprot
STATUS
Dld
µC
Rprot
INPUT
OUTPUT
GND
VGND
GND PROTECTION
REVERSE BATTERY
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / (I S(on)max).
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on many devices are ON in the case of several
high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
RGND
DGND
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (j 600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
LOAD DUMP PROTECTION
Dld is necessary (Transil or MOV) if the load dump peak
voltage exceeds VCC max DC rating. The same applies if
the device will be subject to transients on the VCC line that
are greater than the ones shown in the ISO T/R 7637/1
table.
µC I/Os PROTECTION:
If a ground protection network is used and negative
transients are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot)
in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up limit
of µC I/Os.
-VCCpeak /Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.
8/15
1
1
VN750 / VN750S / VN750-B5
Off State Output Current
High Level Input Current
IIH(µA)
IL(off1) (µA)
11
10
2.5
Off state
Vcc=36V
VIN=VOUT=0V
2.0
1.5
VIN=3.25V
9
8
7
6
1.0
5
0.5
4
0.0
3
-0.5
2
1
-1.0
-50
-25
25
0
50
75
100
125
150
Tc (°C)
Input Clamp Voltage
0
-50
-25
0
25
50
75
100
125
150
Tc(°C)
Status Leakage Current
VI CL (V)
ILSTAT (µA)
10.0
0.250
9.5
0.200
9.0
Vstat=5V
8.5
0.150
8.0
0.100
7.5
0.050
7.0
6.5
0.000
6.0
IIN=1mA
5.5
-0.050
-0.100
5.0
-50
-25
25
0
50
75
100
125
150
-50
Tc(°C)
Status Low Output Voltage
-25
0
25
50
75
100
75
100
125
150
Tc(°C)
Status Clamp Voltage
VSCL (V)
VSTAT (V)
9.5
0.550
9.0
0.500
Istat=1mA
Istat=1.6mA
0.450
8.5
0.400
8.0
0.350
7.5
0.300
7.0
0.250
0.200
6.5
0.150
6.0
0.100
5.5
-50
-25
0
25
50
75
100
125
150 Tc(°C)
-50
-25
0
25
50
125
150
Tc(°C)
9/15
1
VN750 / VN750S / VN750-B5
On State Resistance Vs Tcase
On State Resistance Vs VCC
RON (mOhm)
120
RON (mOhm)
130
IOUT=2A
Vcc=8V; 13V; 36V
110
Iout=2A
Tc=-40°C; 25°C; 125 °C; 150°C
120
100
110
90
100
150°C
80
90
70
80
60
70
50
60
40
50
25°C
30
40
-40°C
20
30
125°C
20
10
-50
-25
0
25
50
75
100
125
5
150 Tc(°C)
Openload On State Detection Threshold
10
15
20
25
30
35
Vcc (V)
Input High Level
VIH (V)
IOL (mA)
220
3.3
200
3.2
Vcc=13V
VIN=5V
180
160
3.1
140
3.0
120
2.9
100
2.8
80
2.7
60
2.6
40
2.5
20
-50
-25
0
25
50
75
100
125
150 Tc(°C)
Input Low Level
-50
-25
0
25
50
75
100
125
150 Tc(°C)
75
100
125
150 Tc(°C)
Input Hysteresis Voltage
VIL (V)
VHYST (V)
2.1
1.4
2.0
1.3
1.9
1.2
1.8
1.1
1.7
1.0
1.6
0.9
1.5
0.8
1.4
0.7
1.3
0.6
1.2
0.5
0.4
1.1
-50
-25
0
25
50
75
100
125
150 Tc(°C)
-50
-25
0
25
50
10/15
1
1
VN750 / VN750S / VN750-B5
Overvoltage Shutdown
Openload Off State Voltage Detection Threshold
VOL (V)
VOV (V)
46
3.50
VIN=0V
45
3.25
44
3.00
43
42
2.75
41
2.50
40
2.25
39
2.00
38
37
1.75
36
1.50
35
1.25
-50
-25
0
25
50
75
100
125
150 Tc(°C)
Turn-on Voltage Slope
0
25
50
75
100
125
150
Tc(°C)
dVOUT/dt(off) (V/ms)
450
Rl=6.5Ohm
300
-25
Turn-off Voltage Slope
dVOUT/dt(on) (V/ms)
325
-50
Rl=6.5Ohm
400
275
350
250
225
300
200
250
175
200
150
Avg
150
125
100
100
50
75
0
50
-50
-25
0
25
50
75
100
125
150 Tc(°C)
-50
-25
0
25
50
75
100
125
150 Tc(°C)
11/15
1
1
VN750 / VN750S / VN750-B5
SO-8 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
A
a1
inch
MAX.
MIN.
TYP.
1.75
0.1
0.068
0.25
a2
MAX.
0.003
0.009
1.65
0.064
a3
0.65
0.85
0.025
0.033
b
0.35
0.48
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.25
0.5
0.010
0.019
c1
45 (typ.)
D
4.8
5
0.188
0.196
E
5.8
6.2
0.228
0.244
e
1.27
e3
3.81
0.050
0.150
F
3.8
4
0.14
L
0.4
1.27
0.015
M
0.6
S
L1
0.157
0.050
0.023
8 (max.)
0.8
1.2
0.031
0.047
12/15
1
1
VN750 / VN750S / VN750-B5
PENTAWATT (VERTICAL) MECHANICAL DATA
DIM.
mm.
MIN.
TYP
A
inch
MAX.
MIN.
TYP.
4.8
C
MAX.
0.189
1.37
0.054
D
2.4
2.8
0.094
0.110
D1
1.2
1.35
0.047
0.053
E
0.35
0.55
0.014
0.022
F
0.8
1.05
0.031
0.041
F1
1
1.4
0.039
G
3.2
3.4
3.6
0.126
0.134
0.142
G1
6.6
6.8
7
0.260
0.268
0.276
H2
H3
0.055
10.4
10.05
10.4
0.409
0.396
0.409
L
17.85
0.703
L1
15.75
0.620
L2
21.4
0.843
L3
22.5
0.886
L5
2.6
3
L6
15.1
15.8
0.594
0.622
L7
6
6.6
0.236
0.260
M
4.5
M1
4
Diam.
3.65
0.102
0.118
0.177
0.157
3.85
0.144
0.152
13/15
1
VN750 / VN750S / VN750-B5
P2PAK MECHANICAL DATA
DIM.
A
mm.
MIN.
TYP
4.30
4.80
A2
0.03
0.23
C
1.17
1.37
D
2.40
2.80
D1
8.95
9.35
E
0.35
0.55
F
0.80
1.05
G
3.20
3.60
G1
6.60
7.00
H2
10.40
L
13.59
14.39
L2
1.27
1.40
L3
1.30
1
1.70
0.30
R
V2
14/15
inch
MAX.
0d
8d
MIN.
TYP.
MAX.
VN750 / VN750S / VN750-B5
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
 2000 STMicroelectronics - Printed in ITALY- All Rights Reserved.
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.
http://www.st.com
15/15