STMICROELECTRONICS VN800PTTR

VN800S(8961)
/ VN800PT(8961)
®
HIGH SIDE DRIVER
TYPE
VN800S(8961)
VN800PT(8961)
RDS(on)
IOUT
VCC
135 mΩ
1.2 A
36 V
CMOS COMPATIBLE INPUT
THERMAL SHUTDOWN
■ CURRENT LIMITATION
■ SHORTED LOAD PROTECTION
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
■ PROTECTION AGAINST LOSS OF GROUND
■ VERY LOW STAND-BY CURRENT
■ REVERSE BATTERY PROTECTION (*)
■
■
DESCRIPTION
The VN800S(8961), VN800PT(8961) are
monolithic
devices
made
by
using
STMicroelectronics VIPower M0-3 Technology,
intended for driving any kind of load with one side
connected to ground.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
SO-8
PPAK
ORDER CODES
PACKAGE
SO-8
PPAK
TUBE
T&R
VN800S(8961) VN800S(8961)TR
VN800PT(8961) VN800PT(8961)TR
compatibility table). Active current
combined with thermal shutdown and
restart protect the device against
Device automatically turns off in case
pin disconnection.
limitation
automatic
overload.
of ground
BLOCK DIAGRAM
VCC
OVERVOLTAGE
DETECTION
VCC
CLAMP
UNDERVOLTAGE
DETECTION
GND
Power CLAMP
DRIVER
OUTPUT
LOGIC
INPUT
CURRENT LIMITER
STATUS
OVERTEMPERATURE
DETECTION
(*) See note at page 8
July 2002
1/22
VN800S(8961) / VN800PT(8961)
ABSOLUTE MAXIMUM RATING
Value
Symbol
Parameter
VCC
- VCC
- IGND
IOUT
- IOUT
IIN
VIN
VSTAT
DC Supply Voltage
Reverse DC Supply Voltage
DC Reverse Ground Pin Current
DC Output Current
Reverse DC Output Current
DC Input Current
Input Voltage Range
DC Status Voltage
Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF)
VESD
EMAX
EMAX
Ptot
Tj
Tc
Tstg
Lmax
SO-8
PPAK
41
- 0.3
- 200
Internally Limited
-6
+/- 10
-3/+VCC
+ VCC
V
V
mA
A
A
mA
V
V
- INPUT
4000
V
- STATUS
4000
V
- OUTPUT
5000
V
- VCC
Maximum Switching Energy
5000
V
121
(L=77.5mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=1.5A)
Maximum Switching Energy
(L=125mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=1.5A)
Power Dissipation TC=25°C
Junction Operating Temperature
Case Operating Temperature
Storage Temperature
Max Inductive Load (VCC=30V; RLOAD=48Ω; Tamb=100°C;
mJ
195
mJ
4.2
41.7
Internally Limited
- 40 to 150
- 55 to 150
W
°C
°C
°C
2
Rthcase>ambient≤25°C/W)
CONNECTION DIAGRAM (TOP VIEW)
VCC
VCC
5
4
N.C.
OUTPUT
STATUS
OUTPUT
VCC
INPUT
8
1
GND
SO-8
5
4
3
2
OUTPUT
1
INPUT
GND
STATUS
PPAK
CURRENT AND VOLTAGE CONVENTIONS
IS
IIN
VCC
INPUT
ISTAT
IOUT
STATUS
VCC
OUTPUT
GND
VIN
VSTAT
2/22
Unit
IGND
VOUT
H
VN800S(8961) / VN800PT(8961)
THERMAL DATA
Symbol
Value
Parameter
Rthj-case
Thermal Resistance Junction-case
Rthj-lead
Thermal Resistance Junction-lead
Rthj-amb
Thermal Resistance Junction-ambient
Max
Max
Max
Unit
SO-8
-
PPAK
3
°C/W
30
-
°C/W
93 (*)
78 (**)
°C/W
(*) When mounted on FR4 printed circuit board with 0.5 cm2 of copper area (at least 35µ thick) connected to all VCC pins.
(**) When mounted on FR4 printed circuit board with 0.5 cm2 of copper area (at least 35µ thick).
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C, unless otherwise specified)
POWER
Symbol
VCC
VUSD
VOV
RON
IS
Parameter
Operating Supply Voltage
Undervoltage Shut-down
Overvoltage Shut-down
On State Resistance
Supply Current
ILGND
Output Current at turn-off
IL(off1)
IL(off2)
IL(off3)
Off State Output Current
Off State Output Current
Off State Output Current
Test Conditions
Min
5.5
3
36
Typ
135
Unit
V
V
V
mΩ
10
270
20
mΩ
µA
1.5
3.5
mA
2.6
mA
1
mA
50
5
3
µA
µA
µA
Max
Unit
4
IOUT =0.5A; Tj=25°C
IOUT=0.5A
Off State; VCC=24V; Tcase=25°C
On State; VCC=24V
On State; VCC=24V; Tcase=100°C
VCC=VSTAT=VIN=VGND=24V
VOUT=0V
VIN=VOUT=0V
VIN=VOUT=0V; Vcc=13V; Tj =125°C
VIN=VOUT=0V; Vcc=13V; Tj =25°C
0
Max
36
5.5
SWITCHING (VCC=24V)
Symbol
Parameter
td(on)
Turn-on Delay Time
td(off)
Turn-off Delay Time
Test Conditions
RL=48Ω from VIN rising edge to
VOUT=2.4V
RL=48Ω from VIN falling edge to
VOUT=21.6V
dVOUT/
dt(on)
Turn-on Voltage Slope
RL=48Ω from VOUT=2.4V to
VOUT=19.2V
dVOUT/
dt(off)
Turn-off Voltage Slope
RL=48Ω from VOUT=21.6V to
VOUT=2.4V
Min
Typ
10
µs
40
µs
See
relative
diagram
See
relative
diagram
V/µs
V/µs
INPUT PIN
Symbol
VINL
IINL
VINH
IINH
VI(hyst)
IIN
Parameter
Input Low Level
Low Level Input Current
Input High Level
High Level Input Current
Input Hysteresis Voltage
Input Current
Test Conditions
VIN=1.25V
Min
Typ
Max
1.25
1
3.25
VIN=3.25V
10
0.5
VIN=VCC=36V
200
Unit
V
µA
V
µA
V
µA
3/22
1
VN800S(8961) / VN800PT(8961)
ELECTRICAL CHARACTERISTICS (continued)
STATUS PIN
Symbol
VSTAT
ILSTAT
CSTAT
Parameter
Test Conditions
Status Low Output Voltage ISTAT=1.6 mA
Status Leakage Current
Normal Operation; VSTAT=VCC=36 V
Status Pin Input
Normal Operation; VSTAT= 5V
Capacitance
Min
Typ
Max
0.5
10
Unit
V
µA
30
pF
Max
200
Unit
°C
°C
°C
20
µs
2
A
PROTECTIONS
Symbol
TTSD
TR
Thyst
TSDL
Ilim
Vdemag
Parameter
Shut-down Temperature
Reset Temperature
Thermal Hysteresis
Status Delay in Overload
Condition
DC Short Circuit Current
Turn-off Output Clamp
Voltage
Test Conditions
Tj>Tjsh
VCC=16V; RLOAD=10mΩ
IOUT=0.5 A; L=6mH
OVERTEMP STATUS TIMING
Tj>Tjsh
VIN
VSTAT
tSDL
4/22
2
Min
150
135
7
tSDL
1.2
Typ
175
15
VCC-47 VCC-52 VCC-57
V
VN800S(8961) / VN800PT(8961)
Switching time Waveforms
VOUT
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
10%
tr
tf
t
VIN
td(on)
td(off)
t
TRUTH TABLE
CONDITIONS
Normal Operation
Current Limitation
Overtemperature
Undervoltage
Overvoltage
INPUT
L
H
L
H
H
L
H
L
H
L
H
OUTPUT
L
H
L
X
X
L
L
L
L
L
L
STATUS
H
H
H
(Tj < TTSD) H
(Tj > TTSD) L
H
L
X
X
H
H
5/22
VN800S(8961) / VN800PT(8961)
Figure 1: Peak Short Circuit Current Test Circuit
+VCC
10kΩ
STATUS
CONTROL
UNIT
VCC
INPUT
OUTPUT
RIN
GND
RL=10mΩ
GND
Figure 2: Avalanche Energy Test Circuit
+VCC
10kΩ
STATUS
CONTROL
UNIT
VCC
INPUT
OUTPUT
RIN
GND
LOAD
GND
6/22
VN800S(8961) / VN800PT(8961)
ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN
TEST LEVELS
ISO T/R 7637/1
Test Pulse
I
II
III
IV
1
2
3a
3b
4
5
-25 V
+25 V
-25 V
+25 V
-4 V
+26.5 V
-50 V
+50 V
-50 V
+50 V
-5 V
+46.5 V
-75 V
+75 V
-100 V
+75 V
-6 V
+66.5 V
-100 V
+100 V
-150 V
+100 V
-7 V
+86.5 V
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
5
CLASS
C
E
Delays and
Impedance
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
I
TEST LEVELS RESULTS
II
III
IV
C
C
C
C
C
C
C
C
C
C
C
E
C
C
C
C
C
E
C
C
C
C
C
E
CONTENTS
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
7/22
VN800S(8961) / VN800PT(8961)
APPLICATION SCHEMATIC
VCC
24VDC
5V
Volt.
Reg
Control & Diagnostic I/O
VCC
Rprot
D id
STATUS
Rprot
INPUT
OUTPUT
BUS
ASIC
LOAD
R
GND
L
VGND RGND
GND PROTECTION
REVERSE BATTERY
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / (IS(on)max).
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on many devices are ON in the case of several
high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
8/22
DGND
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating. The
same applies if the device will be subject to transients on
the VCC line that are greater than the ones shown in the
ISO T/R 7637/1 table.
µC I/Os PROTECTION:
If a ground protection network is used and negative
transients are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot )
in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up limit
of µC I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.
VN800S(8961) / VN800PT(8961)
Figure 3: Waveforms
NORMAL OPERATION
INPUT
LOAD VOLTAGE
STATUS
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
INPUT
LOAD VOLTAGE
STATUS
undefined
OVERVOLTAGE
VCC<VOV
VCC>VOV
VCC
INPUT
LOAD VOLTAGE
STATUS
Tj
TTSD
TR
OVERTEMPERATURE
INPUT
LOAD CURRENT
STATUS
9/22
VN800S(8961) / VN800PT(8961)
High Level Input Current
Off State Output Current
IL(off1) (µA)
Iih (µA)
2.5
8
2.25
7
Off state
Vcc=36V
Vin=Vout=0V
2
1.75
Vin=3.25V
6
5
1.5
1.25
4
1
3
0.75
2
0.5
1
0.25
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC)
50
75
100
125
150
175
125
150
175
Tc (ºC)
ILIM Vs Tcase
Status Leakage Current
Ilim (A)
Ilstat (µA)
0.1
2.5
0.09
2.25
Vstat=Vcc=36V
0.08
2
0.07
1.75
0.06
1.5
0.05
1.25
0.04
1
0.03
0.75
0.02
0.5
0.01
0.25
Vcc=24V
Rl=10mOhm
0
0
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
50
75
100
Tc (ºC)
Tc (ºC)
On State Resistance Vs Tcase
On State Resistance Vs VCC
Ron (mOhm)
Ron (mOhm)
400
400
350
350
Iout=0.5A
Vcc=8V; 13V; 36V
300
Iout=0.5A
300
250
250
200
200
150
150
100
100
50
50
Tc= 150ºC
Tc= 25ºC
0
0
-50
-25
0
25
50
75
Tc (ºC)
10/22
Tc= - 40ºC
100
125
150
175
5
10
15
20
25
Vcc (V)
30
35
40
VN800S(8961) / VN800PT(8961)
Input High Level
Input Low Level
Vih (V)
Vil (V)
3.6
2.6
3.4
2.4
3.2
2.2
3
2
2.8
1.8
2.6
1.6
2.4
1.4
2.2
1.2
1
2
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
50
75
100
125
150
175
125
150
175
Tc (°C)
Tc (°C)
Input Hysteresis Voltage
Overvoltage Shutdown
Vhyst (V)
Vov (V)
1.5
50
1.4
48
1.3
46
1.2
44
1.1
42
1
40
0.9
38
0.8
36
0.7
34
0.6
32
30
0.5
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
50
75
100
Tc (°C)
Tc (°C)
Turn-on Voltage Slope
Turn-off Voltage Slope
dVout/dt(on) (V/ms)
dVout/dt(off) (V/ms)
1600
800
1
700
1400
Vcc=24V
Rl=48Ohm
1200
Vcc=24V
Rl=48Ohm
600
1000
500
800
400
600
300
400
200
200
100
0
0
-50
-25
0
25
50
75
Tc (ºC)
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
11/22
VN800S(8961) / VN800PT(8961)
PPAK Maximum turn off current versus load inductance
ILMAX (A)
10
A
B
1
C
0.1
1
10
100
1000
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
12/22
VN800S(8961) / VN800PT(8961)
SO-8 Maximum turn off current versus load inductance
ILMAX (A)
10
A
B
1
C
0.1
1
10
100
1000
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
13/22
VN800S(8961) / VN800PT(8961)
SO-8 THERMAL DATA
SO-8 PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: 0.14cm2, 2cm2).
Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb (ºC/W)
SO8 at 2 pins connected to TAB
110
105
100
95
90
85
80
75
70
0
0.5
1
1.5
PCB Cu heatsink area (cm^2)
14/22
2
2.5
VN800S(8961) / VN800PT(8961)
PPAK THERMAL DATA
PPAK PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: 0.44cm2, 8cm2).
Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb (ºC/W)
90
80
70
60
50
40
30
20
10
0
0
2
4
6
8
10
PCB Cu heatsink area (cm^2)
15/22
VN800S(8961) / VN800PT(8961)
PPAK Thermal Impedance Junction Ambient Single Pulse
ZTH (°C/W)
1000
100
0.44 cm2
6 cm2
10
1
0.1
0.0001
0.001
0.01
0.1
1
Time (s)
Thermal fitting model of a single channel HSD
in PPAK
10
100
1000
Pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where
δ = tp ⁄ T
Thermal Parameter
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
T_amb
16/22
Area/island (cm2)
R1 (°C/W)
R2 (°C/W)
R3 ( °C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
0.44
0.04
0.25
0.3
2
15
61
0.0008
0.007
0.02
0.3
0.45
0.8
6
24
5
VN800S(8961) / VN800PT(8961)
SO-8 Thermal Impedance Junction Ambient Single Pulse
ZT H (°C/W)
1000
0.5 cm2
100
2 cm2
10
1
0.1
0.0001
0.001
0.01
0.1
1
T ime (s)
Thermal fitting model of a single channel HSD
in SO-8
10
100
1000
Pulse calculation formula
Z THδ = RTH ⋅ δ + Z THtp ( 1 – δ )
where
δ = tp ⁄ T
Thermal Parameter
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
T_amb
Area/island (cm2)
R1 (°C/W)
R2 (°C/W)
R3 ( °C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
0.14
0.24
1.2
4.5
21
16
58
0.00015
0.0005
7.50E-03
0.045
0.35
1.05
2
28
2
17/22
VN800S(8961) / VN800PT(8961)
SO-8 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
A
a1
inch
MAX.
TYP.
1.75
0.1
MAX.
0.068
0.25
a2
0.003
0.009
1.65
0.064
a3
0.65
0.85
0.025
0.033
b
0.35
0.48
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.25
0.5
0.010
0.019
c1
45 (typ.)
D
4.8
5
0.188
0.196
E
5.8
6.2
0.228
0.244
e
1.27
e3
3.81
0.050
0.150
F
3.8
4
0.14
L
0.4
1.27
0.015
M
0.6
S
L1
18/22
MIN.
0.157
0.050
0.023
8 (max.)
0.8
1.2
0.031
0.047
VN800S(8961) / VN800PT(8961)
PPAK MECHANICAL DATA
DIM.
MIN.
TYP
MAX.
A
2.20
2.40
A1
0.90
1.10
A2
0.03
0.23
B
0.40
0.60
B2
5.20
5.40
C
0.45
0.60
C2
0.48
0.60
D1
5.1
D
6.00
6.20
E
6.40
6.60
E1
4.7
e
1.27
G
4.90
G1
2.38
2.70
H
9.35
10.10
L2
L4
0.8
0.60
R
V2
Package Weight
5.25
1.00
1.00
0.2
0º
8º
Gr. 0.3
P032T1
19/22
VN800S(8961) / VN800PT(8961)
SO-8 TUBE SHIPMENT (no suffix)
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
A
100
2000
532
3.2
6
0.6
All dimensions are in mm.
TAPE AND REEL SHIPMENT (suffix “13TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
12
4
8
1.5
1.5
5.5
4.5
2
End
Start
Top
No components
Components
No components
cover
tape
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
20/22
500mm min
VN800S(8961) / VN800PT(8961)
PPAK TUBE SHIPMENT (no suffix)
A
C
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
B
75
3000
532
6
21.3
0.6
All dimensions are in mm.
TAPE AND REEL SHIPMENT (suffix “13TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
16.4
60
22.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
16
4
8
1.5
1.5
7.5
6.5
2
End
Start
Top
cover
tape
No components
Components
No components
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
21/22
1
VN800S(8961) / VN800PT(8961)
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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 2002 STMicroelectronics - Printed in ITALY- All Rights Reserved.
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22/22