FAIRCHILD FDMC86520L

FDMC86520L
N-Channel Power Trench® MOSFET
60 V, 22 A, 7.9 mΩ
Features
General Description
„ Max rDS(on) = 7.9 mΩ at VGS = 10 V, ID = 13.5 A
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency and to minimize switch node
ringing of DC/DC converters using either synchronous or
conventional switching PWM controllers.It has been optimized
for low gate charge, low rDS(on), fast switching speed and body
diode reverse recovery performance.
„ Max rDS(on) = 11.7 mΩ at VGS = 4.5 V, ID = 11.5 A
„ Low Profile - 1 mm max in Power 33
„ 100% UIL Tested
„ RoHS Compliant
Applications
„ Primary Switch in isolated DC-DC
„ Synchronous Rectifier
„ Load Switch
Bottom
Top
Pin 1
S
S
G
S
D
D
D
D
5
4
G
D
6
3
S
D
7
2
S
D
8
1
S
D
MLP 3.3x3.3
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current -Continuous (Package limited)
ID
TC = 25 °C
-Continuous (Silicon limited)
TC = 25 °C
-Continuous
TA = 25 °C
PD
TJ, TSTG
Units
V
±20
V
22
55
(Note 1a)
-Pulsed
13.5
A
60
Single Pulse Avalanche Energy
EAS
Ratings
60
(Note 3)
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
79
40
(Note 1a)
Operating and Storage Junction Temperature Range
2.3
-55 to +150
mJ
W
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
RθJA
Thermal Resistance, Junction to Ambient
3.1
(Note 1a)
53
°C/W
Package Marking and Ordering Information
Device Marking
FDMC86520L
Device
FDMC86520L
©2011 Fairchild Semiconductor Corporation
FDMC86520L Rev.C
Package
Power 33
1
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com
FDMC86520L N-Channel PowerTrench® MOSFET
August 2011
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 48 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
±100
nA
3
V
60
V
29
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
VGS = 10 V, ID = 13.5 A
6.5
7.9
rDS(on)
Static Drain to Source On Resistance
VGS = 4.5 V, ID = 11.5 A
9.1
11.7
VGS = 10 V, ID = 13.5 A, TJ = 125 °C
9
11
VDS = 5 V, ID = 13.5 A
49
gFS
Forward Transconductance
1
1.7
-7
mV/°C
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = 30 V, VGS = 0 V,
f = 1 MHz
3420
4550
pF
638
850
pF
25
40
pF
Ω
0.5
Switching Characteristics
td(on)
Turn-On Delay Time
15
30
ns
tr
Rise Time
5.2
10
ns
td(off)
Turn-Off Delay Time
32
55
ns
tf
Fall Time
3.4
10
ns
45
64
nC
21
30
VDD = 30 V, ID = 13.5 A,
VGS = 10 V, RGEN = 6 Ω
Qg(TOT)
Total Gate Charge
VGS = 0 V to 10 V
Qg(TOT)
Total Gate Charge
VGS = 0 V to 4.5 V
Qgs
Total Gate Charge
Qgd
Gate to Drain “Miller” Charge
VDD = 30 V,
ID = 13.5 A
nC
9.6
nC
4.9
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 13.5 A
(Note 2)
0.82
1.3
VGS = 0 V, IS = 2 A
(Note 2)
0.71
1.2
38
62
ns
21
34
nC
IF = 13.5 A, di/dt = 100 A/μs
V
NOTES:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
125 °C/W when mounted on
a minimum pad of 2 oz copper
53 °C/W when mounted on a
1 in2 pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. Starting TJ = 25 °C; N-ch: L = 0.3 mH, IAS = 23 A, VDD = 54 V, VGS = 10 V.
FDMC86520L Rev.C
2
www.fairchildsemi.com
FDMC86520L N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
60
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
4
ID, DRAIN CURRENT (A)
VGS = 4 V
50
VGS = 3.5 V
40
VGS = 10 V
VGS = 4.5 V
30
VGS = 3 V
20
10
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0
0.5
1.0
1.5
2.0
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
3
VGS = 3 V
VGS = 3.5 V
2
VGS = 4 V
VGS = 4.5 V
1
VGS = 10 V
0
2.5
0
10
Figure 1. On Region Characteristics
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
0.6
-75
-50
-25
0
25
50
75
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID = 13.5 A
VGS = 10 V
ID = 13.5 A
50
60
20
TJ = 125 oC
10
TJ = 25 oC
0
100 125 150
2
6
8
10
Figure 4. On-Resistance vs Gate to
Source Voltage
100
IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VDS = 5 V
40
30
TJ = 150 oC
20
TJ = 25 oC
10
TJ = -55 oC
VGS = 0 V
10
TJ = 150 oC
1
TJ = 25 oC
0.1
0.01
TJ = -55 oC
0.001
2.0
2.5
3.0
3.5
4.0
0
VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
FDMC86520L Rev.C
4
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
0
1.5
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
30
TJ, JUNCTION TEMPERATURE (oC)
ID, DRAIN CURRENT (A)
40
40
1.6
50
30
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.8
60
20
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
3
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FDMC86520L N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
10000
ID = 13.5 A
VDD = 30 V
8
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
VDD = 40 V
VDD = 20 V
6
4
Ciss
1000
Coss
100
10
2
f = 1 MHz
VGS = 0 V
0
0
10
20
30
40
1
0.1
50
1
Figure 7. Gate Charge Characteristics
60
Figure 8. Capacitance vs Drain
to Source Voltage
60
ID, DRAIN CURRENT (A)
50
IAS, AVALANCHE CURRENT (A)
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
TJ = 25 oC
10
TJ = 100 oC
50
VGS = 10 V
40
VGS = 4.5 V
30
20
Limited by package
10
TJ = 125 oC
1
0.01
0.1
1
o
RθJC = 3.1 C/W
10
0
25
100
50
P(PK), PEAK TRANSIENT POWER (W)
100 us
10
1 ms
10 ms
100 ms
SINGLE PULSE
TJ = MAX RATED
0.1
1s
RθJA = 125 oC/W
10 s
DC
o
TA = 25 C
0.01
0.01
0.1
1
10
100 300
150
2000
1000
SINGLE PULSE
RθJA = 125 oC/W
TA = 25 oC
100
10
1
0.5
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, PULSE WIDTH (sec)
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
FDMC86520L Rev.C
125
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
100
THIS AREA IS
LIMITED BY rDS(on)
100
o
Figure 9. Unclamped Inductive
Switching Capability
1
75
TC, CASE TEMPERATURE ( C)
tAV, TIME IN AVALANCHE (ms)
ID, DRAIN CURRENT (A)
Crss
Figure 12. Single Pulse Maximum
Power Dissipation
4
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FDMC86520L N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
NORMALIZED THERMAL
IMPEDANCE, ZθJA
2
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
0.01
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
SINGLE PULSE
o
RθJA = 125 C/W
0.001
0.0005
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
FDMC86520L Rev.C
5
www.fairchildsemi.com
FDMC86520L N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
3.30
0.10 C
A
B
2X
3.30
PIN#1 QUADRANT
0.10 C
TOP VIEW
2X
0.8 MAX
0.10 C
RECOMMENDED LAND PATTERN
(0.20)
0.08 C
0.05
0.00
SIDE VIEW
SEATING
PLANE
PIN #1 IDENT
1
(4X) 0.55
0.45
2.32
2.22
0.79
A. DOES NOT CONFORM TO JEDEC
REGISTRATION MO-229
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY
4
0.35
1.15
R0.15
2.05
1.95
0.30
E. DRAWING FILE NAME : MLP08Srev1
8
5
0.65
1.95
0.40 (8X)
0.30
0.10
0.05
C A B
C
BOTTOM VIEW
FDMC86520L Rev.C
6
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FDMC86520L N-Channel PowerTrench® MOSFET
Dimensional Outline and Pad Layout
tm
tm
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
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PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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THEREIN, WHICH COVERS THESE PRODUCTS.
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EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used here in:
1. Life support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.
2.
A critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or
effectiveness.
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I55
FDMC86520L Rev.C
7
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FDMC86520L N-Channel PowerTrench® MOSFET
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