FDMS8018 N-Channel PowerTrench® MOSFET 30 V, 120 A, 1.8 mΩ Features General Description Max rDS(on) = 1.8 mΩ at VGS = 10 V, ID = 30 A Max rDS(on) = 2.4 mΩ at VGS = 4.5 V, ID = 26 A This N-Channel MOSFET has been designed specifically to improve the overall efficiency and to minimize switch node ringing of DC/DC converters using either synchronous or conventional switching PWM controllers.It has been optimized for low gate charge, low rDS(on), fast switching speed ang body diode reverse recovery performance. Advanced Package and Silicon combination for low rDS(on) and high efficiency Next generation enhanced engineered for soft recovery body diode technology, Applications MSL1 robust package design VRM Vcore Switching for Desktop and Server 100% UIL tested OringFET / Load Switching RoHS Compliant DC-DC Conversion Motor Bridge Switch Bottom Top Pin 1 S S Pin 1 D D D S G S D S D S D G D D Power 56 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage (Note 4) Drain Current -Continuous (Package limited) ID TC = 25 °C TJ, TSTG ±20 V 120 -Continuous (Package limited) TC = 100 °C 100 TC = 25 °C 174 -Continuous TA = 25 °C (Note 1a) -Pulsed PD Units V -Continuous (Silicon limited) A 30 180 Single Pulse Avalanche Energy EAS Ratings 30 (Note 3) Power Dissipation TC = 25 °C Power Dissipation TA = 25 °C 126 83 (Note 1a) Operating and Storage Junction Temperature Range 2.5 -55 to +150 mJ W °C Thermal Characteristics RθJC Thermal Resistance, Junction to Case RθJA Thermal Resistance, Junction to Ambient 1.5 (Note 1a) 50 °C/W Package Marking and Ordering Information Device Marking FDMS8018 Device FDMS8018 ©2011 Fairchild Semiconductor Corporation FDMS8018 Rev.C Package Power 56 1 Reel Size 13 ’’ Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMS8018 N-Channel PowerTrench® MOSFET December 2011 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V IGSS Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V 30 V 14 mV/°C 1 μA 100 nA 3.0 V On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C -6 VGS = 10 V, ID = 30 A 1.5 rDS(on) Static Drain to Source On Resistance VGS = 4.5 V, ID = 26 A 1.9 2.4 VGS = 10 V, ID = 30 A, TJ = 125 °C 2.2 2.7 VDS = 5 V, ID = 30 A 194 gFS Forward Transconductance 1.0 1.5 mV/°C 1.8 mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = 15 V, VGS = 0 V, f = 1 MHz 3935 5235 pF 1380 1835 pF 137 210 pF Ω 0.9 Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg Total Gate Charge VGS = 0 V to 10 V VGS = 0 V to 4.5 V VDD = 15 V, ID = 30 A VDD = 15 V, ID = 30 A, VGS = 10 V, RGEN = 6 Ω Qg Total Gate Charge Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge 15 27 7.3 15 ns ns 38 62 ns 4.8 10 ns 58 61 nC 28 39 nC 10.3 nC 7.7 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 2.1 A (Note 2) 0.67 1.1 VGS = 0 V, IS = 30 A (Note 2) 0.77 1.2 IF = 30 A, di/dt = 100 A/μs IF = 30 A, di/dt = 300 A/μs V 43 69 ns 25 40 nC 34 55 ns 46 72 nC Notes: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 50 °C/W when mounted on a 1 in2 pad of 2 oz copper b) 125 °C/W when mounted on a minimum pad of 2 oz copper. SS SF DS DF G SS SF DS DF G 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. Starting TJ = 25 °C; N-ch: L = 0.3 mH, IAS = 29 A, VDD = 27 V, VGS = 10 V. 4.As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied. FDMS8018 Rev.C 2 www.fairchildsemi.com FDMS8018 N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted 180 VGS = 4 V VGS = 3.5 V 120 VGS = 3 V 90 60 30 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0 0.5 1.0 1.5 2.0 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 150 ID, DRAIN CURRENT (A) 5 VGS = 10V VGS = 4.5 V 4 VGS = 3 V 3 VGS = 3.5 V 2 VGS = 4 V 1 0 2.5 0 30 60 Figure 1. On Region Characteristics 120 150 180 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.6 8 ID = 30 A VGS = 10 V 1.5 rDS(on), DRAIN TO 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 -75 -50 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 90 ID, DRAIN CURRENT (A) VDS, DRAIN TO SOURCE VOLTAGE (V) 180 IS, REVERSE DRAIN CURRENT (A) 120 TJ = 150 oC 90 TJ = 25 oC 60 30 TJ = -55 oC 2.5 4 TJ = 125 oC 2 TJ = 25 oC 2 4 6 8 10 1000 VDS = 5 V 2.0 6 Figure 4. On-Resistance vs Gate to Source Voltage 150 1.5 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VGS, GATE TO SOURCE VOLTAGE (V) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 1.0 ID = 30 A 0 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) Figure 3. Normalized On Resistance vs Junction Temperature ID, DRAIN CURRENT (A) VGS = 10 V VGS = 4.5 V 3.0 3.5 VGS = 0 V 100 10 TJ = 25 oC 1 0.1 TJ = -55 oC 0.01 0.001 0.0 4.0 TJ = 150 oC 0.2 0.4 0.6 0.8 1.0 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current FDMS8018 Rev.C 3 1.2 www.fairchildsemi.com FDMS8018 N-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted 10000 ID = 30 A Ciss 8 CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 15 V 6 VDD = 10 V VDD = 20 V 4 1000 Coss 100 Crss 2 0 f = 1 MHz VGS = 0 V 0 10 20 30 40 50 10 0.1 60 1 Figure 7. Gate Charge Characteristics 200 100 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) 50 Figure 8. Capacitance vs Drain to Source Voltage 200 TJ = 25 oC TJ = 100 oC 10 TJ = 125 oC 150 VGS = 10 V 100 VGS = 4.5 V Limited by Package 50 o RθJC = 1.5 C/W 1 0.001 0.01 0.1 1 10 100 0 25 1000 50 125 150 Figure 10. Maximum Continuous Drain Current vs Case Temperature 5000 100 P(PK), PEAK TRANSIENT POWER (W) 500 100 us 10 1 ms 10 ms THIS AREA IS LIMITED BY rDS(on) 0.1 100 ms SINGLE PULSE TJ = MAX RATED 1s RθJA = 125 oC/W 10 s DC TA = 25 oC 0.01 0.01 0.1 1 10 100 SINGLE PULSE RθJA = 125 oC/W 1000 TA = 25 oC 100 10 1 0.5 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, PULSE WIDTH (sec) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 11. Forward Bias Safe Operating Area FDMS8018 Rev.C 100 o Figure 9. Unclamped Inductive Switching Capability 1 75 TC, CASE TEMPERATURE ( C) tAV, TIME IN AVALANCHE (ms) ID, DRAIN CURRENT (A) 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 12. Single Pulse Maximum Power Dissipation 4 www.fairchildsemi.com FDMS8018 N-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted NORMALIZED THERMAL IMPEDANCE, ZθJA 2 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 0.01 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE o RθJA = 125 C/W 0.001 0.0004 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Ambient Transient Thermal Response Curve FDMS8018 Rev.C 5 www.fairchildsemi.com FDMS8018 N-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted 5.10 4.90 A PKG CL 8 5.10 3.91 B 5 8 7 6 1.27 5 0.77 4.52 PIN #1 IDENT MAY APPEAR AS OPTIONAL 1 KEEP OUT AREA 3.75 6.25 5.90 PKG CL 6.61 1.27 TOP VIEW 4 1 2 3 4 0.61 1.27 SEE DETAIL A 3.81 LAND PATTERN RECOMMENDATION SIDE VIEW 5.10 4.90 3.81 OPTIONAL DRAFT ANGLE MAY APPEAR ON FOUR SIDES OF THE PACKAGE 1.27 1 2 3 6 0.46 (8X) 0.36 0.10 C A B (0.39) 4 (0.52) 0.71 0.44 CHAMFER CORNER AS PIN #1 IDENT MAY APPEAR AS OPTIONAL 6.25 5.90 (0.50) (1.81) (3.40) 4.29 4.09 (1.19) 8 7 6 0.15 MAX (2X) 5 3.86 3.61 OPTION - B (PUNCHED TYPE) 0.71 0.44 BOTTOM VIEW 0.10 C 0.08 C 1.10 0.90 0.30 0.20 0.05 0.00 DETAIL A 5.85 5.65 C SEATING PLANE NOTES: UNLESS OTHERWISE SPECIFIED A) PACKAGE STANDARD REFERENCE: JEDEC MO-240, ISSUE A, VAR. AA, DATED OCTOBER 2002. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH. MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM. D) DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994. E) IT IS RECOMMENDED TO HAVE NO TRACES OR VIAS WITHIN THE KEEP OUT AREA. F) DRAWING FILE NAME: PQFN08AREV6. SCALE: 2:1 OPTION - A (SAWN TYPE) FDMS8018 Rev.C 6 www.fairchildsemi.com FDMS8018 N-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout tm tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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