Freescale Semiconductor Technical Data 2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver The MC100ES6014 is a low skew 1-to-5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or single-ended (if the VBB output is used). HSTL and LVDS inputs can be used when the ES6014 is operating under PECL conditions. The ES6014 specifically guarantees low output-to-output skew. Optimal design, layout, and processing minimize skew within a device and from device to device. To ensure that the tight skew specification is realized, both sides of any differential output need to be terminated identically into 50 Ω even if only one output is being used. If an output pair is unused, both outputs may be left open (unterminated) without affecting skew. The common enable (EN) is synchronous, outputs are enabled/disabled in the LOW state. This avoids a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. The internal flip flop is clocked on the falling edge of the input clock; therefore, all associated specification limits are referenced to the negative edge of the clock input. The MC100ES6014, as with most other ECL devices, can be operated from a positive VCC supply in PECL mode. This allows the ES6014 to be used for high performance clock distribution in +3.3 V or +2.5 V systems. Single ended CLK input pin operation is limited to a VCC ≥ 3.0 V in PECL mode, or VEE ≤ –3.0 V in ECL mode. Designers can take advantage of the ES6014's performance to distribute low skew clocks across the backplane or the board. Features • • • • • • • • • 25 ps Within Device Skew 400 ps Typical Propagation Delay Maximum Frequency > 2 GHz Typical The 100 Series Contains Temperature Compensation PECL and HSTL Mode: VCC = 2.375 V to 3.8 V with VEE = 0 V ECL Mode: VCC = 0 V with VEE = –2.375 V to –3.8 V LVDS and HSTL Input Compatible Open Input Default State 20-Lead Pb-Free Package Available © Freescale Semiconductor, Inc., 2005. All rights reserved. MC100ES6014 Rev 3, 06/2005 MC100ES6014 DT SUFFIX 20-LEAD TSSOP PACKAGE CASE 948E-03 EJ SUFFIX 20-LEAD TSSOP PACKAGE Pb-FREE PACKAGE CASE 948E-03 ORDERING INFORMATION Device Package MC100ES6014DT TSSOP-20 MC100ES6014DTR2 TSSOP-20 MC100ES6014EJ TSSOP-20 (Pb-Free) MC100ES6014EJR2 TSSOP-20 (Pb-Free) VCC EN VCC CLK1 CLK1 VBB CLK0 20 19 18 17 16 15 14 13 12 11 1 D CLK0 CLK_SEL VEE 0 Q 1 2 3 4 5 6 7 8 9 10 Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 Q4 Q4 Warning: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation. Figure 1. 20-Lead Pinout (Top View) and Logic Diagram Table 1. Pin Description Pin Table 2. Function Table Function CLK0*, CLK0** ECL/PECL/HSTL CLK Input CLK1*, CLK1** ECL/PECL/HSTL CLK Input Q0:4, Q0:4 ECL/PECL Outputs CLK_SEL* ECL/PECL Active Clock Select Input EN* ECL Sync Enable VBB Reference Voltage Output VCC Positive Supply VEE Negative Supply CLK0 CLK1 CLK_SEL EN Q L H X X X X X L H X L L H H X L L L L H L H L H L* * On next negative transition of CLK0 or CLK1 * Pins will default LOW when left open. ** Pins will default to VCC/2 when left open. Table 3. General specifications Characteristics Value Internal Input Pulldown Resistor 75 kΩ Internal Input Pullup Resistor 75 kΩ ESD Protection Human Body Model Machine Model Charged Device Model > 2000 V > 200 V > 1500 V Thermal Resistance (Junction-to-Ambient) 0 LFPM, 20 TSSOP 500 LFPM, 20 TSSOP 140°C/W 100°C/W Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test MC100ES6014 2 Advanced Clock Drivers Device Data Freescale Semiconductor Table 4. Absolute Maximum Ratings(1) Symbol VSUPPLY Characteristic Conditions Power Supply Voltage VIN Input Voltage IOUT Output Current Rating Units Difference between VCC & VEE 3.9 V VCC – VEE ≤ 3.6 V VCC + 0.3 VEE – 0.3 V Continuous Surge 50 100 mA mA ±0.5 °C IBB VBB Sink/Source Current TA Operating Temperature Range –40 to +85 °C Storage Temperature Range –65 to +150 °C TSTG 1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated conditions is not implied. Table 5. DC Characteristics (VCC = 0 V, VEE = –2.5 V ± 5% or VCC = 2.5 V ± 5%, VEE = 0 V) Symbol IEE VOH VOL VoutPP –40°C Characteristics Min Power Supply Current Typ Max 30 60 VCC–990 VCC–800 Min Unit Typ Max 30 60 mA VCC–960 (1) VCC–1250 VCC–750 mV (1) VCC–2000 VCC–1550 VCC–1150 VCC–1925 VCC–1630 VCC–1200 mV Output HIGH Voltage Output LOW Voltage 0°C to 85°C Output Peak-to-Peak Voltage 200 VCC–1200 200 mV VIH Input HIGH Voltage VCC–1165 VCC–880 VCC–1165 VCC–880 mV VIL Input LOW Voltage VCC–1810 VCC–1475 VCC–1810 VCC–1475 mV VBB Output Reference Voltage IBB = 200 µA VCC–1400 VCC–1200 VCC–1400 VCC–1200 mV VPP Differential Input Voltage(2) VCMR IIN Differential Cross Point Voltage (3) 0.12 1.3 0.12 1.3 mV VEE+0.2 VCC–1.0 VEE+0.2 VCC–1.0 mV ±150 µA Input Current ±150 1. Output termination voltage VTT = 0 V for VCC = 2.5 V operation is supported but the power consumption of the device will increase. 2. VPP (DC) is the minimum differential input voltage swing required to maintain device functionality. 3. VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR (DC) range and the input swing lies within the VPP (DC) specification. Table 6. DC Characteristics (VCC = 0 V, VEE = –3.8 V to –3.135 V or VCC = 3.135 V to 3.8 V, VEE = 0 V) Symbol IEE VOH VOL VoutPP Characteristics –40°C Min Power Supply Current Typ Max 30 60 Min Unit Typ Max 30 60 mA VCC–970 (1) VCC–1150 VCC–1020 VCC–750 mV (1) VCC–1950 VCC–1620 VCC–1250 VCC–2000 VCC–1680 VCC–1300 mV Output HIGH Voltage Output LOW Voltage 0°C to 85°C Output Peak-to-Peak Voltage VCC–800 200 VCC–1200 200 mV VIH Input HIGH Voltage VCC–1165 VCC–880 VCC–1165 VCC–880 mV VIL Input LOW Voltage VCC–1810 VCC–1475 VCC–1810 VCC–1475 mV VBB Output Reference Voltage IBB = 200 µA VCC–1400 VCC–1200 VCC–1400 VCC–1200 mV VPP Differential Input Voltage(2) 0.12 1.3 0.12 1.3 V VEE+0.2 VCC–1.1 VEE+0.2 VCC–1.1 V ±150 µA VCMR IIN Differential Cross Point Voltage(3) Input Current ±150 1. Output termination voltage VTT = 0 V for VCC = 2.5 V operation is supported but the power consumption of the device will increase. 2. VPP (DC) is the minimum differential input voltage swing required to maintain device functionality. 3. VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR (DC) range and the input swing lies within the VPP (DC) specification. MC100ES6014 Advanced Clock Drivers Device Data Freescale Semiconductor 3 Table 7. AC Characteristics (VCC = 0 V, VEE = –3.8 V to –3.135 V or VCC = 3.135 V to 3.8 V, VEE = 0 V)(1) Symbol –40°C Characteristics Min fmax Maximum Output Frequency tPLH tPHL Propagation Delay (Differential) CLK to Q, Q VPP Min 300 355 425 23 45 125 RMS (1σ) Input Peak-to-Peak Voltage Swing (Differential) Max 300 375 475 23 45 175 300 1 1200 200 1200 VCC–1.2 VEE+0.2 70 Min 225 Typ Max 2 1 200 VEE+0.2 Output Rise/Fall Time (20%–80%) Typ 85°C 2 Q, Q VCMR Differential Cross Point Voltage tr/tf Max 2 tSKEW Within Device Skew(2) Device-to-Device Skew(2) tJITTER Cycle-to-Cycle Jitter Typ 25°C 200 VCC–1.2 VEE+0.2 70 250 70 Unit GHz 400 525 ps 23 45 225 ps ps 1 ps 1200 mV VCC–1.2 V 275 ps 1. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 ohms to VCC–2.0 V. 2. Skew is measured between outputs under identical transitions. Q D Driver Device Receiver Device Q D 50 Ω 50 Ω VTT VTT = VCC – 2.0 V Figure 2. Typical Termination for Output Driver and Device Evaluation MC100ES6014 4 Advanced Clock Drivers Device Data Freescale Semiconductor PACKAGE DIMENSIONS PAGE 1 OF 3 CASE 948E-03 ISSUE B 20-LEAD TSSOP PACKAGE MC100ES6014 Advanced Clock Drivers Device Data Freescale Semiconductor 5 PACKAGE DIMENSIONS PAGE 2 OF 3 CASE 948E-03 ISSUE B 20-LEAD TSSOP PACKAGE MC100ES6014 6 Advanced Clock Drivers Device Data Freescale Semiconductor PACKAGE DIMENSIONS PAGE 3 OF 3 CASE 948E-03 ISSUE B 20-LEAD TSSOP PACKAGE MC100ES6014 Advanced Clock Drivers Device Data Freescale Semiconductor 7 How to Reach Us: Home Page: www.freescale.com E-mail: [email protected] USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. 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