Ordering number : ENN6635A CMOS IC LC3564CM, 3564CT-55U/70U 64K (8192-word × 8-bit) SRAM with OE, CE1, and CE2 Control Pins Overview The LC3564CM and LC3564CT-55U/70U are 8192-word × 8-bit asynchronous silicon gate CMOS SRAMs. These are full CMOS type SRAMs that adopt a six-transistor memory cell and feature fast access times, low operating power dissipation, and an ultralow standby current. These SRAMs provide three control signal inputs: an OE input for high-speed memory access, and two chip enable lines, CE1 and CE2, for low power mode and device selection. These means that these SRAMs area ideal for systems that require low power and battery backup, and that they support easy memory expansion. The ultralow standby current that is a feature of these SRAMs allows them to be used with capacitor backup as well. Since these SRAMs support 3-V operation, they are also appropriate for use in portable battery operated systems. Features • Ultralow standby current — In 5-V operation mode: 1.0 µA (Ta ≤ 70°C), 3.0 µA (Ta ≤ 85°C) — In 3-V operation mode: 0.8 µA (Ta ≤ 70°C), 2.5 µA (Ta ≤ 85°C) • Operating temperature range — In 5-V operation mode: –40 to 85°C — In 3-V operation mode: –40 to 85°C • Data retention supply voltage: 2.0 to 5.5 V • All input and output levels: — In 5-V operation mode: TTL compatible levels — In 3-V operation mode: VCC –0.2 V/0.2 V • Three control inputs: OE, CE1, and CE2 • Shared input and output pins, three-state outputs • No clock required • Packages 28-pin SOP (450 mil) plastic package: LC3564CM 28-pin TSOP (8 × 13.4 mm) plastic package: LC3564CT • Supply voltage range: 2.7 to 5.5 V — In 5-V operation mode: 5.0 V ±10% — In 3-V operation mode: 3.0 V ±10% • Address access time (tAA) — In 5-V operation mode: LC3564CM, and CT-55U: 55 ns (max) LC3564CM, and CT-70U: 70 ns (max) — In 3-V operation mode: LC3564CM, and CT-70U: 200 ns (max) Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 80502RM (OT) No. 6635-1/11 LC3564CM, CT-55U/70U Package Dimensions unit: mm unit: mm 3187B-DIP28D 3221-TSOP28A [LC3564CM] [LC3564CT] 18.0 21 8 13.4 11.8 1.0 8.4 15 11.8 28 14 1.27 22 0.15 0.4 (0.75) 281 0.55 7 (0.43) (1.0) 0.125 8.0 0.05 0.1 1.2max 2.5max (2.2) 0.2 0.5 1 SANYO: DIP28D SANYO: TSOP28A Pin Assignments TSOP28 SOP28 NC 1 28 VCC A12 2 27 WE A7 3 26 CE2 A6 4 25 A8 A5 5 24 A9 A4 6 23 A11 A3 7 22 OE A2 8 21 A10 A1 9 20 CE1 A0 10 19 I/O8 I/O1 11 18 I/O7 I/O2 12 17 I/O6 I/O3 13 16 I/O5 GND 14 15 I/O4 OE A11 A9 A8 CE2 WE VCC NC A12 A7 A6 A5 A4 A3 22 23 24 25 26 27 28 1 2 3 4 5 6 7 21 20 19 18 17 16 15 14 13 12 11 10 9 8 A10 CE1 I/O8 I/O7 I/O6 I/O5 I/O4 GND I/O3 I/O2 I/O1 A0 A1 A2 Top view A13511 Top view A13510 No. 6635-2/11 LC3564CM, CT-55U/70U A0 to A12 I/O1 to I/O8 Pow decoder Address buffer Block Diagram Output buffer Memory cell array VCC GND Data control circuit Input data buffer CE1 CE2 WE OE Control circuit A13512 Pin Functions A0 to A12 Address inputs WE Read/write control input OE Output enable input CE1, CE2 Chip enable inputs I/O1 to I/O8 Data I/O VCC, GND Power supply and ground Function Table Mode CE1 CE2 OE WE I/O Read cycle L H L H Data output ICCA Write cycle L H X L Data input ICCA Output disable Not selected Supply current L H H H High impedance ICCA H X X X High impedance ICCS X L X X High impedance ICCS X : H or L No. 6635-3/11 LC3564CM, CT-55U/70U Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Symbol Conditions Ratings VCC max Unit 7.0 V V Input voltage VIN –0.3* to VCC + 0.3 I/O voltage VI/O –0.3 to VCC + 0.3 V Operating temperature Topr –40 to +85 °C Storage temperature Tstg –55 to +125 °C Note: For pulse widths less than 30 ns: –3.0 V Input and Output Capacitances at Ta = 25°C, f = 1 MHz Parameter Symbol Ratings Conditions min typ Unit max I/O pin capacitance CI/O VI/O = 0 V 6 10 pF Input pin capacitance CIN VIN = 0 V 6 10 pF Note: These parameters are sampled, and are not measured for every unit. [5-V Operation] DC Allowable Operating Ranges at Ta = –40 to +85°C, VCC = 4.5 to 5.5 V Parameter Supply voltage Input voltage Symbol Ratings Conditions min typ Unit max VCC 4.5 5.5 V VIH 2.2 VCC + 0.3 V VIL –0.3* +0.8 V 5.0 Note: For pulse widths less than 30 ns: –3.0 V DC Electrical Characteristics at Ta = –40 to +85°C, VCC = 4.5 to 5.5 V Parameter Input leakage current Symbol Ratings Conditions min typ * Unit max ILI VIN = 0 to VCC –1.0 +1.0 µA I/O leakage current ILO VCE1 = VIH or VCE2 = VIL or VOE = VIH or VWE = VIL, VI/O = 0 to VCC –1.0 +1.0 µA Output high-level voltage VOH IOH = –1.0 mA Output low-level voltage VOL IOL = 2.0 mA ICCA1 VCC – 0.2 V/0.2 V inputs ICCA4 Operating supply current VCE1 ≤ 0.2 V, VCE2 ≥ VCC – 0.2 V, II/O = 0 mA, VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V ICCA3 VCE1 = VIL, VCE2 = VIH, II/O = 0 mA, DUTY = 100% ICCS1 TTL inputs ICC2 Ta ≤ 70°C VCE2 ≤ 0.2 V or VCE1 ≥ VCC – 0.2 V VCE2 ≥ VCC – 0.2 V min 0.01 Ta ≤ 85°C VCE1 ≤ 0.2 V, min LC3564CM, CT-55U VCE2 ≥ VCC – 0.2 V, cycle LC3564CM, CT-70U II/O = 0 mA, DUTY = 100% 1 µs cycle VCE1 = VIL, VCE2 = VIH, II/O = 0 mA, VIN = VIH or VIL VCC – 0.2 V/0.2 V inputs V 0.4 ICCA2 TTL inputs Standby mode supply current 2.4 V µA 3.0 45 35 mA 7 mA 4 LC3564CM, CT-55U 45 cycle LC3564CM, CT-70U 1 µs cycle 1.0 40 mA 7 Ta ≤ 70°C Ta ≤ 85°C VCE2 = VIL or VCE1 = VIH, VIN = 0 to VCC 0.01 1.0 µA 3.0 2.0 mA Note *: Reference values at VCC = 5 V, Ta = 25°C No. 6635-4/11 LC3564CM, CT-55U/70U AC Electrical Characteristics at Ta = –40 to +85°C, VCC = 4.5 to 5.5 V Parameter Conditions [AC Test Conditions] Input pulse voltage VIH = 2.4 V, VIL = 0.6 V Input rise and fall times 5 ns Input and output timing level 1.5 V Output load LC3564CM and CT-55U/70U: 30 pF + 1 TTL gate (Including the jig capacitance.) Read Cycle LC3564CM, CT Parameter Symbol -55U min -70U max min Unit max Read cycle time tRC Address access time tAA 55 70 ns CE1 access time tCA1 55 70 ns CE2 access time tCA2 55 70 ns OE access time tOA 30 35 ns Output hold time tOH 10 10 ns CE1 output enable time tCOE1 5 10 ns CE2 output enable time tCOE2 5 10 ns OE output enable time tOOE 5 5 CE1 output disable time tCOD1 20 30 ns CE2 output disable time tCOD2 20 30 ns OE output disable time tOOD 20 25 ns 55 70 ns ns Write Cycle LC3564CM, CT Parameter Symbol -55U min -70U max min Unit max Write cycle time tWC 55 70 Address setup time tAS 0 0 ns Write pulse width tWP 40 50 ns CE1 setup time tCW1 50 60 ns CE2 setup time tCW2 50 60 ns Write recovery time tWR 0 0 ns CE1 write recovery time tWR1 0 0 ns CE2 write recovery time tWR2 0 0 ns tDS 25 35 ns Data hold time tDH 0 0 ns CE1 data hold time tDH1 0 0 ns CE2 data hold time tDH2 0 0 ns WE output enable time tWOE 5 5 WE output disable time tWOD Data setup time 30 ns ns 30 ns No. 6635-5/11 LC3564CM, CT-55U/70U [3-V Operation] DC Allowable Operating Ranges at Ta = –40 to +85°C, VCC = 2.7 to 3.3 V Parameter Supply voltage Input voltage Symbol Ratings Conditions min typ max Unit VCC 2.7 3.3 V VIH VCC – 0.2 VCC V VIL 0 0.2 V 3.0 DC Electrical Characteristics at Ta = –40 to +85°C, VCC = 2.7 to 3.3 V Parameter Input leakage current Symbol Ratings Conditions min typ * max Unit ILI VIN = 0 to VCC –1.0 +1.0 µA I/O leakage current ILO VCE1 = VIH or VCE2 = VIL or VOE = VIH or VWE = VIL, VI/O = 0 to VCC –1.0 +1.0 µA Output high-level voltage VOH IOH = –0.5 mA Output low-level voltage VOL IOL = 1.0 mA Operation supply current Standby mode supply current VCC – 0.2 V/0.2 V inputs V 0.2 ICCA1 VCE1 ≤ VIL, VCE2 ≥ VIH, II/O = 0 mA, VIN ≤ VIL or VIN ≥ VIH ICCA4 VCE1 ≤ VIL, VCE2 ≥ VIH, II/O = 0 mA, DUTY = 100% ICCS1 VCE2 ≤ 0.2 V or VCE1 ≥ VIH VCE2 ≥ VIH VCC – 0.2 V/0.2 V inputs VCC – 0.2 min cycle Ta ≤ 70°C 0.01 0.8 µA Ta ≤ 85°C 2.5 LC3564CM, CT-70U 1 µs cycle 20 3 Ta ≤ 70°C Ta ≤ 85°C V 0.01 mA mA 0.8 µA 2.5 Note *: Reference values at VCC = 3 V, Ta = 25°C No. 6635-6/11 LC3564CM, CT-55U/70U AC Electrical Characteristics at Ta = –40 to +85°C, VCC = 2.7 to 3.3 V Parameter Conditions [AC Test Conditions] Input pulse voltage VIH = VCC – 0.2 V, VIL = 0.2 V Input rise and fall times 10 ns Input and output timing level 1.5 V Output load LC3564CM, CT-70U : 30pF (Including the jig capacitance.) Read Cycle LC3564CM, CT-70U Parameter Symbol -10 min Unit max Read cycle time tRC Address access time tAA 200 ns CE1 access time tCA1 200 ns CE2 access time tCA2 200 ns OE access time tOA 100 Output hold time tOH 20 ns CE1 output enable time tCOE1 20 ns CE2 output enable time tCOE2 20 ns OE output enable time tOOE 10 CE1 output disable time tCOD1 60 ns CE2 output disable time tCOD2 60 ns OE output disable time tOOD 50 ns 200 ns ns ns Write Cycle LC3564CM, CT-70U Parameter Symbol -70 min Unit max Write cycle time tWC 200 Address setup time tAS 0 ns Write pulse width tWP 140 ns CE1 setup time tCW1 150 ns CE2 setup time tCW2 0 ns Write recovery time tWR 0 ns CE1 write recovery time tWR1 0 ns CE2 write recovery time tWR2 130 ns Data setup time tDS 0 ns Data hold time tDH 0 ns CE1 data hold time tDH1 0 ns CE2 data hold time tDH2 10 ns WE output enable time tWOE WE output disable time tWOD ns ns 60 ns No. 6635-7/11 LC3564CM, CT-55U/70U Timing Charts Read Cycle *1 tRC A0 to A12 tAA CE2 tOH tCA2 tCOD2 tCA1 CE1 tCOD1 tOA OE tOOE tCOE1 tCOE2 tOOD *5 DOUT1 to 8 OUTPUT DATA VALID INVALID DATA H or L A13513 Write Cycle (1): WE Write *6 tWC A0 to A12 tAS tWR tOH tWP *3 WE CE2 tCW2 *4 tCW1 *4 CE1 tWOD tWOE *5 DOUT1 to 8 *7 tDS DIN1 to 8 *2 INVALID DATA tDH DATA IN STABLE *2 H or L A13514 No. 6635-8/11 LC3564CM, CT-55U/70U Write Cycle (2): CE1 Write *6 tWC A0 to A12 tAS tWR1 tWP *3 WE CE2 tCW2 *4 tCW1 *4 CE1 tCOE1 tWOD *5 DOUT1 to 8 tDS DIN1 to 8 tDH1 DATA IN STABLE INVALID DATA H or L A13515 Write Cycle (3): CE2 Write *6 tWC A0 to A12 tAS tWR2 tWP *3 WE CE2 tCW2 *4 tCW1 *4 CE1 tCOE2 tWOD *5 DOUT1 to 8 tDS DIN1 to 8 tDH2 DATA IN STABLE INVALID DATA H or L A13516 Notes: 1. Hold WE high during the read cycle. 2. Applications must not apply reverse phase signals to the DOUT pins when those pins are in the output state. 3. The time tWP is the period when CE1 and WE are low and CE2 is high, and is defined as the time from the fall of WE until either CE1 or WE rises, or CE2 falls, whichever occurs first. 4. The times tCW1 and tCW2 are periods when CE1 and WE are low and CE2 is high. They are defined as the times from the fall of CE1 or the rise of CE2 to the rise of CE1 and WE, or the fall of CE2, whichever occurs first. 5. The DOUT pins will be in the high-impedance state if either OE is high, CE1 is high, CE2 is low, or WE is low. 6. OE must be held either at VIH or VIL during the write cycle. 7. The DOUT pins have the same phase as the write cycle write data. No. 6635-9/11 LC3564CM, CT-55U/70U Data Retention Characteristics at Ta = –40 to +85°C Parameter Symbol Data retention supply voltage VDR Data retention supply current ICCDR Chip enable setup time tCDR Chip enable hold time tR Ratings Conditions min VCE2 ≤ 0.2 V or VCE1 ≥ VCC – 0.2 V, VCE2 ≥ VCC – 0.2 V VCC = 3V, VCE2 ≤ 0.2 V, or VCE1 ≥ VCC – 0.2 V, VCE2 ≥ VCC – 0.2 V typ 2.0 max 5.5 Ta ≤ 70°C 0.8 Ta ≤ 85°C 2.5 Unit µA µA 0 ns tRC* ns Note *: tRC is the read cycle time. Data Retention Waveforms (1): CE1 Control tCDR Data retention mode Data Retention Waveforms (2): CE2 Control tR Data retention mode VCC VCCL * VCC VCCL * VCE2 VDR VIH VDR VCE1 GND VIL GND VCE1 ≥ VCC–0.2V A13517 tCDR tR VCE2 ≤ 0.2V A13518 Note *:In 5-V operation: 4.5 V In 3-V operation: 2.7 V Notes on Circuit Design When actually design a circuit using these devices, take the following points into consideration and design the circuit so that none of the maximum rating items are ever exceeded. • Variations in the supply voltage • Variations in the electrical characteristics of components such as semiconductor devices, resistors, and capacitors. • Ambient temperature • Variations in input and clock signals • Possible application of abnormal pulses Also, these devices must be operated within the ranges stipulated in the allowable operating ranges. If CMOS IC input pins are left open, intermediate potential input voltages may occur leading to incorrect operation due to through currents or other phenomenon. Applications must handle unused input pins appropriately. No. 6635-10/11 LC3564CM, CT-55U/70U Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer’s products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification” for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of August, 2002. Specifications and information herein are subject to change without notice. PS No. 6635-11/11