MITSUBISHI SEMICONDUCTORS <HVIC> M81720FP HIGH VOLTAGE HALF BRIDGE DRIVER DESCRIPTION M81720FP is high voltage Power MOSFET and IGBT module driver for half bridge applications. PIN CONFIGURATION (TOP VIEW) FEATURES ¡FLOATING SUPPLY VOLTAGE ................................. 600V ¡OUTPUT CURRENT ..................... +120mA/–250mA (min) ¡HALF BRIDGE DRIVER ¡SOP-8 PACKAGE APPLICATIONS MOSFET and IGBT module inverter driver for Automotive, PDP, HID lamp, refrigerator, air-conditioner, washing machine, AC-servomotor and general purpose. 1. VCC 8. VB 2. HIN 7. HO 3. LIN 6. VS 4. GND 5. LO Outline:8P2S BLOCK DIAGRAM HV LEVEL SHIFT VREG HIN 2 FILTER 3 FILTER 7 HO 6 VS 1 VCC 5 LO 4 GND R S PULSE GEN UV DETECT FILTER LIN VB RQ INTER LOCK VREG/VCC LEVEL SHIFT 8 UV DETECT FILTER VREG/VCC LEVEL SHIFT DELAY Aug. 2009 1 MITSUBISHI SEMICONDUCTORS <HVIC> M81720FP HIGH VOLTAGE HALF BRIDGE DRIVER ABSOLUTE MAXIMUM RATINGS (Ta = 25°C unless otherwise specified) Symbol VB Parameter High Side Floating Supply Absolute Voltage Test conditions VS High Side Floating Supply Offset Voltage VBS High Side Floating Supply Voltage VHO High Side Output Voltage VCC Low Side Fixed Supply Voltage VLO Low Side Output Voltage VIN Logic Input Voltage HIN, LIN Pd Package Power Dissipation Kq Linear Derating Factor Rth(j-c) Junction-Case Thermal Resistance Tj VBS = VB–VS Ratings –0.5 ~ 624 Unit V –5 ~ 600 V –0.5 ~ 24 V VS–0.5 ~ VB+0.5 V –0.5 ~ 24 V –0.5 ~ VCC+0.5 V –0.5 ~ VCC+0.5 V Ta = 25°C, On Board 0.6 W Ta > 25°C, On Board 6.0 mW/°C 50 °C/W Junction Temperature –20 ~ 125 °C Topr Operation Temperature –20 ~ 100 °C Tstg Storage Temperature –40 ~ 125 °C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Test conditions Min. Limits Typ. Max. VS+10 — VS+20 V 0 — 500 V 10 — 20 V Unit VB High Side Floating Supply Absolute Voltage VS High Side Floating Supply Offset Voltage VBS High Side Floating Supply Voltage VHO High Side Output Voltage VS — VB V VCC Low Side Fixed Supply Voltage 10 — 20 V VLO Low Side Output Voltage 0 — VCC V VIN Logic Input Voltage 0 — 7 V VBS = VB–VS HIN, LIN * For proper operation, the device should be used within the recommended conditions. THERMAL DERATING FACTOR CHARACTERISTIC (MAXIMUM RATING) Package Power Dissipation Pd (W) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 25 50 75 100 125 150 Temperature Ta (°C) Aug. 2009 2 MITSUBISHI SEMICONDUCTORS <HVIC> M81720FP HIGH VOLTAGE HALF BRIDGE DRIVER ELECTRICAL CHARACTERISTICS (Ta = 25°C, Vcc=VBS(=VB-VS)=15V, unless otherwise specified) Symbol Parameter Test conditions Min. Limits Typ.* Max. Unit IFS Floating Supply Leakage Current VB = VS = 600V — — 1.0 µA IBS VBS Standby Current HIN = LIN = 0V — 0.2 0.5 mA ICC VCC Standby Current HIN = LIN = 0V 0.2 0.6 1.0 mA — V VOH High Level Output Voltage IO = –20mA, LO, HO 13.6 14.2 VOL Low Level Output Voltage IO = 20mA, LO, HO — 0.3 0.6 V VIH High Level Input Threshold Voltage HIN, LIN 2.7 — — V VIL Low Level Input Threshold Voltage HIN, LIN — — 0.8 V IIH High Level Input Bias Current VIN = 5V — 5 20 µA IIL Low Level Input Bias Current VIN = 0V — — 2 µA VBSuvr VBS Supply UV Reset Voltage 8.0 8.9 9.8 V VBSuvt VBS Supply UV Trip Voltage 7.4 8.2 9.0 V VBSuvh VBS Supply UV Hysteresis Voltage 0.5 0.7 — V tVBSuv VBS Supply UV Filter Time — 7.5 — µs VCCuvr VCC Supply UV Reset Voltage 8.0 8.9 9.8 V VCCuvt VCC Supply UV Trip Voltage 7.4 8.2 9.0 V VCCuvh VCC Supply UV Hysteresis Voltage 0.5 0.7 — V tVCCuv VCC Supply UV Filter Time — 7.5 — µs IOH Output High Level Short Circuit Pulsed Current VO = 0V, VIN = 5V, PW < 10µs 120 200 — mA IOL Output Low Level Short Circuit Pulsed Current VO = 15V, VIN = 0V, PW < 10µs 250 350 — mA ROH Output High Level On Resistance IO = –20mA, ROH = (VCC–VO)/IO — 40 70 Ω 15 30 Ω ROL Output Low Level On Resistance IO = 20mA, ROL = VO/IO — tdLH(HO) High Side Turn-On Propagation Delay CL = 1000pF between HO-VS — 450 650 ns tdHL(HO) High Side Turn-Off Propagation Delay CL = 1000pF between HO-VS — 450 650 ns trH High Side Turn-On Rise Time CL = 1000pF between HO-VS — 130 220 ns tfH High Side Turn-Off Fall Time CL = 1000pF between HO-VS — 50 80 ns tdLH(LO) Low Side Turn-On Propagation Delay CL = 1000pF between LO-GND — 450 650 ns tdHL(LO) Low Side Turn-Off Propagation Delay CL = 1000pF between LO-GND — 450 650 ns trL Low Side Turn-On Rise Time CL = 1000pF between LO-GND — 130 220 ns tfL CL = 1000pF between LO-GND — 50 80 ns ∆tdLH Low Side Turn-Off Fall Time Delay Matching, High Side and Low Side Turn-On |tdLH(HO)–tdLH(LO)| — 0 30 ns ∆tdHL Delay Matching, High Side and Low Side Turn-Off |tdHL(HO)–tdHL(LO)| — 0 30 ns CONVEX PULSE 150 250 350 ns CONCAVE PULSE 250 350 450 ns CONVEX PULSE 150 250 350 ns CONCAVE PULSE 250 350 450 ns |PW(IN)–PW(OUT)| –40 0 100 ns Tinon Tinoff ∆PWIO Input Filter Time (ON) Input Filter Time (OFF) I/O Pulse Width Difference * Typ. is not specified. Aug. 2009 3 MITSUBISHI SEMICONDUCTORS <HVIC> M81720FP HIGH VOLTAGE HALF BRIDGE DRIVER TIMING REQUIREMENT (Input Signal Frequency : 200kHz Duty < 50%) IN 50% 50% tr tdLH tdHL 90% OUT tf 90% 10% 10% FUNCTION TABLE HIN LIN VBS UV VCC UV HO LO H→L L H H L L LO = HO = Low H→L H H H L H LO = High L→H L H H H L HO = High L→H H H H L L LO = HO = Low X L L H L L HO = Low, VBS UV tripped X H L H L H LO = High, VBS UV tripped H→L X H L L L LO = Low, VCC UV tripped L→H X H L L L HO = LO = Low, VCC UV tripped Behavioral state Note1 : “L” state of VBS UV, VCC UV means that UV trip voltage. 2 : In the case of both input signals (HIN and LIN) are “H”, output signals (HO and LO) become “L”. 3 : X (HIN) : L→H or H→L.X(LIN) : H or L. 4 : Output signal (HO) is triggered by the edge of input signal. HIN HO Aug. 2009 4 MITSUBISHI SEMICONDUCTORS <HVIC> M81720FP HIGH VOLTAGE HALF BRIDGE DRIVER TIMING DIAGRAM 1. Input/Output Timing Diagram HIGH ACTIVE (When input signal (HIN or LIN) is “H”, then output signal (HO or LO) is “H”.) In the case of both input signals (HIN and LIN) are “H”, output signals (HO and LO) become “L”. HIN LIN HO LO 2. VCC (VBS) Supply Under Voltage Lockout Timing Diagram If VCC supply voltage drops below UV trip voltage (VCCuvt) for VCC Supply UV filter time, output signal is shut down. As soon as VCC supply voltage rises over UV reset voltage, output signal LO becomes “H” it LIN is “H”. VCCuvh VCC VCCuvr VCCuvt tVCCuv LO LIN If VCC supply voltage drops below UV trip voltage (VCCuvt) for VCC supply UV filter time, output signal is shut down. As soon as VCC supply voltage rises over UV reset voltage, output signal HO becomes “H” it HIN is “H”. VBS(H) LIN(L) VCCuvh VCC VCCuvr VCCuvt tVCCuv HO HIN Aug. 2009 5 MITSUBISHI SEMICONDUCTORS <HVIC> M81720FP HIGH VOLTAGE HALF BRIDGE DRIVER If VBS supply voltage drops below UV trip voltage (V BSuvt) for VBS supply UV filter time, output signal is shut down. As soon as VBS supply voltage rises over UV reset voltage, output signal HO becomes “H” at following “H” HIN input signal. VBSuvh VBS VBSuvr VBSuvt tVBSuv HO HIN 3. Allowable Supply Voltage Transient It is recommended to supply VCC firstly and supply VBS secondly. In the case of shutting off supply voltage, please shut off VBS firstly and shut off VCC secondly. When applying VCC and VBS, power supply should be applied slowly. If it rises rapidly, output signal (HO or LO) may be malfunction. 4. About the deadtime between HIN and LIN. Due to input filter circuit, the pulse width of output maybe longer than the pulse width of input. In that case, please assure that the deadtime between HIN and LIN is over 300ns, or HO and LO maybe on at the same time (shut-through). Aug. 2009 6 MITSUBISHI SEMICONDUCTORS <HVIC> M81720FP HIGH VOLTAGE HALF BRIDGE DRIVER Consideration As for this product, the terminal of low voltage part and high-voltage part is very clear (The Fifth: LO, The Sixth: VS). Therefore, pin insulation space distance should be taken enough. PACKAGE OUTLINE e 8 b2 E Recommended Mount Pad 1 Symbol F 4 A D G b x M A1 A2 e y L L1 HE e1 I2 5 c z Z1 Detail G Detail F A A1 A2 b c D E e HE L L1 z Z1 x y b2 e1 I2 Dimension in Millimeters Min Nom Max – – 1.9 0.05 – – – 1.5 – 0.35 0.4 0.5 0.13 0.15 0.2 4.8 5.0 5.2 4.2 4.4 4.6 – 1.27 – 5.9 6.2 6.5 0.2 0.4 0.6 – 0.9 – – 0.595 – – – 0.745 – – 0.25 – – 0.1 0° – 10° – 0.76 – – 5.72 – 1.27 – – Aug. 2009 7