TSC TSM9426DCSRL

Preliminary
TSM9426D
20V Dual N-Channel MOSFET w/ESD Protected
SOP-8
PRODUCT SUMMARY
VDS (V)
RDS(on)(mΩ)
Pin Definition:
1. Source 1
8. Drain 1
2. Gate 1
7. Drain 1
3. Source 2
6. Drain 2
4. Gate 2
5. Drain 2
20
Features
ID (A)
14 @ VGS = 10V
9.4
16 @ VGS = 4.5V
8
22 @ VGS = 2.5V
6
30 @ VGS = 1.8V
4
Block Diagram
●
Advance Trench Process Technology
●
High Density Cell Design for Ultra Low On-resistance
●
ESD Protect 2KV
Application
●
Specially Designed for Li-on Battery Packs
●
Battery Switch Application
Ordering Information
Part No.
Package
Packing
TSM9426DCS RL
SOP-8
2.5Kpcs / 13” Reel
Dual N-Channel MOSFET
Absolute Maximum Rating (Ta = 25oC unless otherwise noted)
Parameter
Symbol
Limit
Unit
Drain-Source Voltage
VDS
20
V
Gate-Source Voltage
VGS
±12
V
Continuous Drain Current, VGS @4.5V.
ID
9.4
A
Pulsed Drain Current, VGS @4.5V
IDM
40
A
IS
3
A
Continuous Source Current (Diode Conduction)
a,b
o
Maximum Power Dissipation
Ta = 25 C
PD
o
Ta = 75 C
Operating Junction Temperature
W
1.28
+150
o
C
TJ, TSTG
-55 to +150
o
C
Symbol
Limit
TJ
Operating Junction and Storage Temperature Range
2
Thermal Performance
Parameter
Junction to Foot (Drain) Thermal Resistance
RӨJF
Junction to Ambient Thermal Resistance (PCB mounted)
RӨJA
Unit
45
o
C/W
62.5
o
C/W
Notes:
a. Pulse width limited by the Maximum junction temperature
b. Surface Mounted on FR4 Board, t ≤ 5 sec.
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Version: Preliminary
Preliminary
TSM9426D
20V Dual N-Channel MOSFET w/ESD Protected
Electrical Specifications (Ta = 25oC unless otherwise noted)
Parameter
Conditions
Symbol
Min
Typ
Max
Unit
Static
Drain-Source Breakdown Voltage
VGS = 0V, ID = 250uA
BVDSS
20
--
--
V
Gate Threshold Voltage
VDS = VGS, ID = 250uA
VGS(TH)
0.5
0.75
1.0
V
Gate Body Leakage
VGS = ±10V, VDS = 0V
IGSS
--
--
±10
uA
Zero Gate Voltage Drain Current
VDS = 16V, VGS = 0V
IDSS
--
--
10
uA
On-State Drain Current
VDS =5V, VGS = 4.5V
ID(ON)
30
--
--
A
--
11
14
---
12.6
16
16.5
22
--
23.4
30
VGS = 10V, ID = 9.4A
Drain-Source On-State Resistance
VGS = 4.5V, ID = 8A
VGS = 2.5V, ID = 6A
RDS(ON)
VGS = 1.8V, ID = 4A
mΩ
Forward Transconductance
VDS = 5V, ID = 8A
gfs
--
37
--
S
Diode Forward Voltage
IS = 1A, VGS = 0V
VSD
--
0.72
1
V
Qg
--
4.65
6.05
Qgs
--
1.12
1.46
Qgd
--
3.72
4.84
Ciss
--
36.45
--
Coss
--
183.88
--
Crss
--
14.57
--
td(on)
--
487.6
--
tr
--
800.4
--
td(off)
--
1728
--
--
6180
--
Dynamic
b
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching
VDS = 10V, ID = 8A,
VGS = 4.5V
VDS = 10V, VGS = 0V,
f = 1.0MHz
nC
pF
c
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
VDD = 10V, RL = 1.2Ω,
ID = 1A, VGEN = 10V,
RG = 3Ω
Turn-Off Fall Time
tf
Notes:
a. pulse test: PW 300µS, duty cycle 2%
b. For DESIGN AID ONLY, not subject to production testing.
b. Switching time is essentially independent of operating temperature.
2/4
nS
Version: Preliminary
Preliminary
TSM9426D
20V Dual N-Channel MOSFET w/ESD Protected
SOP-8 Mechanical Drawing
DIM
A
B
C
D
F
G
K
M
P
R
SOP-8 DIMENSION
MILLIMETERS
INCHES
MIN
MAX
MIN
MAX.
4.80
5.00
0.189
0.196
3.80
4.00
0.150
0.157
1.35
1.75
0.054
0.068
0.35
0.49
0.014
0.019
0.40
1.25
0.016
0.049
1.27BSC
0.05BSC
0.10
0.25
0.004
0.009
0º
7º
0º
7º
5.80
6.20
0.229
0.244
0.25
0.50
0.010
0.019
Marking Diagram
Y = Year Code
M = Month Code
(A=Jan, B=Feb, C=Mar, D=Apl, E=May, F=Jun, G=Jul, H=Aug,
I=Sep, J=Oct, K=Nov, L=Dec)
L = Lot Code
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Version: Preliminary
Preliminary
TSM9426D
20V Dual N-Channel MOSFET w/ESD Protected
Notice
Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf,
assumes no responsibility or liability for any errors or inaccuracies.
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and/or use of TSC products including liability or warranties relating to fitness for a particular purpose, merchantability,
or infringement of any patent, copyright, or other intellectual property right.
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Version: Preliminary