® Micrel, Inc. Precision Edge 2.5V/3.3V TWO INPUT, 1GHz LVTTL/CMOS® SY89834U Precision Edge TO-LVPECL 1:4 FANOUT BUFFER/ SY89834U TRANSLATOR WITH 2:1 INPUT MUX FEATURES ■ Selects between two LVTTL/CMOS inputs and provides 4 LVPECL output copies ■ Guaranteed AC performance over temperature and voltage: • DC-to >1.0GHz throughput • <500ps propagation delay (IN-to-Q) • < 20ps within-device skew • < 225ps rise/fall time ■ Ultra-low jitter design: • < 1psRMS cycle-to-cycle jitter • < 1psRMS random jitter • < 10psPP deterministic jitter • < 10psPP total jitter (clock) ■ Low voltage 2.5V and 3.3V supply operation ■ 100K LVPECL outputs ■ Industrial temperature range: –40°C to +85°C ■ Includes a 2:1 MUX select input ■ Accepts single-ended TTL/CMOS inputs and provides four LVPECL outputs ■ Available in 16-pin (3mm × 3mm) MLF™ package Precision Edge® DESCRIPTION The SY89834U is a high-speed, 1GHz LVTTL/CMOS-toLVPECL fanout buffer/translator optimized for high-speed ultra-low skew applications. The input stage is designed to accept two single-ended LVTTL/CMOS compatible signals that feed into a 2:1 MUX. The selected input is translated and distributed as four differential 100K LVPECL outputs. Within device skew is guaranteed to be less than 20ps over supply voltage and temperature. The single-ended input buffers accept TTL/CMOS logic levels. The internal threshold of the buffers is defined as VCC/2. The SY89834U is a part of Micrel's high-speed Precision Edge® family. For applications that require a different I/O combination, consult Micrel's website at: www.micrel.com, and choose from a comprehensive product line of highspeed, low-skew fanout buffers, translators and clock generators. APPLICATIONS ■ ■ ■ ■ ■ FUNCTIONAL BLOCK DIAGRAM Processor clock distribution/translation SONET clock distribution/translation Fibre Channel clock distribution/translation Gigabit Ethernet clock distribution/translation Single-ended ASIC-to-differential communication IC signal translation 1:4 Q0 /Q0 SEL (LVTTL/CMOS) Q1 IN1 (LVTTL/CMOS) /Q1 1 MUX 0 IN2 (LVTTL/CMOS) Q2 /Q2 EN LVTTL/CMOS) D Q Q3 /Q3 Precision Edge is a registered trademark of Micrel, Inc. MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc. August 2005 1 M9999-080505 [email protected] or (408) 955-1690 Precision Edge® SY89834U Micrel, Inc. /Q0 Q0 VCC GND PACKAGE/ORDERING INFORMATION 16 15 14 13 Ordering Information(1) Q1 1 12 IN1 /Q1 2 11 SEL 10 NC Q2 3 /Q2 4 6 7 8 Q3 /Q3 VCC EN 9 5 IN2 Part Number Package Type Operating Range Package Marking Lead Finish SY89834UMI MLF-16 Industrial 834U Sn-Pb SY89834UMITR(2) MLF-16 Industrial 834U Sn-Pb SY89834UMG(3) MLF-16 Industrial 834U with Pb-Free bar line indicator NiPdAu Pb-Free SY89834UMGTR(2, 3) MLF-16 Industrial 834U with Pb-Free bar line indicator NiPdAu Pb-Free Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only. 2. Tape and Reel. 3. Pb-Free package is recommended for new designs. 16-Pin MLF™ (MLF-16) PIN DESCRIPTION Pin Number Pin Name Pin Function 15, 16 1, 2, 3, 4, 5, 6 Q0, /Q0 Q1, /Q1 Q2, /Q2 Q3, /Q3 Differential 100K LVPECL Outputs: These LVPECL outputs are the precision, low skew copies of the inputs. Please refer to the “Truth Table” section for details. Unused output pairs may be left open. Terminate wtih 50Ω to VCC–2V. See “Output Termination Recommendations” section for more details. 8 EN This single-ended TTL/CMOS-compatible input functions as a synchronous output enable. The synchronous enable ensures that enable/disable will only occur when the outputs are in a logic LOW state. Note that this input is internally connected to a 25kΩ pull-up resistor and will default to logic HIGH state (enabled) if left open. 12, 9 IN1 IN2 Single-ended TTL/CMOS-compatible inputs to the device. These inputs are internally connected to a 25kΩ pull-up resistor and will default to logic HIGH state if left open. The input threshold is VCC/2. 10 NC No connect. Not internally connected. 11 SEL TTL/CMOS Compatible Select Input for signals IN1 and IN2. The input threshold is VCC/2. HIGH at the SEL input selects signal IN1. LOW at the SEL input selects signal IN2. SEL includes a 25kΩ pull-up resistor. The default state is HIGH when left floating. 13 GND Ground. GND pins and exposed pad must be connected to the most negative potential of the device ground. 7, 14 VCC Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors and place as close to each VCC pin as possible. TRUTH TABLE IN1 IN2 EN SEL Q0–Q3 /Q0–Q3 0 X 1 1 0 1 1 X 1 1 1 0 X 0 1 0 0 1 X 1 1 0 1 0 X 0(1) 0(1) X X 0 Note: 1. On next negative transition of the input signal (IN). 2 M9999-080505 [email protected] or (408) 955-1690 Precision Edge® SY89834U Micrel, Inc. Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VCC) .................................. –0.5V to +4.0V Input Voltage (VIN) ............................... –0.5V to VCC +0.3V LVPECL Output Current (IOUT) Continuous ............................................................. 50mA Surge .................................................................... 100mA Input Current (IN1, IN2) ............................................ ±50mA Lead Temperature (Soldering, 20sec.), ................... 260°C Storage Temperature (TS) ....................... –65°C to +150°C Supply Voltage Range ........................ +2.375V to +2.625V ............................................................ +3.0V to +3.6V Ambient Temperature (TA) ......................... –40°C to +85°C Package Thermal Resistance(3) MLF™ (θJA) Still-Air ............................................................. 60°C/W MLF™ (ψJB) Junction-to-Board ............................................ 32°C/W DC ELECTRICAL CHARACTERISTICS(4) TA = –40°C to +85°C, unless otherwise stated. Symbol Parameter VCC Power Supply ICC Power Supply Current Condition Min Typ Max Units 2.625 3.6 V V 50 75 mA Typ Max Units 2.375 3.0 No load, max. VCC. LVTTL/CMOS INPUTS DC ELECTRICAL CHARACTERISTICS(4) VCC = 2.5V ±5% or VCC = 3.3V ±10%; TA = –40°C to +85°C, unless otherwise stated. Symbol Parameter VIH Input HIGH Voltage VIL Input LOW Voltage IIH Input HIGH Current IIL Input LOW Current Condition Min 2.0 IIH @ VIN = 2.7V V –125 0.8 V 30 µA µA –125 (100KEP) LVPECL OUTPUTS DC ELECTRICAL CHARACTERISTICS(4) VCC = 2.5V ±5% or VCC = 3.3V ±10% , RL = 50Ω to VCC–2V; TA = –40°C to +85°C, unless otherwise stated. Symbol Parameter Condition Min Typ Max Units VOH Output HIGH Voltage VCC–1.145 VCC–1.020 VCC–0.895 V VOL Output LOW Voltage VCC–1.945 VCC–1.820 VCC–1.695 V VOUT Output Voltage Swing See Figures 2a. 550 800 1050 mV VDIFF_OUT Differential Output Voltage Swing See Figures 2b. 1100 1600 2100 mV Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratlng conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Junction-to-board resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the PCB. θJA and ΨJB values are determined for a 4-layer board in still-air, unless otherwise stated. 4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 3 M9999-080505 [email protected] or (408) 955-1690 Precision Edge® SY89834U Micrel, Inc. AC ELECTRICAL CHARACTERISTICS(5) VCC = 2.5V ±5% or VCC = 3.3V ±10% , RL = 50Ω to VCC–2V; TA = –40°C to +85°C, unless otherwise stated. Symbol Parameter Condition Min fMAX Maximum Frequency Input tr / tf ≥ 350ps 1.0 tpd Propagation Delay Note 6 200 320 500 ps tSW Switchover Time 200 320 500 ps tSKEW Within-Device Skew Note 7 5 20 ps Part-to-Part Skew Note 8 300 ps Data Random Jitter (RJ) Deterministic Jitter (DJ) Note 9 Note 10 1 10 psRMS psPP Clock Cycle-to-Cycle Jitter Total Jitter (TJ) Note 11 Note 12 1 10 psRMS psPP DC Duty Cycle Input tr/tf ≥ 350ps, Note 13 45 55 % tS Set-Up Time EN to IN1, IN Note 14 and Note 15 300 ps tH Hold Time EN to IN1, IN Note 14 and Note 15 500 ps tr, tf Output Rise/Fall Times (20% to 80%) tJITTER IN-to-Q SEL-to-Q 70 Typ Max Units GHz 50 140 225 ps Notes: 5. High-frequency AC parameters are guaranteed by design and characterization. 6. VIH = 2.0V, VIL = 0.8V, 50% duty cycle. Delay measured at 100MHz from the crossing of the input signal with VCC/2 as the crossing of the differential output signal. See Figure 1. 7. Within device skew is measured between two different outputs under identical input transitions. 8. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the respective inputs. 9. Random jitter is measured with a K28.7 pattern, measured at ≤fMAX. 10. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 223–1 PRBS pattern. 11. Cycle-to-cycle jitter definition: The variation period between adjacent cycles over a random sample of adjacent cycle pairs. TJITTER_CC = Tn – Tn+1, where T is the time between rising edges of the output signal. 12. Total jitter definition: with an ideal clock input frequency of ≤ fMAX (device), no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value. 13. If tr/tf is less than 350ps, the duty cycle distortion will increase beyond the duty cycle limits. 14. Set-up and hold times apply to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous applications set-up and hold times do not apply. 15. See “Timing Diagrams,” Figure 1a. 4 M9999-080505 [email protected] or (408) 955-1690 Precision Edge® SY89834U Micrel, Inc. TIMING DIAGRAMS EN VCC/2 VCC/2 tS tH VIN IN /Q VCC/2 VCC/2 VCC/2 VCC/2 tpd tpd VOUT Q Figure 1a. Timing Diagram (EN, IN1, IN2) IN2 HIGH IN1 LOW SEL VCC/2 /Q VCC/2 tSWITCHOVER tSWITCHOVER VOUT Q Figure 1b. Timing Diagram (SEL) SINGLE-ENDED AND DIFFERENTIAL SWINGS V DIFF_OUT VOUT Figure 2b. Differential Swing Figure 2a. Single-Ended Swing 5 M9999-080505 [email protected] or (408) 955-1690 Precision Edge® SY89834U Micrel, Inc. TYPICAL OPERATING CHARACTERISTICS VCC = 3.3V, GND = 0V, RL = 50Ω to VCC–2V; TA = 25°C, unless otherwise stated. Output Swing vs. Frequency PROPAGATION DELAY (ps) OUTPUT SWING (mV) 800 700 600 500 400 300 200 100 0 0 0.5 1 1.5 2 2.5 FREQUENCY (GHz) 3 400 380 Propagation Delay vs. Temperature 360 340 320 300 280 260 240 220 200 -50 -30 -10 10 30 50 70 TEMPERATURE (°C) 6 90 M9999-080505 [email protected] or (408) 955-1690 Precision Edge® SY89834U Micrel, Inc. FUNCTIONAL CHARACTERISTICS VCC = 3.3V, GND = 0V, RL = 50Ω to VCC–2V, TA = 25°C, unless otherwise stated. 155MHz Output 300mV Offset (150mV/div.) 275mV Offset (150mV/div.) 622MHz Output TIME (1ns/div.) TIME (321.9ps/div.) 300mV Offset (150mV/div.) 1GHz Output TIME (200ps/div.) 7 M9999-080505 [email protected] or (408) 955-1690 Precision Edge® SY89834U Micrel, Inc. DIFFERENTIAL INPUT VCC 25k R IN1 IN2 SEL EN R GND Figure 3. Simplified TTL/CMOS Input Buffer RELATED PRODUCTS AND SUPPORT DOCUMENTATION Part Number Function Data Sheet Link SY89830U 2.5V/3.3V/5V 2.5GHz 1:4 PECL/ECL Clock Driver with 2:1 Differential Input Mux http://www.micrel.com/product-info/products/sy89830u.shtml SY89831U Ultra-Precision 1:4 LVPECL Fanout Buffer/ Translator with Internal Termination http://www.micrel.com/product-info/products/sy89831u.shtml SY89832U 2.5V Ultra-Precision 1:4 LVDS Fanout Buffer/ Translator with Internal Termination http://www.micrel.com/product-info/products/sy89832u.shtml SY89833U 3.3V Ultra-Precision 1:4 LVDS Fanout Buffer/ Translator with Internal Termination http://www.micrel.com/product-info/products/sy89833u.shtml 16-MLF™ Manufacturing Guidelines Exposed Pad Application Note http://www.amkor.com/products/notes-papers/ MLF-appnote-0301.pdf New Products + Termination App Note http://www.micrel.com/product-info/as/solutions.shtml HBW Solutions 8 M9999-080505 [email protected] or (408) 955-1690 Precision Edge® SY89834U Micrel, Inc. TERMINATION RECOMMENDATIONS +3.3V +3.3V ZO = 50Ω R1 130Ω R1 130Ω R2 82Ω R2 82Ω +3.3V ZO = 50Ω Vt = VCC —2V Figure 4a. Parallel Termination–Thevenin Equivalent Note: 1. For +2.5V systems: R1 = 250Ω, R2 = 62.5Ω For +3.3V systems: R1 = 130Ω, R2 = 82Ω +3.3V +3.3V Z = 50Ω Z = 50Ω 50Ω “source” 50Ω 50Ω Rb VCC “destination” C1 0.01µF (optional) Figure 4b. Three-Resistor “Y–Termination” Notes: 1. Power-saving alternative to Thevenin termination. 2. Place termination resistors as close to destination inputs as possible. 3. Rb resistor sets the DC bias voltage, equal to Vt. For +3.3V systems Rb = 50Ω. For +2.5V systems Rb = 19Ω. +3.3V +3.3V Q +3.3V R1 130Ω R1 130Ω Vt = VCC —1.3V R3 +3.3V 1kΩ ZO = 50Ω /Q R4 1.6kΩ Vt = VCC —2V R2 82Ω R2 82Ω Figure 4c. Terminating Unused LVPECL I/O Notes: 1. Unused output (/Q) must be terminated to balance the output. 2. For +2.5V systems: R1 = 250Ω, R2 = 62.5Ω, R3 = 1.25kΩ, R4 = 1.2kΩ. 2. Unused output pairs (Q and /Q) may be left floating. 9 M9999-080505 [email protected] or (408) 955-1690 Precision Edge® SY89834U Micrel, Inc. 16 LEAD EPAD MicroLeadFrame™ (MLF-16) Package EP- Exposed Pad Die CompSide Island Heat Dissipation Heat Dissipation VEE Heavy Copper Plane VEE Heavy Copper Plane PCB Thermal Consideration for 16-Pin MLF™ Package (Always solder, or equivalent, the exposed pad to the PCB.) Package Notes: Note 1. Note 2. Package meets Level 2 moisture sensitivity classification, and are shipped in dry-pack form. Exposed pads must be soldered to a ground for proper thermal management. MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB USA http://www.micrel.com The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2005 Micrel, Incorporated. 10 M9999-080505 [email protected] or (408) 955-1690