MC33076 Dual High Output Current, Low Power, Low Noise Bipolar Operational Amplifier The MC33076 operational amplifier employs bipolar technology with innovative high performance concepts for audio and industrial applications. This device uses high frequency PNP input transistors to improve frequency response. In addition, the amplifier provides high output current drive capability while minimizing the drain current. The all NPN output stage exhibits no deadband crossover distortion, large output voltage swing, excellent phase and gain margins, low open loop high frequency output impedance and symmetrical source and sink AC frequency performance. The MC33076 is tested over the automotive temperature range and is available in an 8–pin SOIC package (D suffix) and in the standard 8 pin DIP package for high power applications. • 100 Ω Output Drive Capability • Large Output Voltage Swing • Low Total Harmonic Distortion • High Gain Bandwidth: 7.4 MHz • High Slew Rate: 2.6 V/µs • Dual Supply Operation: ±2.0 V to ±18 V • High Output Current: ISC = 250 mA typ • Similar Performance to MC33178 http://onsemi.com MARKING DIAGRAMS 8 MC33076P1 AWL YYWW PDIP–8 P1 SUFFIX CASE 626 8 1 1 8 33076 ALYW SO–8 D SUFFIX CASE 751 8 1 1 A WL, L YY, Y WW, W VCC = Assembly Location = Wafer Lot = Year = Work Week PIN CONNECTIONS Output 1 Iref Inputs 1 Iref VEE 1 8 VCC 2 7 Output 2 3 +1 2 +- 4 6 5 Inputs 2 (8 Pin Pkg, Top View) Vin- Vin+ CC Vout CM ORDERING INFORMATION Device Package Shipping MC33076D SO–8 98 Units/Rail MC33076DR2 SO–8 2500 Tape & Reel PDIP–8 50 Units/Rail MC33076P1 VEE Figure 1. Equivalent Circuit Schematic (Each Amplifier) Semiconductor Components Industries, LLC, 2001 February, 2001 – Rev. 1 1 Publication Order Number: MC33076/D MC33076 MAXIMUM RATINGS Symbol Value Unit Power Supply Voltage (Note 2.) Rating VCC to VEE +36 V Input Differential Voltage Range VIDR Note 1. V Input Voltage Range VIR Note 1. V Output Short Circuit Duration (Note 2.) tSC 5.0 sec Maximum Junction Temperature TJ +150 °C Storage Temperature Tstg –60 to +150 °C Maximum Power Dissipation PD Note 2. mW 1. Either or both input voltages should not exceed VCC or VEE. 2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded (see power dissipation performance characteristic, Figure 2). See applications section for further information. DC ELECTRICAL CHARACTERICISTICS (VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.) Characteristics Input Offset Voltage (RS = 50 Ω, VCM = 0 V) (VS = ±2.5 V to ±15 V) TA = +25°C TA = –40° to +85°C Figure Symbol 3 |VIO| Min Typ Max mV – – 0.5 0.5 4.0 5.0 ∆VIO/∆T Input Offset Voltage Temperature Coefficient (RS = 50 Ω, VCM = 0 V) TA = –40° to +85°C Input Bias Current (VCM = 0 V) TA = +25°C TA = –40° to +85°C 4, 5 Input Offset Current (VCM = 0 V) TA = +25°C TA = –40° to +85°C µV/°C – 2.0 – – – 100 – 500 600 – – 5.0 – 70 100 –13 –14 +14 13 IIB nA |IIO| Common Mode Input Voltage Range 6 Large Signal Voltage Gain (VO = –10 V to +10 V) (TA = +25°C) RL = 100 Ω RL = 600 Ω (TA = –40° to +85°C) RL = 600 Ω 7 Output Voltage Swing (VID = ±1.0 V) (VCC = +15 V, VEE = –15 V) RL = 100 Ω RL = 100 Ω RL = 600 Ω RL = 600 Ω (VCC = +2.5 V, VEE = –2.5 V) RL = 100 Ω RL = 100 Ω VICR nA V AVOL kV/V 25 50 – 200 – – 25 – – 8, 9, 10 V VO+ VO– VO+ VO– 10 – 13 – +11.7 –11.7 +13.8 –13.8 – –10 – –13 VO+ VO– 1.2 – +1.66 –1.74 – –1.2 80 116 – 80 120 – Common Mode Rejection (Vin = ±13 V) 11 CMR Power Supply Rejection (VCC/VEE = +15 V/–15 V, +5.0 V/–15 V, +15 V/–5.0 V) 12 PSR http://onsemi.com 2 Unit dB dB MC33076 DC ELECTRICAL CHARACTERICISTICS (VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.) Characteristics Output Short Circuit Current (VID = ±1.0 V Output to Gnd) (VCC = +15 V, VEE = –15 V) Source Sink (VCC = +2.5 V, VEE = –2.5 V) Source Sink Figure Symbol 13, 14 ISC Power Supply Current per Amplifier (VO = 0 V) (VS = ±2.5 V to ±15 V) TA = +25°C TA = –40° to +85°C 15 Min Typ Max Unit mA 190 – +250 –280 – –215 63 – +94 –80 – –46 ID mA – – 2.2 – 2.8 3.3 AC ELECTRICAL CHARACTERICISTICS (VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.) Figure Symbol Min Typ Max Unit Slew Rate (Vin = –10 V to +10 V, RL = 100 Ω, CL = 100 pF, AV = 1.0) Characteristics 16 SR 1.2 2.6 – V/µs Gain Bandwidth Product (f = 20 kHz) 17 GBW 4.0 7.4 – MHz Unity Gain Bandwidth (Open Loop) (RL = 600 Ω, CL = 0 pF) – BW – 3.5 – MHz Gain Margin (RL = 600 Ω, CL = 0 pF) 20, 21 Am – 15 – dB Phase Margin (RL = 600 Ω, CL = 0 pF) 20, 21 ∅m – 52 – Deg Channel Separation (f = 100 Hz to 20 kHz) 22 CS – –120 – dB Power Bandwidth (VO = 20 Vpp, RL = 600 Ω, THD ≤ 1%) – BWp – 32 – kHz Total Harmonic Distortion (RL = 600 Ω, VO = 2.0 Vpp, AV = 1.0) f = 1.0 kHz f = 10 kHz f = 20 kHz 23 THD – – – 0.0027 0.011 0.022 – – – Open Loop Output Impedance (VO = 0 V, f = 2.5 MHz, AV = 10) 24 |ZO| – 75 – Ω Differential Input Resistance (VCM = 0 V) – Rin – 200 – kΩ Differential Input Capacitance (VCM = 0 V) – Cin – 10 – pF Equivalent Input Noise Voltage (RS = 100 Ω) f = 10 Hz f = 1.0 kHz 25 en – – 7.5 5.0 – Equivalent Input Noise Current f = 10 Hz f = 1.0 kHz – – – 0.33 0.15 – – http://onsemi.com 3 % nV/√Hz in pA/√Hz 4000 25 PERCENTAGE OF AMPLIFIERS (%) PD, MAXIMUM POWER DISSIPATION (mW) MC33076 3500 3000 2500 2000 MC33076P1 1500 1000 500 0 -60 MC33076D -30 0 30 60 90 TA, AMBIENT TEMPERATURE (°C) 120 20 15 10 5 0 -2.0 150 180 amplifiers tested from 3 wafer lots VCC = ±15 V TA = 25°C (Plastic DIP package) -1.5 -1.0 -0.5 0 0.5 1.0 1.5 VIO, INPUT OFFSET VOLTAGE (mV) Figure 2. Maximum Power Dissipation versus Temperature I IB , INPUT BIAS CURRENT (nA) I IB , INPUT BIAS CURRENT (nA) 150 VCC = +15 V VEE = -15 V TA = 25°C 225 200 175 150 125 -10 -5.0 0 5.0 10 137 125 112 100 75 -55 15 VCC = +15 V VEE = -15 V VCM = 0 V 88 -25 VCM, COMMON MODE VOLTAGE (V) AVOL, OPEN LOOP VOLTAGE GAIN (dB) VCC = +5.0 V to +18 V VEE = -5.0 V to -18 V ∆VIO = 5.0 mV VCC-0.50 VCC-0.75 VCC-1.0 VEE+0.25 VEE+0.125 -25 5.0 35 65 TA, TEMPERATURE (°C) 35 65 95 125 95 125 Figure 5. Input Bias Current versus Temperature VCC VCC-0.25 5.0 TA, AMBIENT TEMPERATURE (°C) Figure 4. Input Bias Current versus Common Mode Voltage VEE -55 2.5 Figure 3. Distribution of Input Offset Voltage 250 100 -15 2.0 95 125 120 115 RL = 2.0 kΩ 110 105 100 95 90 -55 Figure 6. Input Common Mode Voltage Range versus Temperature VCC = +15 V VEE = -15 V f = 10 Hz ∆VO = -10 to +10 V -25 RL = 100 Ω 5.0 35 65 TA, AMBIENT TEMPERATURE (°C) Figure 7. Open Loop Voltage Gain versus Temperature http://onsemi.com 4 MC33076 30 VO , OUTPUT VOLTAGE SWING (Vpp) VO, OUTPUT VOLTAGE (Vpp ) 40 35 30 RL = 10 kΩ TA = 25°C 25 20 RL = 100 Ω 15 10 5.0 0 0 5.0 10 15 20 VCC, |VEE|, SUPPLY VOLTAGE (V) TA = 25°C f = 1.0 kHz 25 20 15 10 VS = ±5.0 V 5.0 0 25 10 Figure 8. Output Voltage Swing versus Supply Voltage CMR, COMMON MODE REJECTION (dB) VO, OUTPUT VOLTAGE (Vpp ) 20 15 VCC = +15 V VEE = -15 V RL = 100 Ω AV = +1.0 THD = ≤ 1.0% TA = 25°C 5.0 0 100 1.0 k 10 k f, FREQUENCY (Hz) 100 k 80 60 40 VCC = +15 V VEE = -15 V VCM = 0 V ∆VCM = ±1.5 V TA = -55° to +125°C 20 0 1.0 M 10 100 1.0 k 10 k f, FREQUENCY (Hz) 100 k 1.0 M |I SC |, OUTPUT SHORT CIRCUIT CURRENT (mA) Figure 11. Common Mode Rejection versus Frequency Over Temperature 100 300 250 80 +PSR Sink 200 60 Source 150 40 VCC = +15 V VEE = -15 V ∆VCC = ±1.5 V TA = -55° to +125°C 20 0 10 k 100 Figure 10. Output Voltage versus Frequency PSR, POWER SUPPLY REJECTION (dB) 100 1.0 k RL, LOAD RESISTANCE TO GROUND (Ω) Figure 9. Maximum Peak–to–Peak Output Voltage Swing versus Load Resistance 25 10 VS = ±15 V 10 100 -PSR 1.0 k 10 k 100 k f, FREQUENCY (Hz) 100 1.0 M 10 M VCC = +15 V VEE = -15 V VID = ±1.0 V 50 0 0 Figure 12. Power Supply Rejection versus Frequency Over Temperature 3.0 6.0 9.0 |VO|, OUTPUT VOLTAGE (V) 12 Figure 13. Output Short Circuit Current versus Output Voltage http://onsemi.com 5 15 I D, SUPPLY CURRENT/AMPLIFIER (mA) 320 300 Sink 280 260 240 220 200 180 -55 Source VCC = +15 V VEE = -15 V VID = ±1.0 V RL < 10 Ω -25 5.0 35 65 TA, AMBIENT TEMPERATURE (°C) 95 5.0 4.0 TA = +125°C 3.0 TA = +25°C 2.0 TA = -55°C 1.0 0 125 0 3.0 SR, SLEW RATE (V/µS) 2.5 2.0 1.5 ∆Vin 1.0 0.5 0 -55 VCC = +15 V VEE = -15 V ∆Vin = 20 Vpp -25 -+ 100Ω 5.0 35 65 TA, AMBIENT TEMPERATURE (°C) 100pF 95 7.5 7.0 6.5 6.0 120 2B 160 1B 200 -10 -30 -50 100 k 1A) Phase, VS = ±18 V 2A) Phase, VS = ±1.5 V 1B) Gain, VS = ±18 V 2B) Gain, VS = ±1.5 V 1.0 M f, FREQUENCY (Hz) 240 10 M AV, VOLTAGE GAIN (dB) 10 VCC = +15 V VEE = -15 V f = 100 Hz RL = 100 Ω CL = 0 pF -25 5.0 35 65 TA, AMBIENT TEMPERATURE (°C) 95 125 Figure 17. Gain Bandwidth Product versus Temperature ∅, EXCESS PHASE (DEGREES) A V, VOLTAGE GAIN (dB) 1A 2A 18 8.0 5.5 -55 125 80 30 15 8.5 Figure 16. Slew Rate versus Temperature 50 6.0 9.0 12 VCC |VEE|, SUPPLY VOLTAGE (V) Figure 15. Supply Current versus Supply Voltage with No Load GBW, GAIN BANDWIDTH PRODUCT (MHz) Figure 14. Output Short Circuit Current versus Temperature 3.0 50 80 30 120 10 160 -10 -30 280 30 M 1A) Phase, (R = 100 Ω) 2A) Phase, (R = 100 Ω, C = 300 pF) 1B) Gain, (R = 100 Ω) 2B) Gain, (R = 100 Ω, C = 300 pF) -50 100 k 1.0 M 1B 2B 2A 10 M f, FREQEUNCY (Hz) Figure 18. Voltage Gain and Phase versus Frequency Figure 19. Voltage Gain and Phase versus Frequency http://onsemi.com 6 1A 200 240 280 30 M ∅ , EXCESS PHASE (DEGREES) |I SC |, OUTPUT SHORT CIRCUIT CURRENT (mA) MC33076 MC33076 Gain Margin 30 20 8.0 Phase Margin 4.0 0 0 10 50 100 Drive Channel VCC = +15 V VEE = -15 V RL = 100 Ω TA = 25°C 100 k 2.0 0 400 1.0 M e n , INPUT REFERRED NOISE VOLTAGE (NV/ √Hz) ZO , OUTPUT IMPEDANCE () Ω 60 40 AV = 1000 20 AV = 100 0 10 k AV = 10 AV = 1.0 100 k 1.0 M f, FREQUENCY (Hz) 1200 0 2000 1600 VCC = +15 V VEE = -15 V RL = 100 Ω VO = 2.0 Vpp TA = 25°C 2.5 2.0 1.5 AV = +10 1.0 AV = +1000 0.5 0 AV = +100 10 100 AV = +1 1.0 k f, FREQUENCY (Hz) 10 k 100 k Figure 23. Total Harmonic Distortion versus Frequency VCC = +15 V VEE = -15 V VCM = 0 V VO = 0 V TA = 25°C 80 800 3.0 Figure 22. Channel Separation versus Frequency 100 4.0 Gain Margin 10 THD, TOTAL HARMONIC DISTORTION (%) CS, CHANNEL SEPARATION (dB) 110 10 k f, FREQUENCY (Hz) 6.0 Figure 21. Open Loop Gain Margin and Phase Margin versus Output Load Capacitance 120 1.0 k 8.0 Phase Margin CL, OUTPUT LOAD CAPACITANCE (pF) 130 70 100 10 20 0 140 80 12 30 Figure 20. Phase Margin and Gain Margin versus Differential Source Resistance 90 14 40 0 12 k 2.0 k 4.0 k 6.0 k 8.0 k 10 k RT, DIFFERENTIAL SOURCE RESISTANCE (Ω) 16 VCC = +15 V VEE = -15 V VO = 0 V A m , OPEN LOOP GAIN MARGIN (dB) 12 40 ∅ m, PHASE MARGIN (DEGREES) 16 60 50 VCC = +15 V VEE = -15 V RT = R1 + R2 VO = 0 V TA = 25°C ∅ m, PHASE MARGIN (DEGREES) A m , GAIN MARGIN (dB) 20 10 M 20 16 VCC = +15 V VEE = -15 V TA = 25°C 12 + - VO Input Noise Voltage Test Circuit 8.0 4.0 0 10 Figure 24. Output Impedance versus Frequency 100 1.0 k f, FREQUENCY (Hz) 10 k Figure 25. Input Referred Noise Voltage versus Frequency http://onsemi.com 7 100 k MC33076 os, PERCENT OVERSHOOT (%) 100 80 VCC = +15 V VEE = -15 V TA = 25°C 60 RL = 2.0 kΩ Copper Pad 40 20 0 10 Copper Pad RL = 100 Ω 100 1000 CL, LOAD CAPACITANCE (pF) 10 k Figure 27. PC Board Heatsink Example Figure 26. Percent Overshoot versus Load Capacitance APPLICATIONS INFORMATION 52°C/W typically, in still air. The junction–to–ambient thermal resistance (RθJA) can be decreased further by using a copper padb on the printed circuit board (as shown in Figure 27) to draw the heat away from the package. Care must be taken not to exceed the maximum junction temperature or damage to the device may occur. The MC33076 dual operational amplifier is available in the standard 8–pin plastic dual–in–line (DIP) and surface mount packages, and also in a 16–pin batwing power package. To enhance the power dissipation capability of the power package, Pins 4, 5, 12, and 13 are tied together on the leadframe, giving it an ambient thermal resistance of http://onsemi.com 8 MC33076 PACKAGE DIMENSIONS PDIP–8 P1 SUFFIX CASE 626–05 ISSUE L 8 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5 –B– 1 4 DIM A B C D F G H J K L M N F –A– NOTE 2 L C J –T– MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC --10 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC --10 0.030 0.040 N SEATING PLANE D M K G H 0.13 (0.005) M T A M B M SO–8 D SUFFIX CASE 751–07 ISSUE W –X– NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. A 8 5 0.25 (0.010) S B 1 M Y M 4 K –Y– G C N X 45 SEATING PLANE –Z– 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M S http://onsemi.com 9 J DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0 8 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 8 0.010 0.020 0.228 0.244 MC33076 Notes http://onsemi.com 10 MC33076 Notes http://onsemi.com 11 MC33076 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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