SEMTECH SC2453ITSTR

SC2453
High Performance Quad Output
Switching Regulator
POWER MANAGEMENT
Description
PRELIMINARY
Features
SC2453 is a high performance multi-output converter
controller that can be configured for a variety of applications. The SC2453 utilizes synchronous rectified buck
topologies where efficiency is most important. It also
provides dedicated programmable positive and negative
linear regulators using external transistors in conjunction
with coupled windings to generate positive and negative
voltages. Power up sequencing prevents converter latchups.
‹
‹
‹
‹
‹
‹
‹
Two synchronized converters for low noise
Power up sequencing to prevent latch-ups
Out of phase operation for low input ripple
Over current protection
Wide input range, 4.5 to 30V
Programmable frequency up to 700KHz
Two synchronous bucks for high efficiency at high
current
One dedicated programmable positive linear
regulator and one dedicated programmable negative linear regulator
–40 to 105 degree C operating temperature
Output voltage as low as 0.5V
Small package TSSOP-28
‹
The two buck converters are out of phase, reducing input ripple, allowing for fewer input capacitors. All converters are synchronized to prevent beat frequencies.
High frequency operation will reduce ripple and minimize
noise. It also reduces the size of output inductors and
capacitors. Other features include soft start, power-good
signaling, bootstrapping for high side MOSFETs, and frequency synchronization.
‹
‹
‹
Applications
‹ DSL applications with multiple input voltage requirements
‹ Mixed-Signal applications requiring positive and
negative voltages
‹ Cable modem power management
‹ Base station power management
Typical Application Circuit
+8-30V
C29
Q1
C30
C29
R28
C32
16
C29
6
9
R31
+3.3V
C29
7
8
AVCC
28
27
PVCC
BDI
VIN
D11
SS
BST2
OSC
GD2H
PH2
SYNC/SHDN
POK
GD2L
FB2
C32
R31
Q2
+2.5V
4
BD4
EO2
SC2453
BST1
5
R31
FB4
GD1H
R31
PH1
C32
11
-12V
Q12
R32
C32
R32
C32
BD3
GD1L
C31
10
FB1
FB3
EO1
AGND PGND
15
D11
D10
22
21
ILIM2
14
17
C31
Q11
+3.3V
18
19
C33
Q11
20
13
R30
R33
R32
12
C34
C35
26
25
Q14
C31
+1.5V
L9
24
Q15
23
2
C38
R35
3
C41
ILIM1
1
R28
C30
L8
C42
R39
R38
R28
R32
+3.3V
Revision 5, August 2002
1
www.semtech.com
SC2453
POWER MANAGEMENT
Absolute Maximum Ratings
PRELIMINARY
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified
in the Electrical Characteristics section is not implied.
Parameter
Maximum
Units
BST1, BST2 to PGND
35
V
VIN to PGND
30
V
PVCC, AVCC to PGND
7
V
±0.3
V
PH1 to BST1, PH2 to BST2
-6 to 0.3
V
GD1H to PH1, GD2H to PH2
7
V
GD1L, GD2L to PGND
7
V
ILIM1, ILIM2 to AGND
7
V
OSC, SYNC, POK, SS to AGND
7
V
BDI, BD3, BD4 to PGND
7
V
FB1, FB2, FB3, FB4, EO1, EO2 to AGND
7
V
GD1H, GD1L, GD2H, DG2L Source or Sink Current
1
A
Storage Temperature Range
-60 to +150
°C
Junction Temperature
-40 to +125
°C
260
°C
PGND to AGND
Lead Temperature (Soldering) 10 Sec.
Electrical Characteristics
Unless specified: TA = 25°C, VCC = 12V, fs = 600KHz, SYNC/SHDN = 5V
Parameter
Test Conditions
Min
Typ
Max
Unit
Pow er Supply
Quiescent Current
SS/SHDN = 0V
Operating Current
No load
µA
7
12
mA
AVCC
VIN > 5.5V
4.5
5
5.5
V
PVC C
VIN > 5.5V
4.5
5
5.5
V
4.312
4.4
4.488
V
Undervoltage Lockout
Start Threshold
UVLO Hysteresis
0.1
V
70
nS
PWM Comparator
Delay to Output
 2002 Semtech Corp.
2
www.semtech.com
SC2453
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Parameter
PRELIMINARY
Test Conditions
Min
Typ
Max
Unit
0.49
0.5
0.51
V
Positive Linear Regulator
Feedback Voltage
Feedback Input Leakage Current
Amplifier Transconductance
µA
VFB4 = 0.5V, IB04 = 0.5 to 5mA (sink)
Drive Sink Current
-2
mV
5
mA
Negative Linear Regulator
Feedback Voltage
-25
0
25
Feedback Input Leakage Current
Amplifier Trandconductance
mV
µA
VFB3 = 0V, IFB3 = 0.5 to 5mA (source)
Driver Source Current
-1.5
mV
5
mA
Error Amplifier
Feedback Voltage
0.49
0.5
Input Bias Current
Input Offset Voltage
Open Loop Gain
0.51
V
200
nA
5
mV
90
dB
Unity Gain Bandwidth
3
MHz
Output Sink Current
2
mA
Output Source Current
2
mA
Slew Rate
1
V/µS
Oscillator
Frequency Range
Frequency
100
RT = TBD
540
600
700
KHz
660
KHz
CT Peak Voltage
3.0
V
CT Valley Voltage
0.1
V
SYNC Input High Pulse Width
100
nS
SYNC Rise/Fall Time
SYNC Frequency Range
FOSC
SYNC High/Low Threshold
 2002 Semtech Corp.
1.5
3
50
nS
FOSC
± 10%
kHz
V
www.semtech.com
SC2453
POWER MANAGEMENT
Electrical Characteristics (Cont.)
PRELIMINARY
Unless specified: TA = 25°C, VCC = 12V, fs = 600KHz
Parameter
Test Conditions
Min
Typ
Min
Units
Duty Cycle
PWM 1 & 2 Maximum Duty Cycle
fs = 100kHz
96
%
PWM 1 & 2 Maximum Duty Cycle
fs = 700kHz
77
%
5
%
2
V
Charge Current
5
µA
Discharge Current
2
mA
Disable Threshold Voltage
0.5
V
Disable Low to Shut Down
50
µs
Gate Drive On-Resistance(H)
2
Ω
Gate Drive On-Resistance(L)
2
Ω
PWM 1 & 2 Minimum Duty Cycle
Current Limit
CH1& 2 ILIM Set Voltage
Soft Start/Shut Dow n
Output
Rise Time
C OUT = 1000pF
20
nS
Fall Time
COUT = 1000pF
20
nS
0.55
V
1
%
0.45
V
1
%
Pow er Good
FB1 & FB2 High Trip Level
Hysteresis
FB1 & FB2 Low Trip Level
Hysteresis
PWR OK Output Low Level
V
PWR OK Output High Leakage
µA
 2002 Semtech Corp.
4
www.semtech.com
SC2453
POWER MANAGEMENT
Pin Configuration
PRELIMINARY
Ordering Information
Top View
Part Number
P ackag e
Temp. Range (TJ)
SC2453ITSTR
TSSOP-28
-40°C to +85°C
Note:
Only available in tape and reel packaging. A reel
contains 2500 devices.
(28 Pin TSSOP)
Marking Information
TOP
nnnn = Part Number (Example: 1406)
yyww = Date Code (Example: 0012)
xxxxx = Semtech Lot No. (Example: P94A01)
 2002 Semtech Corp.
5
www.semtech.com
SC2453
POWER MANAGEMENT
Pin Descriptions
PRELIMINARY
Pin #
Pin Name
1
ILIM1
Current limit threshold set for the OUTPUT1. An external resistor adjusts the limit.
2
FB 1
Feedback input for OUTPUT1.
3
EO1
Error amplifier output for compensation of OUTPUT1.
4
BD 4
Positive linear regulator base driver.
5
FB 4
Feedback input for OUTPUT4.
6
SS/SHDN
7
SYNC
Oscillator synchronization pin.
8
POK
Open drain power good output.
9
OSC
Connect a resistor to AGND for programming the oscillator frequency.
10
FB 3
Feedback input for OUTPUT3.
11
BD 3
Negative linear regulator base driver.
12
EO2
Error amplifier output for compensation of OUTPUT2.
13
FB 2
Feedback input for OUTPUT2.
14
ILIM2
Current limit threshold set for OUTPUT2. An external resistor adjusts the limit.
15
AGND
Analog signal ground.
16
AVCC
Supply voltage for analog circuitry.
17
BST2
Boost capacitor connection for the OUTPUT2 high side gate drive. Connect an external
capacitor and a diode as shown in the Typical Application Circuit.
18
GD2H
Gate drive output for OUTPUT2. It is 180 degrees out of phase with GD1H.
19
PH2
20
GD2L
Gate drive output for OUTPUT2, low side N-Channel MOSFET.
21
PGND
Power ground.
22
PVC C
Supply voltage for output drivers.
23
GD1L
Gate drive output for OUTPUT1, low side N-Channel MOSFET.
24
PH1
25
GD1H
Gate drive output for OUTPUT1, high side N-Channel MOSFET.
26
BST1
Boost capacitor connection for the OUTPUT1 high side gate drive. Connect an external
capacitor and a diode as shown in the Typical Application Circuit.
27
VIN
Input supply voltage.
28
BD I
Base drive for AVCC/PVCC regulator.
 2002 Semtech Corp.
Pin Function
Soft start pin. Hold low to shutdown part.
Switching node for OUTPUT2 external inductor connection.
Switching node for OUTPUT1 external inductor connection.
6
www.semtech.com
SC2453
POWER MANAGEMENT
Block Diagram
 2002 Semtech Corp.
PRELIMINARY
7
www.semtech.com
SC2453
POWER MANAGEMENT
Applications Information
PRELIMINARY
OSCILLATOR
The SC2453 is designed to control and drive two N-Channel MOSFET synchronous rectified buck and two LDOs,
one positive and the other negative. The two bucks are
synchronized and out of phase operation for low input
ripple and noise. The switching frequency is programmable to optimize design. The SC2453 switching regulator section features lossless current sensing while it provides a programmable cycle by cycle over current limit.
The SC2453 linear sections are low dropout regulators.
The voltage for the linear controllers LDO1 and LDO2 are
programmable.
The switching frequency of the SC2453 is set by an external resistor using the following formula:
R freq =
OVER CURRENT
SC2453 monitors any voltage drop in the lower MOSFETs
Rdson voltage due to an over current condition. This
method of current sensing minimizes any unnecessary
losses due to external sense resistance.
SUPPLIES
The SC2453 utilizes an internal current source and an
external resistor connected from the ILIM pins to the
AGND pin to program a current limit level. This limit is
programmable by choosing the resistor relative to the
level required. The value of the resistor can be selected
by the following formula:
Supplies VIN, PVCC and AVCC from the input source are
used to power the SC2353. An external PNP transistor
as a linear regulator supplies AVCC and PVCC. The VIN
supply provides the bias for the Internal Reference and
UVLO circuitry. The AVCC supply provides the bias for the
oscillator, the switchers, the LDO controllers, and the
Power Good circuitry. PVCC is used to drive the low side
MOSFET gate.
Ri lim = 2000 /(IIim * Rdson)
An internal comparator with a reference from the level
set by the external resistor monitors the voltage drop
across the lower MOSFET. Once the Vdson of the MOSFET
exceeds this level, the low side gate is turned on and the
upper MOSFET is turned off.
START UP SEQUENCE
A 5uA current source pulls up on the SS pin. When the
SS pin reaches 0.5V, the first converter will start. The
reference input of the error amplifier is ramped up with
the soft-start signal. When the SS pin reaches 2V the SS
pin is pulled down to approximately 0.7V and the second
converter will begin to soft-start in an identical fashion
to the first converter. When the SS pin reaches 2V for
the second time, the SS pin is pulled to approximately
0.7V again and the LDOs are started. The reference of
the positive LDO is ramped with the SS pin while
the negative LDO should be soft-started externally by
ramping the positive supply of the feedback resistors.
The SS pin will then be pulled up to supply, i.e. AVCC. The
SS time is controlled by the value of the SS cap. If the
SS pin is pulled below 0.5V, the SC2453 is disabled.
GATE DRIVERS
The low side gate driver is supplied from PVCC and provides a peak source/sink current of 1A. The high side
gate drive is also capable of sourcing and sinking peak
currents of 1A. The high side MOSFET gate drive can be
provided by an external 12V supply that is connected
from BST to GND. The actual gate to source voltage of
the upper MOSFET will approximately equal 7V (12V-VCC).
If the external 12V supply is not available, a classical
bootstrap technique can be implemented from the PVCC
supply. A bootstrap capacitor is connected from BST to
Phase while PVCC is connected through a diode (Schottky
or other fast low VF diode) to the BST. This will provide a
gate to source voltage approximately equal to the VCCVdiode drop.
The power-okay circuitry monitors the FB inputs of the
converter error amplifiers. If the voltage on these inputs
goes above 0.55V or below 0.45V then the POK pin is
pulled low. The power-okay circuitry monitors the FB inputs of the converter error amplifiers. If the voltage on
these inputs goes above 0.55V or below 0.45V then the
POK pin is pulled low. The POK pin is held low until the
end of the start-up sequence.
 2002 Semtech Corp.
1
10p • 8.4 • fs
Shoot through control circuitry provides a 30ns dead time
to ensure both the upper and lower MOSFET will not turn
on simultaneously and cause a shoot through condition.
8
www.semtech.com
SC2453
POWER MANAGEMENT
Applications Information (Cont.)
PRELIMINARY
The transfer function of the compensation network is as
follows:
PWM CONTROLLER
SC2453 is a voltage mode buck controller that utilizes
an externally compensated high bandwidth error amplifier to regulate output voltage. The power stage of the
synchronous rectified buck converter control-to-output
transfer function is as shown below:
G VD (s) = VIN
ω
GCOMP (s ) = I ⋅
s
s
)
ωZ 2
s
)
ωP 2
where,
ω Z1 =
1 + sR C C
L
1 + s + s 2LC
R
ωI =
where,
ωO =
s
)(1 +
ωZ1
s
(1 +
)(1 +
ωP1
(1 +
1
1
, ωZ 2 =
R 2 C1
(R1 + R 3 )C 2
1
1
, ωP1 =
, ωP 2 =
R 1 ( C1 + C 3 )
R3C2
1
C1C 3
R2
C1 + C 3
The design guidelines are as following:
1
1. Set the loop gain crossover frequency ωC for given
switching frequency.
2. Place an integrator in the origin to increase DC and
low frequency gains.
3. Select ωZ1 and ωZ2 such that they are placed near ωO
to dampen peaking; the loop gain has –20dB rate
to go across the 0dB line for obtaining a wide bandwidth.
4. Cancel ωESR with compensation pole ωP1 (ωP1 = ωESR ).
5. Place a high frequency compensation pole ωP2 at the
half switching frequency to get the maximum attenuation of the switching ripple and the high frequency
noise with the adequate phase lag at ωC.
LC
L – Output inductance
C – Output capacitance
RC – Output capacitor ESR
VIN – Input voltage
C3
C2
R3
R2
C1
R1
-
T
ω Z1
+
Vref
Loop gain T(s)
ωo
ω Z2
Gd
ωc
0dB
ω p1
Figure 1. Voltage Mode Buck Converter Compensation
Network
ω p2
ω ESR
Figure 2. Asymptotic diagram of buck power stage and
its compensated loop gain.
 2002 Semtech Corp.
9
www.semtech.com
SC2453
POWER MANAGEMENT
Applications Information (Cont.)
PRELIMINARY
and as short as possible to minimize loop inductance.
Minimizing this loop area will a) reduce EMI, b) lower
ground injection currents, resulting in electrically “cleaner”
grounds for the rest of the system and c) minimize source
ringing, resulting in more reliable gate switching signals.
DUAL LDO CONTROLLERS
The SC2453 provides positive and negative adjustable
linear regulator controllers. The positive linear regulator
uses a PNP transistor to regulate output voltage. This is
set by a voltage divider connected from the output to FB
to AGND. Referring to the front page Application Circuit,
select R8 in the 5KΩ to 20KΩ range. Calculate R7 with
the following equation:
3). The connection between the junction of QT, QB and
the output inductor should be a wide trace or copper
region. It should be as short as practical. Since this connection has fast voltage transitions, keeping this connection short will minimize EMI. Also keep the Phase connection to the IC short. The top FET gate charge currents
flow in this trace.

V
R 7 = R 8  OUT − 1

 0.5
4) The Output Capacitor(s) (Cout) should be located as
close to the load as possible. Fast transient load currents are supplied by Cout only and connections between
Cout and the load must be short, wide copper areas to
minimize inductance and resistance.
The negative linear regulator uses a NPN transistor to
regulate output voltage. This is set by a voltage divider
connected from the output to FB to a positive reference.
Referring to the front page Application Circuit, select R16
in the 5KΩ to 20KΩ range. Calculate R12 with the following equation:
LAYOUT GUIDELINES
5) The SC2453 is best placed over a quiet ground plane
area. Avoid pulse currents in the Cin, QT, QB loop flowing
in this area. GND should be returned to the ground plane
close to the package and close to the ground side of
(one of) the output capacitor(s). If this is not possible,
the GND pin may be connected to the ground path between the Output Capacitor(s) and the Cin, Q1, Q2 loop.
Under no circumstances should GND be returned to a
ground inside the Cin, Q1, Q2 loop.
Careful attention to layout requirements are necessary
for successful implementation of the SC2453 PWM controller. High switching current is present in the application and their effect on ground plane voltage differentials must be understood and minimized.
6) A separate analog ground plane connects to the
SC2453 AGND pin. All analog grounding paths including
decoupling capacitors, feedback resistors, compensation
components, and current-limit setting resistors should
be connected to this plane.
1). The high power parts of the circuit should be laid out
first. A ground plane should be used. The number and
position of ground plane interruptions should be such as
to not unnecessarily compromise ground plane integrity.
Isolated or semi-isolated areas of the ground plane may
be deliberately introduced to constrain ground currents
to particular areas, such as the input capacitor or the
bottom FET ground.
7) Ideally, the grounds for the two LDO sections should
be returned to the ground side of (one of) the output
capacitor(s).
V
R12 = R16  OUT
 VREF



where VREF is the positive voltage reference.
2). The loop formed by the Input Capacitor(s) (Cin), the
Top FET (QT) and the Bottom FET (QB) must be kept as
small as possible. This loop contains all the high current,
fast transition switching. Connections should be as wide
 2002 Semtech Corp.
10
www.semtech.com
 2002 Semtech Corp.
11
-12V/0.1A
+2.5V/0.5A
+3.3V/1.5A
R24
10K
R13
10K
R17
220
C21
2.2nF
470
R15
C18 10nF
R3 20K
C8 0.1uF
+3.3V/1.5A
TP10
TP7
R51
10K
C22 C23
10uF 10uF
Q7
FZT649
C52 100pF
R11
40.2K
220
R8
C12 2.2nF
R20
100pF 36.5K
C53
C17
10uF
Q4
FZT749
C13
10uF
1
2
3
4
CON4
J2
R1
10K
1
2
10
11
5
4
8
7
9
6
C6
1uF
TP2
CON2
J1
FB3
BD3
FB4
BD4
POK
SYNC
OSC
22
C50
1uF
21
BST2
EO1
R23
20K
TP13
1
FB1
GD1L
PH1
GD1H
BST1
EO2
FB2
GD2L
PH2
ILIM2 ILIM1
R2214
26.1K
AGND PGND
C4
0.1uF
3
2
23
24
25
26
12
13
20
19
18
17
C51
47uF/16V
GD2H
VIN
27
R50
20K
BDI
28
0.1uF
C5
SC2453
AVCC PVCC
15
SS/SD
16
R2
10
Q1
FZT749
TP1
R9 20K
2
R6
8.2nF
C14
TP6
C9
0.1uF
C25
4.7nF
680pF
C24
2
R14
R21
20K
C15 680pF
C16
0.1uF R12 2
2
R4
TP3
TP11
6
7
C7
470uF
TP12
Q6
SUD50N03-10CP
TP14
TP15
3
L1 VPH2-0083(1:4)
D3
B150
C3
470uF/25V
Q5
SUD50N03-10CP L2 10uH
TP5
Q3
SUD50N03-10CP
4
C2
470uF/25V
Q2
SUD50N03-10CP
TP8
D2
D1
1N5819HW 1N5819HW
C1
470uF/25V
TP16
R19
10K
R16
20K
R10
2.0K
R5
11.3K
TP4
TP9
R18
150
C19
3.3nF
R7
47
C10
0.01uF
C20
470uF
C11
470uF
-12V/0.1A
+2.5V/0.5A
+1.5V/2A
+3.3V/1.5A
CON8
1
2
3
4
5
6
7
8
J3
SC2453
POWER MANAGEMENT
Evaluation Board Schematic
PRELIMINARY
www.semtech.com
SC2453
POWER MANAGEMENT
Bill of Materials - Evaluation Board
Item
Qty. Reference
PRELIMINARY
Value
Description/Part No.
Foot Print
470uF/16V
Rubycon P/N: 16ZA470
CPCYL/D.400/LS.200/.034
1
3
C1,C2,C3
2
4
C4,C5,C9,C16
3
2
C6,C50
4
3
C7,C11,C20
5
1
C8
0.1uF
1206
6
1
C 10
0.01uF
1206
7
2
C12,C21
2.2nF
1206
8
4
C13,C17,C22,C23
9
1
C 14
8.2nF
1206
10
2
C15,C24
680pF
1206
11
1
C 18
10nF
1206
12
1
C 19
3.3nF
1206
13
1
C 25
4.7nF
1206
14
1
C 51
47uF/4V
15
2
C52,C53
16
2
D1,D2
17
1
18
0.1uF
1206
1uF
12.6
470uF/16V
68uF/16V
Panasonic P/N: ECA-1CHG471
Panasonic P/N: EEU-FC1C680
Sanyo P/N: 4TPB330ML
100pF
CAP_RADIAL_V8X11P
CPCYL/D.200/LS.100/.031
7343
1206
1N5819HW
Diodes Inc. P/N: 1N5819HW-7
SOD-123
D3
B 150
Diodes Inc. P/N: B150-13
SM/SMA
1
L1
VPH2-0083 (1:4)
Coiltronics P/N: VPH2-0083
VP2
19
1
L2
15uH
Coilcraft P/N: DO5022P-153
DO3316
20
2
Q1,Q2
FZT749
Zetex Inc. P/N: FZT749TA
SOT-223
21
4
Q2,Q3,Q5,Q7
SUD50N03-10CP
Vishay P/N: SUD50N03-10CP
SOT-223
22
1
Q7
FZT649
Zetex Inc. P/N: FZT649TA
SOT-223
23
5
R1,R13,R19,R24,
R51
24
1
R2
25
6
R3,R9,R16,R21,R23R50
26
4
R4,R6,R12,R14
27
1
28
10K
1206
10
1206
20K
1206
2
1206
R5
11.3K
1206
1
R7
47
1206
29
2
R8,R17
220
1206
30
1
R10
2.0K
1206
31
1
R11
40.2K
1206
32
1
R15
470
1206
 2002 Semtech Corp.
12
www.semtech.com
SC2453
POWER MANAGEMENT
Bill of Materials - Evaluation Board
Item
Qty. Reference
PRELIMINARY
Value
Description/Part No.
Foot Print
33
1
R18
150
1206
34
1
R20
36.5K
1206
35
1
R22
26.1K
1206
36
1
U1
S C 2453
 2002 Semtech Corp.
Semtech Corp.
P/N: SC2453ITSTR
13
TSSOP-28
www.semtech.com
SC2453
POWER MANAGEMENT
Outline Drawing - TSSOP-28
PRELIMINARY
Land Pattern - TSSOP-28
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
 2002 Semtech Corp.
14
www.semtech.com