STMICROELECTRONICS SABRE-LL-I

SABRE-LL-I
Combo motor driver
Data Brief
Features
■
Configurable Device
■
4 Full Bridges to generate
– Up 2 DC motor drivers and 1 SteppEr
Motor Driver
or
– 4 DC motor drivers
■
TQFP64 Exposed Pad
Bridges (1 & 2) additional configurations are
– Super DC
– 2 Half Bridges
– 1 super Half Bridge
– 2 switches
– 1 super switch
■
Bridges (3 & 4) additional configurations are:
– Same as Bridges 1&2, listed above;
– 2 Buck Regulators (Bridge 3)
– 1 Super Buck Regulator
– Battery Charger (Bridge 4)
■
One variable voltage Buck switching regulator
■
One switching regulator controller
■
One linear regulator
■
Bidirectional serial interface
■
Programmable Watchdog function.
■
Integrated power sequencing and supervisory
functions with fault signaling through serial
interface and external reset pin.
■
Thermal shutdown protection with thermal
warning capability.
Table 1.
May 2007
■
Very low power dissipation in shut-down mode
(~35 mW)
■
Aux features
– Op amps
– Comparators
– Pass switches
– Multi-channels 9 bit ADC
– GPIOs
Description
SABRe is a new concept of IC in the Motion &
Power Supply field. ST aim is to follow the SABRe
specification and to offer to the customer an IC
with a wide number of features, that can be
configured and customized: Motor Drivers,
Regulators, high precision A/D Converter,
Operational Amplifiers and Voltage Comparators.
The start up configuration can be defined by the
GPIOs and then through the Serial Interface; a
customization can be done through a metal layer
in order to set more complex functions.
Device summary
Part number
Package
Packing
SABRE-LL-I
TQFP64
Tray
Rev 1
For further information contact your local STMicroelectronics sales office.
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www.st.com
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Int. Ref. Volt
S/H
Power Up
Sequencer
ADC
6 bits current Sink
DAC
(2x)
3.3V
Pass Sw.
GPIOs
S
P
I
Batt. Charg.
circuitry
Analog Mux
Thermal
System
VREF=1V
Charge Pump
Internal
regulators
Switching reg.
controller
Bridge 2
External FET
Switch Driver
Bridge 1
Supervisory
& Reset
Manager
Figure 1.
Main Linear
Driver
Main Switching
regulator
Block diagram
SABRE-LL-I
Block diagram
Block diagram
Bridge 3
Op Amps
Bridge 4
SA B Re
AC00199
SABRE-LL-I
Detailed description
Detailed description
●
Four widely configurable Full Bridges. Diagonal Rdson are:
– Bridge 1 and 2:
–
Diagonal Rdson: 1.1Ω;
–
Max operative current= 2.5A.
– Bridge 3 and 4:
–
Diagonal Rdson: 1.6Ω;
–
Max operative current= 1.5A.
The possible configurations for each bridge are the following:
– Bridge 1 or 2:
–
DC motor driver
–
Super DC (Bridge 1 and 2 paralleled form SuperBridge1)
–
2 Half Bridges
–
1 super Half Bridge
–
2 switches
–
1 super switch
– Bridge 3 has the same configurations as Bridge 1 or 2 (Bridge 3 and 4 paralleled they
form SuperBridge2) plus the following:
–
½ Stepper motor driver
–
2 Buck regulators (VAUX1_SW, VAUX2_SW)
–
1 super Buck regulator
– Bridge 4 has the same configurations as Bridge 1 or 2 (Bridge 4 and 3 paralleled they
form SuperBridge2) plus the following:
●
–
½ Stepper motor driver
–
1 Super Buck regulator (VAUX3_SW)
–
Battery charger
One variable voltage Buck switching regulator (VMAIN_SW) with:
– Internal soft start sequence.
– Pulse skipping strategy control.
– Internal PWM generation.
– Internal power FET.
– Regulated voltage range: 1-5 Volts.
– Output load current: 3.0 A.
– Switching frequency: ~250KHz.
●
–
–
–
–
One switching regulator controller (VEXT_SW) with:
Pulse skipping strategy control.
Internal PWM generation.
Regulated voltage range: 1-30 Volts.
Current limitation.
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Detailed description
●
4/8
SABRE-LL-I
One linear regulator (VMAIN_LIN) that can be used to generate low current low ripple
voltages. This regulator can be used to drive an external bipolar pass transistor to
generate high current/low ripple output voltage.
●
Current sink DAC:
– 64 available current levels (6 bits programmable).
– Up to 64 mA output current.
– 5 Volt tolerant.
●
Two Operational Amplifiers:
– 3.3V supply, rail to rail input compatibility, internally compensated.
– They can have all pins externally accessible or can be internally configured as a
buffer, for internal reference voltages.
– Unity Gain Bandwidth > 1MHz.
●
Two Comparators with 3.3V input compatibility and low offset.
●
Two 3.3V Pass Switches with 1Ω Rdson and short circuit protected.
●
One 8bits/9bits A/D converter (100KS/sec @ 9 bits, 200KS/sec @8bits). It can be used
to measure most of the internal signals, of the input pins and the IC temperature.
●
Fourteen General Purpose I/Os that can be used to drive/read internal/external
analog/logic signals.
●
Bidirectional Serial Interface with address detection so that different ICs can share the
same data-bus.
●
Programmable Watchdog function.
●
Integrated power sequencing and supervisory functions with fault signaling through
serial interface and external reset pin.
●
Thermal shutdown protection with thermal warning capability.
●
Very Low power dissipation in Shut-down mode (~35 mW)
●
SABRe is intended to maximize the use of its components, so that when an internal
circuit is not needed it could be used for other applications. Bridge 3, for example, can
be used as a bridge or to implement two switching regulators with synchronous
rectification: to obtain this flexibility SABRe includes 2 separate regulation loops for
these regulators. When the bridge is used as a motor driver, the 2 regulation loops can
be redirected on general purpose I/Os, to leave the possibility to assembly a switching
regulator using an external FET and one of these regulation loops.
SABRE-LL-I
Global specifications
Global specifications
Absolute maximum specifications
The following specifications define the maximum range of voltages or currents for SABRe.
Stresses above these Absolute Maximum specifications may cause permanent damage to
the device.
Exposure to Absolute Maximum Ratings for extended periods may affect device reliability.
Table 2.
Symbol
Absolute maximum ratings
Parameters
Conditions
Min.
Max
Unit
VSupply_Abs
Maximum supply voltage
40
V
V3V3pin_Abs
3.3V pins maximum input
voltage
3.9
V
VSw_Abs
Switching regulators
output pin voltage range.
VSupply
V
TBD
V
-40
190
°C
0
TSD
°C
VPump_Abs
Charge pump pins max
voltage.
Tj_Abs
Junction temperature (2)
-3
(1)
Storage
Operating
1. This value is useful to define the voltage rating for an external capacitor to be connected from VSupply to
VPump.
VPump is internally generated and can never be supplied by an external voltage source nor, is it intended to
provide voltage to external loads.
2. TSD means the "Thermal Shut Down" temperature of the device.
Operating ratings specifications
Table 3.
Symbol
IC operating ratings
Characteristic
VSupply_Op
Supply voltage range
ISupply_Op
Operative supply current
IShut_down
Shut down state supply
current
V3V3pin_Op
3.3 volt pins max voltage
Tj_Abs
Junction temperature
Conditions
Min
Max
Unit
23
38
V
15
mA
1
mA
3.6
V
125.
°C
(1)
Operating
0
1. Operating supply current is measured with System regulators operating but externally loaded only with the
specified minimum load.
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Package information
SABRE-LL-I
Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Figure 2.
TQFP64 mechanical data and package dimensions
mm
inch
DIM.
MIN.
TYP.
A
MAX.
MIN.
TYP.
1.20
A1
0.05
A2
0.95
b
0.17
c
0.09
D
11.80
D1
9.80
D2
2.00
D3
MAX.
0.0472
0.15
0.002
1.00
1.05
0.0374 0.0393 0.0413
0.22
0.27
0.0066 0.0086 0.0086
0.20
0.0035
12.00
12.20
0.464
0.472
0.480
10.00
10.20
0.386
0.394
0.401
0.006
0.0078
0.787
7.50
0.295
E
11.80
12.00
12.20
0.464
0.472
0.480
E1
9.80
10.00
10.20
0.386
0.394
0.401
E2
2.00
0.787
E3
7.50
0.295
e
0.50
0.0197
L
0.45
L1
k
ccc
0.60
0.75
0.0177 0.0236 0.0295
1.00
0˚
OUTLINE AND
MECHANICAL DATA
3.5˚
0.0393
7˚
0.080
0˚
3.5˚
7˚
TQFP64 (10x10x1.0mm)
Exposed Pad Down
0.0031
7278840 B
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SABRE-LL-I
Revision history
Revision history
Table 4.
Document revision history
Date
Revision
3-May-2007
1
Changes
Initial release.
7/8
SABRE-LL-I
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