TPS786xx www.ti.com SLVS389G – SEPTEMBER 2002 – REVISED JULY 2006 ULTRALOW-NOISE, HIGH-PSRR, FAST, RF, 1.5-A LOW-DROPOUT LINEAR REGULATORS FEATURES • • • • • • • 1.5-A Low-Dropout Regulator With Enable Available in Fixed and Adjustable (1.2-V to 5.5-V) Output Versions High PSRR (49 dB at 10 kHz) Ultralow Noise (48 µVRMS, TPS78630) Fast Start-Up Time (50 µs) Stable With a 1-µF Ceramic Capacitor Excellent Load/Line Transient Response Very Low Dropout Voltage (390 mV at Full Load, TPS78630) 6-Pin SOT223 and 5-Pin DDPAK Package The TPS786xx family of low-dropout (LDO) low-power linear voltage regulators features high power-supply rejection ratio (PSRR), ultralow noise, fast start-up, and excellent line and load transient responses in small outline, SOT223-6 and DDPAK-5 packages. Each device in the family is stable, with a small 1-µF ceramic capacitor on the output. The family uses an advanced, proprietary BiCMOS fabrication process to yield extremely low dropout voltages (for example, 390 mV at 1.5 A). Each device achieves fast start-up times (approximately 50 µs with a 0.001 µF bypass capacitor) while consuming very low quiescent current (265 µA, typical). Moreover, when the device is placed in standby mode, the supply current is reduced to less than 1 µA. The TPS78630 exhibits approximately 48 µVRMS of output voltage at 3.0 V output noise with a 0.1 µF bypass capacitor. Applications with analog components that are noise sensitive, such as portable RF electronics, benefit from the high PSRR, low noise features, and the fast response time. APPLICATIONS • • • • • RF: VCOs, Receivers, ADCs Audio Bluetooth®, Wireless LAN Cellular and Cordless Telephones Handheld Organizers, PDAs DCQ PACKAGE SOT223-6 (TOP VIEW) KTT PACKAGE DDPAK-5 (TOP VIEW) EN IN GND OUT NR/FB 1 2 3 4 TPS78630 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY 80 6 GND 70 Ripple Rejection − (dB) 1 2 3 4 5 EN IN GND OUT NR/FB TPS78630 RIPPLE REJECTION vs FREQUENCY TAB GND IOUT = 1 mA 60 Output Spectral Noise Density − (µV/ Hz) • • DESCRIPTION VIN = 4 V COUT = 10 µF CNR = 0.01 µF 50 IOUT = 1.5 A 40 30 20 10 0 5 1 10 100 1k 10k 100k Frequency (Hz) 1M 10M 0.8 VIN = 5.5 V COUT = 2.2 µF CNR = 0.1 µF 0.7 0.6 0.5 0.4 0.3 IOUT = 1 mA 0.2 0.1 0.0 100 IOUT = 1.5 A 1k 10k 100k Frequency (Hz) Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Bluetooth is a registered trademark of Bluetooth SIG, Inc. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2002–2006, Texas Instruments Incorporated TPS786xx www.ti.com SLVS389G – SEPTEMBER 2002 – REVISED JULY 2006 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) VOUT (2) PRODUCT TPS786xxyyyz (1) (2) XX is nominal output voltage (for example, 28 = 2.8 V, 285 = 2.85 V, 01 = Adjustable). YYY is package designator. Z is package quantity. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Output voltages from 1.3 V to 5.0 V in 100 mV increments are available; minimum order quantities may apply. Contact factory for details and availability. ABSOLUTE MAXIMUM RATINGS over operating temperature (unless otherwise noted) (1) VALUE VIN range –0.3 V to 6 V VEN range –0.3 V to VIN + 0.3 V VOUT range 6V Peak output current Internally limited ESD rating, HBM 2 kV ESD rating, CDM 500 V Continuous total power dissipation See Dissipation Ratings table Junction temperature range, TJ –40°C to +150°C Storage temperature range, Tstg –65°C to +150°C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. PACKAGE DISSIPATION RATINGS (1) (2) 2 PACKAGE BOARD RθJC RθJA DDPAK High-K (1) 2 °C/W 23 °C/W SOT223 Low-K (2) 15 °C/W 53 °C/W The JEDEC high-K (2s2p) board design used to derive this data was a 3-in x 3-in (7,5-cm x 7,5-cm), multilayer board with 1 ounce internal power and ground planes and 2 ounce copper traces on top and bottom of the board. The JEDEC low-K (1s) board design used to derive this data was a 3-in x 3-in (7,5-cm x 7,5cm), two-layered board with 2 ounce copper traces on top of the board. Submit Documentation Feedback TPS786xx www.ti.com SLVS389G – SEPTEMBER 2002 – REVISED JULY 2006 ELECTRICAL CHARACTERISTICS Over recommended operating temperature range (TJ = –40°C to +125°C), VEN = VIN, VIN = VOUT(nom) + 1 V (1), IOUT = 1 mA, COUT = 10 µF, CNR = 0.01 µF, unless otherwise noted. Typical values are at +25°C. PARAMETER TEST CONDITIONS Input voltage, VIN (1) TYP 2.7 Internal reference, VFB (TPS78601) 1.200 Continuous output current IOUT Output voltage range Output voltage MIN Accuracy 1.225 0 TPS78601 1.225 TPS78601 (2) 0 µA ≤ IOUT ≤ 1.5 A, VOUT + 1 V ≤ VIN ≤ 5.5 V (1) Fixed VOUT 0 µA ≤ IOUT ≤ 1.5 A, VOUT + 1 V ≤ VIN ≤ 5.5 V (0.98)VOUT VOUT –2.0 Output voltage line regulation (∆VOUT%/VIN) (1) VOUT + 1 V ≤ VIN ≤ 5.5 V 5 Load regulation (∆VOUT%/VOUT) 0 µA ≤ IOUT ≤ 1.5 A 7 Dropout voltage (3) VIN = VOUT(nom)– 0.1 V MAX V 1.250 V 1.5 A 5.5 – VDO V (1.02)VOUT V +2.0 % 12 %/V mV TPS78628 IOUT = 1.5 A 410 580 TPS78630 IOUT = 1.5 A 390 550 TPS78633 IOUT = 1.5 A 340 510 mV Output current limit VOUT = 0 V 4.2 A Ground pin current 0 µA ≤ IOUT ≤ 1.5 A 260 385 µA Shutdown current (4) VEN = 0 V, 2.7 V ≤ VIN ≤ 5.5 V 0.07 1 µA FB pin current VFB = 1.225 V 1 µA Power-supply ripple rejection TPS78630 2.4 UNIT 5.5 f = 100 Hz, IOUT = 10 mA 59 f = 100 Hz, IOUT = 1.5 A 52 f = 10 kHz, IOUT = 1.5 A 49 f = 100 kHz, IOUT = 1.5 A Output noise voltage (TPS78630) Time, start-up (TPS78630) BW = 100 Hz to 100 kHz, IOUT = 1.5 A RL = 2 Ω, COUT = 1 µF dB 32 CNR = 0.001 µF 66 CNR = 0.0047 µF 51 CNR = 0.01 µF 49 CNR = 0.1 µF 48 CNR = 0.001 µF 50 CNR = 0.0047 µF µVRMS µs 75 CNR = 0.01 µF 110 High-level enable input voltage 2.7 V ≤ VIN ≤ 5.5 V 1.7 VIN Low-level enable input voltage 2.7 V ≤ VIN ≤ 5.5 V 0 0.7 V EN pin current VEN = 0 –1 1 µA UVLO threshold VCC rising UVLO hysteresis (1) (2) (3) (4) 2.25 2.65 100 V V mV Minimum VIN = VOUT + VDO or 2.7 V, whichever is greater. Tolerance of external resistors not included in this specification. Dropout is not measured for TPS78618 or TPS78625 since minimum VIN = 2.7 V. For adjustable version, this applies only after VIN is applied; then VEN transitions high to low. Submit Documentation Feedback 3 TPS786xx www.ti.com SLVS389G – SEPTEMBER 2002 – REVISED JULY 2006 FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION IN OUT 300Ω Current Sense UVLO Overshoot Detect GND ILIM SHUTDOWN R1 EN FB UVLO Thermal Shutdown R2 Quickstart Bandgap Reference 1.225 V VIN External to the Device VREF 250 kΩ FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION IN OUT 300Ω UVLO Current Sense Overshoot Detect GND ILIM SHUTDOWN R1 EN UVLO Thermal Shutdown R2 R2 = 40 kΩ Quickstart VIN Bandgap Reference 1.225 V VREF NR 250 kΩ Terminal Functions TERMINAL 4 NAME DCQ (SOT223) KTT (DDPAK) NR 5 5 Noise-reduction pin for fixed versions only. An external bypass capacitor, connected to this terminal, in conjunction with an internal resistor, creates a low-pass filter to further reduce regulator noise. EN 1 1 The EN terminal is an input that enables or shuts down the device. When EN is a logic high, the device is enabled. When the device is a logic low, the device is in shutdown mode. Feedback input voltage for the adjustable device. DESCRIPTION FB 5 5 GND 3, 6 3, TAB IN 2 2 Input supply OUT 4 4 Regulator output Regulator ground Submit Documentation Feedback TPS786xx www.ti.com SLVS389G – SEPTEMBER 2002 – REVISED JULY 2006 TYPICAL CHARACTERISTICS TPS78630 OUTPUT VOLTAGE vs OUTPUT CURRENT TPS78628 OUTPUT VOLTAGE vs JUNCTION TEMPERATURE 2.798 5 3.05 VIN = 4 V COUT = 10 µF TJ = 25°C 3.04 3.03 350 VIN = 3.8 V COUT = 10 µF 340 4 2.794 VIN = 3.8 V COUT = 10 µF IOUT = 1 mA 3.02 3.00 2.99 IGND (µA) 330 3.01 VOUT (V) VOUT (V) TPS78628 GROUND CURRENT vs JUNCTION TEMPERATURE 3 2.790 2 2.786 IOUT = 1.5 A 2.98 2.97 IOUT = 1.5 A 320 310 IOUT = 1 mA 1 2.782 300 2.96 2.95 0.0 0.3 0.6 0.9 1.2 0 2.778 −40 −25 −10 5 1.5 IOUT (A) TJ (°C) Figure 2. Figure 3. TPS78630 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY TPS78630 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY TPS78630 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY 0.70 0.60 0.50 0.40 IOUT = 1 mA 0.20 IOUT = 1.5 A 0.00 100 1k 10k IOUT = 1.5 A 0.4 0.3 0.2 IOUT = 1 mA 0.1 1k Frequency (Hz) 10k CNR = 0.0047 µF 1.5 CNR = 0.01 µF 1.0 CNR = 0.001 µF 0.5 1k 10k 100k Frequency (Hz) Figure 5. Figure 6. TPS78630 ROOT MEAN SQUARED OUTPUT NOISE vs BYPASS CAPACITANCE TPS78628 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE TPS78630 RIPPLE REJECTION vs FREQUENCY 80 600 60 VIN = 2.7 V COUT = 10 µF IOUT = 1.5 A 400 VDO (mV) 50 40 30 300 200 20 IOUT = 1.5 A COUT = 10 µF BW = 100 Hz to 100 kHz 0.0047 µF 0.01 µF CNR (µF) Figure 7. 100 0.1 µF 0 −40 −25 −10 5 VIN = 4 V COUT = 10 µF CNR = 0.01 µF 70 Ripple Rejection − (dB) 500 0 0.001 µF CNR = 0.1 µF 2.0 0.0 100 100k VIN = 5.5 V COUT = 10 µF IOUT = 1.5 A 2.5 Figure 4. 70 10 3.0 Frequency (Hz) 80 RMS Output Noise (µVRMS) VIN = 5.5 V COUT = 10 µF CNR = 0.1 µF 0.5 0.0 100 100k Output Spectral Noise Density − (µV//Hz) VIN = 5.5 V COUT = 2.2 µF CNR = 0.1 µF Output Spectral Noise Density (µV//Hz) Output Spectral Noise Density (µV//Hz) 0.6 0.10 20 35 50 65 80 95 110 125 TJ (°C) Figure 1. 0.80 0.30 290 −40 −25 −10 5 20 35 50 65 80 95 110 125 IOUT = 1 mA 60 50 IOUT = 1.5 A 40 30 20 10 0 20 35 50 65 80 95 110 125 TJ (°C) Figure 8. Submit Documentation Feedback 1 10 100 1k 10k 100k 1M 10M f (Hz) Figure 9. 5 TPS786xx www.ti.com SLVS389G – SEPTEMBER 2002 – REVISED JULY 2006 TYPICAL CHARACTERISTICS (continued) TPS78630 RIPPLE REJECTION vs FREQUENCY TPS78630 RIPPLE REJECTION vs FREQUENCY 80 50 70 IOUT = 1 mA Ripple Rejection (dB) 60 IOUT = 1.5 A 40 30 20 60 IOUT = 1.5 A 30 20 10 0 10 1k 100 10k 100k 1M 10M IOUT = 1.5 A 40 30 20 0 1 10 1k 100 10k 100k 1M 1 10M TPS78618 LINE TRANSIENT RESPONSE TPS78630 LINE TRANSIENT RESPONSE TPS78628 LOAD TRANSIENT RESPONSE 3 dv 1V + ms dt IOUT = 1.5 A COUT = 10 µF CNR = 0.01 µF IOUT (A) 1 4 IOUT = 1.5 A COUT = 10 µF CNR = 0.01 µF 3 80 0 −30 −60 dv 1V + ms dt VIN = 3.8 V COUT = 10 µF CNR = 0.01 µF −1 150 40 0 −40 0 75 0 −75 0 100 200 300 400 500 600 700 800 900 1000 20 40 60 80 100 120 140 160 180 200 t (µs) t (µs) t (µs) Figure 13. Figure 14. Figure 15. TPS78625 POWER UP/ POWER DOWN TPS78630 DROPOUT VOLTAGE vs OUTPUT CURRENT TPS78601 DROPOUT VOLTAGE vs INPUT VOLTAGE 600 4.0 VOUT = 2.5 V RL = 1.6 Ω CNR = 0.01 µF 500 450 500 400 TJ = 125°C VDO (mV) 2.0 1.5 TJ = 25°C 300 200 VIN 300 TJ = 25°C 250 TJ = −40°C 200 150 TJ = −40°C 1.0 100 VOUT TJ = 125°C 350 VDO (mV) 400 2.5 100 IOUT = 1.5 A COUT = 10 µF CNR = 0.01 µF 50 0 0 0 400 di 1.5 A + ms dt −150 −80 20 40 60 80 100 120 140 160 180 200 0 ∆VOUT (mV) ∆VOUT (mV) 30 0.5 10M Figure 12. 5 3.0 1M Figure 11. 4 3.5 10k 100k Figure 10. 2 0 1k 100 f (Hz) 6 60 10 f (Hz) VIN (V) VIN (V) 50 5 2 ∆VOUT (mV) 60 10 f (Hz) VOUT (V) IOUT = 1 mA 40 0 VIN = 4 V COUT = 2.2 µF CNR = 0.1 µF 70 50 10 1 VIN = 4 V COUT = 2.2 µF CNR = 0.01 µF Ripple Rejection (dB) IOUT = 1 mA Ripple Rejection (dB) 80 80 VIN = 4 V COUT = 10 µF CNR = 0.1 µF 70 800 1200 Time (µs) Figure 16. 6 TPS78630 RIPPLE REJECTION vs FREQUENCY 1600 2000 0 0 200 400 600 800 1000 1200 1400 IOUT (mA) Figure 17. Submit Documentation Feedback 2.5 3.0 3.5 4.0 VIN (V) Figure 18. 4.5 5.0 TPS786xx www.ti.com SLVS389G – SEPTEMBER 2002 – REVISED JULY 2006 TYPICAL CHARACTERISTICS (continued) TPS78630 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT MINIMUM REQUIRED INPUT VOLTAGE vs OUTPUT VOLTAGE IOUT = 1.5 A 4.0 TJ = 125°C 3.5 3.0 TJ = −40°C 2.5 TJ = 25°C 100 COUT = 1 µF Region of Instability 10 1 Region of Stability 0.1 0.01 2.0 2.0 2.5 3.0 3.5 COUT = 2.2 µF Region of Instability 10 1 Region of Stability 0.1 0.01 1 4.0 30 125 500 1000 1500 1 30 125 IOUT (mA) VOUT (V) Figure 19. 500 1000 1500 IOUT (mA) Figure 20. Figure 21. TPS78630 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT START-UP 3 100 COUT = 10 µF VIN = 4 V, COUT = 10 µF, IIN = 1.5 A 2.75 2.50 Region of Instability 10 CNR = 0.0047 µF 2.25 1 Region of Stability Enable CNR = 0.001 µF 2 VOUT (V) 1.5 ESR − Equivalent Series Resistance (Ω) Minimum VIN (V) 4.5 100 ESR − Equivalent Series Resistance (Ω) ESR − Equivalent Series Resistance (Ω) 5.0 TPS78630 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT 1.75 1.50 CNR = 0.01 µF 1.25 1 0.1 0.75 0.50 0.25 0.01 0 1 30 125 500 1000 1500 0 100 IOUT (mA) Figure 22. Submit Documentation Feedback 200 300 400 500 600 t (µs) Figure 23. 7 TPS786xx www.ti.com SLVS389G – SEPTEMBER 2002 – REVISED JULY 2006 APPLICATION INFORMATION The TPS786xx family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive equipment. The device features extremely low dropout voltages, high PSRR, ultralow output noise, low quiescent current (265 µA, typically), and enable input to reduce supply currents to less than 1 µA when the regulator is turned off. A typical application circuit is shown in Figure 24. VIN IN VOUT OUT TPS786xx 0.1 µF EN GND 2.2 µF NR 0.01 µF Figure 24. Typical Application Circuit EXTERNAL CAPACITOR REQUIREMENTS A 2.2-µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS786xx, is required for stability and improves transient response, noise rejection, and ripple rejection. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source. Like most low-dropout regulators, the TPS786xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitor is 1 µF. Any 1 µF or larger ceramic capacitor is suitable. The internal voltage reference is a key source of noise in an LDO regulator. The TPS786xx has an NR pin which is connected to the voltage reference through a 250-kΩ internal resistor. The 250-kΩ internal resistor, in conjunction with an external bypass capacitor connected to the NR pin, creates a low pass filter to reduce the voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator to operate properly, the current flow out of the NR pin must be at a minimum, 8 because any leakage current creates an IR drop across the internal resistor, thus creating an output error. Therefore, the bypass capacitor must have minimal leakage current. The bypass capacitor should be no more than 0.1-µF to ensure that it is fully charged during the quickstart time provided by the internal switch shown in the functional block diagram. For example, the TPS78630 exhibits only 48 µVRMS of output voltage noise using a 0.1-µF ceramic bypass capacitor and a 10-µF ceramic output capacitor. Note that the output starts up slower as the bypass capacitance increases due to the RC time constant at the bypass pin that is created by the internal 250-kΩ resistor and external capacitor. BOARD LAYOUT RECOMMENDATIONS TO IMPROVE PSRR AND NOISE PERFORMANCE To improve ac measurements like PSRR, output noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the ground pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the ground pin of the device. REGULATOR MOUNTING The tab of the SOT223-6 package is electrically connected to ground. For best thermal performance, the tab of the surface-mount version should be soldered directly to a circuit-board copper area. Increasing the copper area improves heat dissipation. Solder pad footprint recommendations for the devices are presented in Application Report SBFA015, Solder Pad Recommendations for Surface-Mount Devices, available from the TI web site at www.ti.com. Submit Documentation Feedback TPS786xx www.ti.com SLVS389G – SEPTEMBER 2002 – REVISED JULY 2006 PROGRAMMING THE TPS78601 ADJUSTABLE LDO REGULATOR In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be placed between OUT and FB. The output voltage of the TPS78601 adjustable regulator is programmed using an external resistor divider as shown in Figure 25. The output voltage is calculated using Equation 1: V OUT + VREF ǒ 1) R1 R2 Ǔ The approximate value of this capacitor can be calculated using Equation 3: (3 x 10−7) x (R 1 ) R 2) C1 + (R1 x R 2) (3) (1) The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is not used (such as in a unity-gain configuration), then the minimum recommended output capacitor is 2.2 µF instead of 1 µF. where: • VREF = 1.2246 V typ (the internal reference voltage) Resistors R1 and R2 should be chosen for approximately 40-µA divider current. Lower value resistors can be used for improved noise performance, but the device wastes more power. Higher values should be avoided, as leakage current at FB increases the output voltage error. REGULATOR PROTECTION The TPS786xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (for example, during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. The recommended design procedure is to choose R2 = 30.1 kΩ to set the divider current at 40 µA, C1 = 15 pF for stability, and then calculate R1 using Equation 2: VOUT R1 + *1 VREF ǒ Ǔ VIN R2 (2) IN 1 µF The TPS786xx features internal current limiting and thermal protection. During normal operation, the TPS786xx limits output current to approximately 2.8 A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds approximately 165°C, thermal-protection circuitry shuts it down. Once the device has cooled down to below approximately 140°C, regulator operation resumes. OUT TPS78601 R1 EN GND OUTPUT VOLTAGE PROGRAMMING GUIDE VOUT C1 2.2 µF OUTPUT VOLTAGE R1 R2 C1 1.8 V 14.0 kΩ 30.1 kΩ 33 pF 3.6 V 57.9 kΩ 30.1 kΩ 15 pF FB R2 Figure 25. TPS78601 Adjustable LDO Regulator Programming Submit Documentation Feedback 9 TPS786xx www.ti.com SLVS389G – SEPTEMBER 2002 – REVISED JULY 2006 THERMAL INFORMATION increase in temperature due to the regulator power dissipation. The temperature rise is computed by multiplying the maximum expected power dissipation by the sum of the thermal resistances between the junction and the case (RθJC), the case to heatsink (RθCS), and the heatsink to ambient (RθSA). Thermal resistances are measures of how effectively an object dissipates heat. Typically, the larger the device, the more surface area available for power dissipation and the lower the object's thermal resistance. The amount of heat that an LDO linear regulator generates is directly proportional to the amount of power it dissipates during operation. All integrated circuits have a maximum allowable junction temperature (TJmax) above which normal operation is not assured. A system designer must design the operating environment so that the operating junction temperature (TJ) does not exceed the maximum junction temperature (TJmax). The two main environmental variables that a designer can use to improve thermal performance are air flow and external heatsinks. The purpose of this information is to aid the designer in determining the proper operating environment for a linear regulator that is operating at a specific power level. Figure 26 illustrates these thermal resistances for (a) a SOT223 package mounted in a JEDEC low-K board, and (b) a DDPAK package mounted on a JEDEC high-K board. In general, the maximum expected power (PDmax) consumed by a linear regulator is computed as shown in Equation 4: Equation 5 summarizes the computation: P D max + ǒVIN(avg) * VOUT(avg)Ǔ The RθJC is specific to each regulator as determined by its package, lead frame, and die size provided in the regulator data sheet. The RθSA is a function of the type and size of heatsink. For example, black body radiator type heatsinks can have RθCS values ranging from 5°C/W for very large heatsinks to 50°C/W for very small heatsinks. The RθCS is a function of how the package is attached to the heatsink. For example, if a thermal compound is used to attach a heatsink to a SOT223 package, RθCS of 1°C/W is reasonable. I OUT(avg) ) V IN(avg) T J + T A ) PDmax IQ (4) where: • VIN(avg) is the average input voltage. • VOUT(avg) is the average output voltage. • IOUT(avg) is the average output current. • IQ is the quiescent current. For most TI LDO regulators, the quiescent current is insignificant compared to the average output current; therefore, the term VIN(avg)× IQ can be neglected. The operating junction temperature is computed by adding the ambient temperature (TA) and the A ǒRqJC ) R qCS ) R qSAǓ TJ A CIRCUIT BOARD COPPER AREA RθJC B C B B TC RθCS A C RθSA SOT223 Package (a) TA Figure 26. Thermal Resistances 10 Submit Documentation Feedback DDPAK Package (b) C (5) TPS786xx www.ti.com SLVS389G – SEPTEMBER 2002 – REVISED JULY 2006 Equation 5 simplifies into Equation 6: T J + T A ) PDmax RqJA Rearranging Equation 6 gives Equation 7: T * TA R qJA + J PDmax (6) (7) Using Equation 6 and the computer model generated curves shown in Figure 27 and Figure 30, a designer can quickly compute the required heatsink thermal resistance/board area for a given ambient temperature, power dissipation, and operating environment. From Figure 27, DDPAK Thermal Resistance vs Copper Heatsink Area, the ground plane needs to be 1 cm2 for the part to dissipate 2.5 W. The operating environment used in the computer model to construct Figure 27 consisted of a standard JEDEC High-K board (2S2P) with a 1 oz. internal copper plane and ground plane. The package is soldered to a 2 oz. copper pad. The pad is tied through thermal vias to the 1 oz. ground plane. Figure 28 shows the side view of the operating environment used in the computer model. 40 RθJA − Thermal Resistance (°C/W) Even if no external black body radiator type heatsink is attached to the package, the board on which the regulator is mounted provides some heatsinking through the pin solder connections. Some packages, like the DDPAK and SOT223 packages, use a copper plane underneath the package or the circuit board ground plane for additional heatsinking to improve their thermal performance. Computer-aided thermal modeling can be used to compute very accurate approximations of an integrated circuit's thermal performance in different operating environments (for example, different types of circuit boards, different types and sizes of heatsinks, different air flows, etc.). Using these models, the three thermal resistances can be combined into one thermal resistance between junction and ambient (RθJA). This RθJA is valid only for the specific operating environment used in the computer model. No Air Flow 35 150 LFM 30 250 LFM 25 20 15 0.1 1 10 PCB Copper Area (cm2) 100 Figure 27. DDPAK Thermal Resistance vs PCB Copper Area DDPAK POWER DISSIPATION The DDPAK package provides an effective means of managing power dissipation in surface mount applications. The DDPAK package dimensions are provided in the mechanical drawing section at the end of the data sheet. The addition of a copper plane directly underneath the DDPAK package enhances the thermal performance of the package. To illustrate, the TPS78625 in a DDPAK package was chosen. For this example, the average input voltage is 5 V, the output voltage is 2.5 V, the average output current is 1 A, the ambient temperature 55°C, the air flow is 150 LFM, and the operating environment is the same as documented below. Neglecting the quiescent current, the maximum average power is shown in Equation 8: P Dmax + (5 * 2.5) V 1 A + 2.5 W (8) 1 oz. Copper Power Plane 1 oz. Copper Ground Plane 2 oz. Copper Solder Pad with 25 Thermal Vias Thermal Vias, 0.3 mm Diameter, 1.5 mm Pitch Figure 28. DDPAK Thermal Resistance Computer Model Substituting TJmax for TJ into Equation 6 gives Equation 9: R qJAmax + (125 * 55)°Cń2.5 W + 28°CńW (9) Submit Documentation Feedback 11 TPS786xx www.ti.com SLVS389G – SEPTEMBER 2002 – REVISED JULY 2006 TA = 55°C 250 LFM 4 150 LFM 3 No Air Flow RθJA − Thermal Resistance (°C/W) 5 180 1 0.1 140 120 100 80 60 40 20 0 0.1 1 10 PCB Copper Area (cm2) SOT223 POWER DISSIPATION The SOT223 package provides an effective means of managing power dissipation in surface-mount applications. The SOT223 package dimensions are provided in the mechanical drawing section at the end of the data sheet. The addition of a copper plane directly underneath the SOT223 package enhances the thermal performance of the package. To illustrate, the TPS78625 in a SOT223 package was chosen. For this example, the average input voltage is 3.3 V, the output voltage is 2.5 V, the average output current is 1 A, the ambient temperature 55°C, no air flow is present, and the operating environment is the same as documented below. Neglecting the quiescent current, the maximum average power is calculated as shown in Equation 10: P Dmax + (3.3 * 2.5) V 1 A + 800 mW (10) Substituting TJmax for TJ into Equation 6 gives Equation 11: R qJAmax + (125 * 55)°Cń800 mW + 87.5°CńW 1 PCB Copper Area (in2) 10 Figure 30. SOT223 Thermal Resistance vs PCB Copper Area 100 Figure 29. DDPAK Maximum Power Dissipation vs PCB Copper Area From the data in Figure 30 and rearranging Equation 6, the maximum power dissipation for a different ground plane area and a specific ambient temperature can be computed, as shown in Figure 31. 6 TA = 25°C 5 4 4 in2 PCB Area 3 0.5 in2 PCB Area 2 1 0 0 25 50 75 100 125 150 TA − Ambient Temperature (°C) Figure 31. SOT223 Maximum Power Dissipation vs Ambient Temperature (11) From Figure 30, RθJA vs PCB Copper Area, the ground plane needs to be 0.55 in2 for the part to dissipate 800 mW. The operating environment used to construct Figure 30 consisted of a board with 1 oz. copper planes. The package is soldered to a 1 oz. copper pad on the top of the board. The pad is tied through thermal vias to the 1 oz. ground plane. 12 No Air Flow 160 2 PD − Maximum Power Dissipation (W) PD − Maximum Power Dissipation (W) From the data in Figure 29 and rearranging Equation 6, the maximum power dissipation for a different ground plane area and a specific ambient temperature can be computed. Submit Documentation Feedback PACKAGE OPTION ADDENDUM www.ti.com 28-Apr-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS78601DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78601DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78601DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78601DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78601KTT OBSOLETE DDPAK/ TO-263 KTT 5 TPS78601KTTR ACTIVE DDPAK/ TO-263 KTT 5 TPS78601KTTRG3 ACTIVE DDPAK/ TO-263 KTT TPS78601KTTT ACTIVE DDPAK/ TO-263 TPS78601KTTTG3 ACTIVE TPS78618DCQ Lead/Ball Finish MSL Peak Temp (3) TBD Call TI Call TI 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR 5 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR DDPAK/ TO-263 KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78618DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78618DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78618DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78618KTT OBSOLETE DDPAK/ TO-263 KTT 5 TPS78618KTTR ACTIVE DDPAK/ TO-263 KTT 5 TPS78618KTTRE3 ACTIVE DDPAK/ TO-263 KTT TPS78618KTTRG3 ACTIVE DDPAK/ TO-263 TPS78618KTTT ACTIVE TPS78618KTTTG3 TBD Call TI Call TI 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR 5 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR KTT 5 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR DDPAK/ TO-263 KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR ACTIVE DDPAK/ TO-263 KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR TPS78625DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78625DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78625DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78625DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78625KTT OBSOLETE DDPAK/ TO-263 KTT 5 TPS78625KTTR ACTIVE DDPAK/ TO-263 KTT 5 500 Addendum-Page 1 TBD Call TI Call TI Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR PACKAGE OPTION ADDENDUM www.ti.com 28-Apr-2008 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS78625KTTRG3 ACTIVE DDPAK/ TO-263 KTT 5 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR TPS78625KTTT ACTIVE DDPAK/ TO-263 KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR TPS78625KTTTG3 ACTIVE DDPAK/ TO-263 KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR TPS78628DCQ ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78628DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78628DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78628DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78628KTT OBSOLETE DDPAK/ TO-263 KTT 5 TPS78628KTTR ACTIVE DDPAK/ TO-263 KTT 5 TPS78628KTTRG3 ACTIVE DDPAK/ TO-263 KTT TPS78628KTTT ACTIVE DDPAK/ TO-263 TPS78628KTTTG3 ACTIVE TPS78630DCQ Lead/Ball Finish MSL Peak Temp (3) TBD Call TI Call TI 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR 5 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR DDPAK/ TO-263 KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78630DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78630DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78630DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78630KTT OBSOLETE DDPAK/ TO-263 KTT 5 TPS78630KTTR ACTIVE DDPAK/ TO-263 KTT 5 TPS78630KTTRG3 ACTIVE DDPAK/ TO-263 KTT TPS78630KTTT ACTIVE DDPAK/ TO-263 TPS78630KTTTG3 ACTIVE TPS78633DCQ TBD Call TI Call TI 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR 5 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR DDPAK/ TO-263 KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78633DCQG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78633DCQR ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78633DCQRG4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS78633KTT OBSOLETE DDPAK/ TO-263 KTT 5 Addendum-Page 2 TBD Call TI Call TI PACKAGE OPTION ADDENDUM www.ti.com 28-Apr-2008 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS78633KTTR ACTIVE DDPAK/ TO-263 KTT 5 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR TPS78633KTTRE3 ACTIVE DDPAK/ TO-263 KTT 5 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR TPS78633KTTRG3 ACTIVE DDPAK/ TO-263 KTT 5 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR TPS78633KTTT ACTIVE DDPAK/ TO-263 KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR TPS78633KTTTG3 ACTIVE DDPAK/ TO-263 KTT 5 50 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR TPS78650DCQR PREVIEW SOT-223 DCQ 6 2500 TBD Call TI Call TI TPS78650DCQT PREVIEW SOT-223 DCQ 6 TBD Call TI Call TI Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) TPS78601DCQR SOT-223 DCQ 6 2500 330.0 TPS78618DCQR SOT-223 DCQ 6 2500 TPS78625DCQR SOT-223 DCQ 6 2500 TPS78628DCQR SOT-223 DCQ 6 TPS78630DCQR SOT-223 DCQ TPS78633DCQR SOT-223 DCQ 12.4 6.8 7.3 1.88 8.0 12.0 Q3 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3 2500 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3 6 2500 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3 6 2500 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3 Pack Materials-Page 1 W Pin1 (mm) Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS78601DCQR SOT-223 DCQ 6 2500 358.0 335.0 35.0 TPS78618DCQR SOT-223 DCQ 6 2500 358.0 335.0 35.0 TPS78625DCQR SOT-223 DCQ 6 2500 358.0 335.0 35.0 TPS78628DCQR SOT-223 DCQ 6 2500 358.0 335.0 35.0 TPS78630DCQR SOT-223 DCQ 6 2500 358.0 335.0 35.0 TPS78633DCQR SOT-223 DCQ 6 2500 358.0 335.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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