UTC-IC TEA2025D-S20-T

UNISONIC TECHNOLOGIES CO., LTD
TEA2025D
LINEAR INTEGRATED CIRCUIT
STEREO AUDIO AMPLIFIER
DESCRIPTION
The UTC TEA2025D is a monolithic integrated circuit that
intended for use as dual or bridge power audio amplifier portable
radio cassette players.
SOP-20
FEATURES
* Dual or bridge connection modes.
* Few external components.
* Supply voltage down to 3V.
* High channel separation.
* Very low switch on\off noise.
* Max gain of 45dB with adjust external resistor.
* Soft clipping.
* Thermal protection.
* 3V<VCC<15V
* P=2*1W,VCC=6V,RL=4Ω
* P=2*2.3W,VCC=9V,RL=4Ω
* P=2*0.1W,VCC=3V,RL=4Ω
■
*Pb-free plating product number: TEA2025DL
ORDERING INFORMATION
Order Number
Normal
Lead Free Plating
TEA2025D-S20-R
TEA2025DL-S20-R
TEA2025D-S20-T
TEA2025DL-S20-T
Package
Packing
SOP-20
SOP-20
Tape Reel
Tube
TEA2025DL-S20-R
(1)Packing Type
(2)Package Type
(3)Lead Plating
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Copyright © 2005 Unisonic Technologies Co., Ltd
(1) R: Tape Reel, T: Tube
(2) S20: SOP-20
(3) L: Lead Free Plating, Blank: Pb/Sn
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QW-R107-017,B
TEA2025D
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LINEAR INTEGRATED CIRCUIT
PIN CONFIGURATION
BRIDGE
1
20
Vcc
OUT2
2
19
OUT1
BOOT2
3
18
BOOT1
GND
4
17
GND
GND
5
16
GND
GND
6
15
GND
GND
7
14
GND
FEEDBACK
8
13
FEEDBACK
IN 2(+)
9
12
IN 1(+)
10
11
GND(Sub)
SVR
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TEA2025D
■
LINEAR INTEGRATED CIRCUIT
BLOCK DIAGRAM
GND(Sub )
IN 1+
THERMAL
PROTECT
FEED
GND
50Ω
GND
BOOT 1
OUT1
10kΩ
+
START
CIRCUIT
1
1
5kΩ
DECOUPLING
SVR
Vss +
BRIDGE
IN 2+
2
50Ω
2
+
10kΩ
50Ω
FEED
UNISONIC TECHNOLOGIES CO., LTD
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GND
GND
BOOT 2
OUT2
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LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage
VSS
15
V
Output Peak Current
IO(PEAK)
1.5
A
Junction Temperature
TJ
150
°C
Storage Temperature
TSTG
150
°C
Note Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
■
THERMAL DATA
PARAMETER
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Note: The θJA is measured with 4 cm2 copper area heatsink.
■
SYMBOL
θJC
θJA
RATINGS
15
65
UNIT
°C/W
°C/W
ELECTRICAL CHARACTERISTICS (Ta=25°C, VCC=9V, Stereo unless otherwise specified)
PARAMETER
Supply Voltage
Quiescent Current
Quiescent Output Voltage
SYMBOL
VSS
IQ
VOUT
Voltage Gain
GV
Voltage Gain Difference
Input Impedance
Output Power (d=10%)
Distortion
TEST CONDITIONS
Stereo
Bridge
MIN
3
43
49
∆GV(DIFF)
RI
RL=4Ω
RL=32Ω
RL=4Ω
RL=8Ω
RL=16Ω
RL=32Ω
RL=4Ω
RL=8Ω
RL=8Ω
RL=16Ω
RL=32Ω
RL=4Ω
RL=8Ω
RL=8Ω
Stereo
Bridge
VSS=3V
0.7
POUT
1.7
VSS=12V
VSS=3V
POUT
Bridge
VSS=6V
VSS=9V
d
SVR
Input Noise Voltage
eN(IN)
CT
VSS=9V; RL=4Ω
f=100Hz,VR=0.5V,Rg=0
Rg=0
Rg=104Ω
f=1KHz, Rg=10KΩ
UNISONIC TECHNOLOGIES CO., LTD
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VSS=6V
VSS=9V
Supply Voltage Rejection
Cross-Talk
Stereo 8 (per channel)
40
40
TYP
35
4.5
45
51
30
0.1
0.02
1
0.6
0.25
0.13
2.3
1.3
2.4
0.18
0.06
2.8
1.5
4.7
0.3
0.5
46
1.5
3
52
MAX
12
50
47
53
±1
UNIT
V
mA
V
dB
dB
dB
kΩ
W
1.5
3
6
%
%
dB
mV
mV
dB
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TEA2025D
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LINEAR INTEGRATED CIRCUIT
APPLICATION INFORMATION
Input Capacitor
Input capacitor is PNP type allowing source to be referenced to ground.
In this way no input coupling capacitor is required. However, a series capacitor(0.22µF) to the input side can be
useful in case of noise due to variable resistor contact.
Bootstrap
The bootstrap connection allows to increase the output swing.
The suggested value for the bootstrap capacitors (100µF) avoids a reduction of the output signal also at low
frequencies and low supply voltage.
Voltage Gain Adjust
STEREO MODE
The voltage gain is determined by on-chip resistors R1 and R2 together with the external RfC1 series connected
between pin 8(13) and ground. The frequency response is given approximated by:
VOUT
VIN
=
R1
1
Rf +R2+ JWC1
With Rf=0,C1=100µF, the gain results 46dB with pole at f=32Hz
The purpose of RfI is to reduce the gain. It is recommended to not reduce it under 36dB.
BRIDGE MODE
Figure 7
8(13)
Rf
C1
R2
2(19)
50
R1
10K
The bridge configuration is realized very easily thanks to an internal voltage divider which provides (at pin 1)the CH1
output signal after reduction. It is enough to connect pin8(inverting input of CH 2 )with a capacitor to pin 1 and to
connect to ground the pin 9.
The total gain of the bridge is given by:
VOUT
VIN
=
R3
R1
R1
1 (1+ R4
1 )
Rf +R2+ JWC1
R2+R4+ JWC1
and with the suggested values (C1=C2=100µF,Rf=0)means:
Gv=52dB
Figure 8
IN
OUT
R1
10K
R2
OUT
R1
10K
R2
R3
5K
R4
50
With first pole at f=32Hz
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LINEAR INTEGRATED CIRCUIT
APPLICATION INFORMATION(Cont.)
Output Capacitors.
The low cut off frequency due to output capacitor depending on the load is given by:
1
FL =
2πCOUT *RL
With COUT 470µF and RL=4 ohm it means FL=80Hz.
Stability
A good layout is recommended in order to avoid oscillations. In general, the designer must pay attention on the
following points:
-Short wires of components and short connections.
-No ground loops.
-Bypass of supply voltage with capacitors as nearest as possible to the supply I.C. pin. The low value (polyester)
capacitors must have good temperature and frequency characteristics.
-No sockets.
The heatsink can have a smaller factor of safety compared with that of a conventional circuit. There is no device
damage in the case of excessive junction temperature: all that happens is that POUT (and therefore PD) and Id are
reduced.
APPLICATION SUGGESTION
The recommended values of the components are those shown on stereo application circuit of Fig.2 different values
can be used, the following table can help the designer.
Component
Recommended
Purpose
C1,C2
0.22µF
Input DC Decoupling in Case of
Slider Contact Noise of Variable
Resistor
C3
100µF
Ripple Rejection
C4,C5
C6,C7
C8,C9
C10,C11
100µF
470µF
0.15µF
100µF
Bootstrap
Output DC Decoupling
Frequency Stability
Inverting Input DC Decoupling
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Larger
Than
Smaller Than
Degradation of SVR, Increase of THD at
Low Frequency and Low Voltage
Increase of Low Frequency Cut-off
Danger of Oscillations
Increase of Low Frequency Cut-off
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TEA2025D
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LINEAR INTEGRATED CIRCUIT
TYPICAL APPLICATION CIRCUIT
Figure 1:Bridge Application(Powerdip)
Figure 2:Stereo Application (Powerdip)
+V 8
+V 8
100 µF
100 µF
0 .22 µF
IN
12
IN.1
18
13
100
µF
8
TEA
2025 D
100µF
1
10
0 .15 µF
RL
3
2
100µF
4,5 ,6,7,11,
14,15,16,17
C2
0 .15 µF
C3
100µF
C4
100 µF
20
C6
18
470µF
19
0 .22 µF
C11
UNISONIC TECHNOLOGIES CO., LTD
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IN.2
12
13
C10
100µF
19
9
100µF
100 µF
20
C1
0 .22 µF
100
µF
9
TEA
2025 D
3
C5
100µF
8
2
10
4,5,6 ,7,11,
14 ,15 ,16 ,17
OUT.1
C8
0 .15 µF
C9
0 .15 µF
RL
C7
470 µF
OUT.2
RL
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TEA2025D
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LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS
Supply Current vs.Supply Voltage
(RL=4Ω)
I(mA)
50
Output Voltage vs. Supply Voltage
8
VOUT(V)
7
40
6
5
30
4
3
20
2
STEREO
10
3
6
9
12
STEREO
1
15
0
3
6
Vss(V)
3.5
2.5
12
15
Vss(V)
Output Power vs. Supply Voltage
(THD=10%,f=1KHz)
PoUT(W)
3
9
10
THD vs. Output Power
(f=1KHz,Vss=6V)
THD(%)
RI=8Ω
RI=8Ω
RI=16Ω
RI=4Ω
RI=4Ω
2
1
1.5
RI=16Ω
1
0.5
0
3
STEREO
6
9
12
15
Vss(V)
0.1
0
STEREO
0.2
0.4
0.6
0.8
1
PoUT(W)
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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