MT6223(P) Phone Design Notice 2007/07/03 WCP/SA/RP1 MediaTek Confidential Subject to Change without Notice MT6223 Package Body Size Ball Count Ball Pitch Ball Dia. Package Thk. Stand Off Substrate Thk. D E N e b A (Max.) A1 C 9.0 9.0 224 0.5 0.275 1.2 0.21 0.36 MediaTek Confidential Subject to Change without Notice MT6223 vs MT6205 MT6205B MT6223 Parallel I/F X 8/9-bit Serial I/F V V Input X Stereo Recording X Mono Channel X 2 Resolution X AC I2C X V I2S X V Voice Link X DAI/PCM Audio Link X I2S EINT X 4 Keypad 5x5 5x6 UART 2 (115.2kbps) 3 (921.6kps) ADC 5 3(ext)+4(int) SW Card X MT6223P only LCM I/F FM Radio Audio DAC BT MediaTek Confidential Subject to Change without Notice Keypad VDD (5 x 6 + o n e p o w e r -k e y ) k e y m a tr ix COL0 COL1 COL2 COL3 COL4 COL5 R209 NC PWRKEY RESET VMSEL RSTCAP VREF D3 C2 E4 D2 B1 PWRKEY /SYSRST S16 C229 100n LED_B LED_G LED_R C231 100n C249 100n D e d ic a te d fo r P o w e r -k e y KSW [PWR/End] G10 G9 H8 D4 COL6 ROW 4 1 1 1 1 1 1 1 ROW 3 1 1 1 1 1 1 1 ROW 2 1 1 1 1 1 1 1 ROW 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ROW 0 •MT6223 is 5x6 matrix •COL6 is dedicated for POWER_KEY (internal connection). MediaTek Confidential Subject to Change without Notice B a se b a n d P M IC P M I C in te g r a te d B B c h ip ADC ADC channel Function Pin out AUXADC_0 External ADC channel M2 AUXADC_1 External ADC channel M3 AUXADC_2 External ADC channel N2 AUXADC_3 Internal reference voltage x AUXADC_4 ADC for Charger voltage detection x AUXADC_5 ADC for charging current sense x AUXADC_6 ADC for Battery Voltage detection x AUXADC_7 Auxiliary ADC channel 0 data register for TDMA event 0 x MediaTek Confidential Subject to Change without Notice MT6223 Speech & Audio Features MT6205 MT6223 DSP 1 2 Speed 52MHz 104MHz FR V V HR V V EFR V V AU_FMINR AMR FR X V AU_OUT0_P AMR HR X V X V UL X V DL X V Noise Suppression X V Echo Cancellation X V Echo Suppression V V VR X V MP3 X V WT 64Tones X V M UX Audio Amp-L Audio LCH-DAC Audio Signal AU_MOUTR M UX Stereoto-Mono AU_MOUTL Audio RCH-DAC Audio Amp-R AU_FMINL FM/AM radio chip Stereoto-Mono Voice Amp-0 Voice Signal Speech Codec Voice DAC AU_OUT0_N AU_VIN0_P PGA Voice ADC M UX Voice Signal AU_VIN0_N AU_VIN1_N CTM Noise Reduction AU_VIN1_P MediaTek Confidential Subject to Change without Notice LCD & Memory Card I/F LCD IO D8 D7 D6 D5 D4 D3 D2 D1 D0 Parallel IF PD8 PD7 Pd6 PD5 PD4 PD3 PD2 PD1 PD0 Serial IF SCLK SDA SA0 MCCM MCDA 3 MCDA 2 MCDA 1 MCDA 0 MSDC IF VDD VDD R811 47K R813 47K R809 47K R812 47K Push-To-Push T-Flash Card •LCD I/F can control 2 LCMs and 1 memory card at the same time. R810 47K J802 1 2 3 4 5 6 7 8 LCD2 LCD3 LCD4 MCCK LCD0 LCD1 DAT2 CD/DAT3 CMD VSS VDD VSS CLK VSS VSS Detect DAT0 DAT1 •Memory Card I/F is MT6223P only. 9 10 11 12 200 R814 VR803 VR801 VR805 VR804 VR806 VR807 VR802 C805 4.7uF MFIQ_CradIn High : Card push out Low : Card push in MediaTek Confidential Subject to Change without Notice MFIQ_CardIn TFRPN-00815-TP00 •For SW memory card, if EINT is exhausted, it could uses MFIQ for Card detection. Anyway MFIQ acts when 26MHz system clock on. PMU of MT6223 MT6305B MT6318 MT6223 1 CHRIN AC CHRIN 2 GATEDRV GDRVAC GATEDRV 3 ISENSE ISNENSE ISENSE 4 BATSNS VBAT BATSENSE 5 BATDET BAT_ON BATDET 1.1 Charger Schematics X (Through 6 CHRCNTL 7 CHRDET SPI) INT BATUSE 8 (Li-ion and NiMH) X (Only Li-ion) X (Share with 9 CHRIN) CHRIN) USB Resistor) X (External 12 Resistor) MediaTek Confidential Subject to Change without Notice Total 8 X (Only Li-ion) CHRIN) X (Share with GDRVUSB X (External 11 X (Internal) X (Share with X (Share with 10 X (Internal) VB_OUT CHRIN) X (Internal) ISENSE _OUT X (Internal) 10 5 PMU of MT6223 1.2 Charger Current MT6305B MT6318 MT6223 Sense Resistor 0.4 Ohm 0.2 Ohm 0.2 Ohm Pre-Charge 25 62.5 62.5 0 62.5 62.5 1 90 90 2 150 150 225 225 4 300 300 5 450 450 6 650 650 7 800 800 CC 3 400 For Layout: Connect ISENSE and BATSNS directly to the two terminal of sense resistor to get a precise charge current. Don’t connect BATSNS to other VBAT trace near IC, which could cause charge current mismatch for over hundreds mA. MediaTek Confidential Subject to Change without Notice PMU of MT6223 1.3 Charger Protection MT6305B MT6318 MT6223 OVP/OCP Max. Charger Input 15V 15V 9V 30V Charger OVP Point 9V 9V 7V 6.8V Ext_OVP/OCP: R201 0 U202 TO CHRIN F201 1u (16V 0805) FUSE(1A 0603) C235 2 3 4 IN OUT VSS ILIM NC VBAT /fault /CE 8 CHRIN 7 6 R205 1 VCHG 5 C205 1uF 25K BQ24316 VBAT R202 MediaTek Confidential Subject to Change without Notice 220K PMU of MT6223 2. LDO LDO Current MT6305B (mA) MT6318 (mA) MT6223 (mA) VCORE 200 200 200 VA 150 150 125 VIO 100 100 100 VM 150 150 75 VTCXO 20 20 20 VSIM 20 20 20 VRF X X 250 VRTC V V V BAT_BACKUP X V V VUSB X 20 X VMC X 250 X VSW_A X 50 X VIBR X 200 X MediaTek Confidential Subject to Change without Notice PMU of MT6223 LDO-Capacitor Selection LDO VA VRF VTCXO VCORE VIO VM VSIM VRTC BAT_ _BACKUP Output Capacitor 4.7 uF 4.7 uF 1 uF 2.2 uF 1 uF 1 uF 1 uF 0.1uF 0.1 uF X5R X5R X5R X5R X5R X5R X5R X5R X5R VRF_SENSE layout notice The VRF_SENSE pin should connect to MT6139’s power in pin directly to reduce the voltage drop. And the VRF_SENSE trace should be protected by GND in layout. MediaTek Confidential Subject to Change without Notice PMU of MT6223 3. SIM 5 C236 C243 GND GND 3 CLK RST VCC I/O VPP GND GND 1 9 10 J219 C6 D6 SIMRST B5 SIMCLK A5 SIMIO VSIM GND nc nc MT6318 MT6223 1 SIO SIO SIO 2 SRST SRST SRST 3 SCLK SCLK SCLK 4 SIMIO SIMIO X (Internal) 5 SIMRST SIMRST X (Internal) 6 SIMCLK SIMCLK X (Internal) 7 SIMVCC SIMVCC X (Internal) 8 SIMSEL X (Through SPI) X (Internal) Total 8 7 3 2 4 6 VSIM C241 nc C246 2.2u/6.3V (X5R) 7 8 ID1A-6S-2.54SF MT6305B The equivalent capacitor on SIM I/F must be under 100pF to insure operation normally. MediaTek Confidential Subject to Change without Notice PMU of MT6223 4. LED & Vibrator Driver Driver Current Capability LED_R 25 mA LED_G 25 mA LED_B 25 mA LED 150 mA VIBRATOR 250 mA •LED with PWM2 control duty cycle •Vibrator/LED_X without PWM MediaTek Confidential Subject to Change without Notice VRF Design Note ● Place a 4.7uF X5R capacitor close to PMU to keep stabilization and performance ● Place a 4.7uF X5R capacitor close to RF transceiver to keep stabilization and performance ● Keep VRF trace > 15mil ● Connect sense pin, VRF_SENSE, to RF’s power to reduce the voltage drop due to layout and package. ● Protect VRF_SENSE with GND vias and planes. MediaTek Confidential Subject to Change without Notice VTCXO Design Note ● Place a 1.0uF X5R bypass cap. and reserve a series 0402 0Ohm near PMU ● Place 1uF X5R//10pF bypass cap. and reserve a series 0402 0Ohm close to TRx pin16 VCCSYN ● Protect VTCXO with GND vias and planes. If RF is on top layer, suggest to put VTCXO routing on layer5 with good GND planes layer4 and layer6 ● Do not place any power, analog, digital, and signal traces and vias parallel or close to VTCXO routing. ● Keep VTCXO trace > 15mil ● Do not place VTCXO trace across layers under RF transceiver /Crystal ● Placement of PMU and RF transceiver as close as possible MediaTek Confidential Subject to Change without Notice MT6223 Memory Support Plan GPRS NOR RAM 16 64 32 8 32 16 Phone Module Intel Crystal (burst, deMux) ST M36W0R6040U3 (64+16 AD MUX, Intel pinout) Intel Crystal (burst, deMux) Spansion PLJ (70/30/16) ST M36W0R6050T1 (64+32 deMux) ST M36W0R6050U0 (64+32 AD MUX) Toshiba TV00560002DDGB (70/30/16) Samsung K5N3208ATM (32+16, ADMUX, Spansion pinout) Intel Crystal (burst, deMux) Spansion NSJ (burst) ST M36W0R5040U3 (32+16 AD MUX, Intel pinout) Remark: Spansion VSK, ES at Aug/07, 2008 Q1 MP MediaTek Confidential Subject to Change without Notice AD_Mux MCP For AD_Mux MCP: 1.EA0~15 are share with ED0~15. 2.Baseband’s EA17 connect to AD_Mux MCP EA16 U500 ED[0..15] EA[17..22] EA23 /ECS2 R511 0ohm R512 0ohm(NC) EA24 ED0 ED1 ED2 ED3 ED4 ED5 ED6 ED7 ED8 ED9 ED10 ED11 ED12 ED13 ED14 ED15 EA17 EA18 EA19 EA20 EA21 EA22 J14 J13 H11 H10 J9 J8 H7 H6 H13 H12 J11 J10 H9 H8 J6 J5 G6 F13 G12 F12 G7 F6 F14 G9 A/DQ0 A/DQ1 A/DQ2 A/DQ3 A/DQ4 A/DQ5 A/DQ6 A/DQ7 A/DQ8 A/DQ9 A/DQ10 A/DQ11 A/DQ12 A/DQ13 A/DQ14 A/DQ15 A16 A17 A18 A19 A20 A21 A22 A23 R-CRE F-ACC Vcc VccQ VccQ CE_PS1# R-UB# R-LB# RY_BY#f/RDY CLK AVD# WE# OE# WP#/ACC RESET# CE_F1# R-CRE: control register enable; for cellularRAM only K10 ECRE F11 F9 G5 J12 VMEM K9 /ECS1 E10 E9 F5 F8 G8 F10 H14 G11 G10 G13 /EUB /ELB R510 0ohm EWAIT ECLK /EADV /EWR /ERD VMEM_EMI /WATCHDOG /ECS0 Burst mode MCP must check EWAIT, ECLK, and /EADV MediaTek Confidential Subject to Change without Notice Tools for MT6223 ● Flash Tool/ MutilPortDownLoad : Ver_3.1.05 ● META : Ver_5.3.8 ● ATE : Ver_5.3.8 MediaTek Confidential Subject to Change without Notice PCB note_4Layer-I •MT6223 0.5mm Pitch，top layer 的trace在ball與ball之間必需要使 用到3mil/3mil (線寬/線距)，當走出 chip時,就要用4mil/4mil (線寬/線 距)；雷射孔4/12 mil (Drill/Diameter)。 •內圈ball：優先使用1-4層貫孔，走 內層，因內圈大多是GND pin，建 議要配合1-2層雷射孔一起使用。 MediaTek Confidential Subject to Change without Notice PCB note_4Layer-II 第4 圈ball：第一優先使用1-4層貫孔， 走內層。第二是使用1-2層雷射孔走L2 層。 第3圈ball：第一優先使用1-2層雷射 孔走L2層。第二是，若內圈有空 間，可使用1-4層貫孔，走內層。若 TOP走線有穿過ball，線寬與線距就 要3mil。 MediaTek Confidential Subject to Change without Notice PCB note_4Layer-III 第2圈ball：第一優先使用3mil 線寬的TOP走線，第二才是使 用1-2層的雷射孔，走L2層。若 TOP走線有穿過ball，線寬與 線距就要3mil。 第1圈ball：第一優先使用4mil 線寬的TOP走線，第二才是使 用1-2層的雷射孔，走L2層。若 TOP走線有穿過ball，線寬與 線距就要3mil。 6-layer 每圈ball的走線方式，大致與 4-layer相 同，因6-layer會多埋孔，所以不同在於第 4圈及內圈會以1-2層雷射孔加2-5層埋孔 為主。 MediaTek Confidential Subject to Change without Notice